git.sur5r.net Git - openocd/blob - src/flash/nand/core.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de>              *
   3  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   4  *   Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net>             *
   5  *                                                                         *
   6  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include <flash/nand.h>
  28 #include <flash/common.h>
  29 #include "imp.h"
  30
  31 /* configured NAND devices and NAND Flash command handler */
  32 struct nand_device *nand_devices = NULL;
  33
  34 void nand_device_add(struct nand_device *c)
  35 {
  36         if (nand_devices) {
  37                 struct nand_device *p = nand_devices;
  38                 while (p && p->next) p = p->next;
  39                 p->next = c;
  40         } else
  41                 nand_devices = c;
  42 }
  43
  44
  45 /*      Chip ID list
  46  *
  47  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  48  *      options
  49  *
  50  *      Pagesize; 0, 256, 512
  51  *      0       get this information from the extended chip ID
  52  *      256     256 Byte page size
  53  *      512     512 Byte page size
  54  */
  55 static struct nand_info nand_flash_ids[] =
  56 {
  57         /* start "museum" IDs */
  58         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  59         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  60         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  61         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  62         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  63         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  64         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  65         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  66         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  67         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
  68
  69         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
  70         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
  71         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  72         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  73         /* end "museum" IDs */
  74
  75         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
  76         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
  77         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
  78         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
  79
  80         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
  81         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
  82         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
  83         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
  84
  85         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
  86         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
  87         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
  88         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
  89
  90         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
  91         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
  92         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
  93         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  94         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  95         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  96         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  97
  98         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
  99
 100         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 101         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 102         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 103         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 104
 105         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 106         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 107         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 108         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 109
 110         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 111         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 112         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 113         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 114
 115         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 116         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 117         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 118         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 119
 120         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 121         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 122         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 123         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 124
 125         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 126         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 127         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 128         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 129
 130         {NULL, 0, 0, 0, 0, 0 }
 131 };
 132
 133 /* Manufacturer ID list
 134  */
 135 static struct nand_manufacturer nand_manuf_ids[] =
 136 {
 137         {0x0, "unknown"},
 138         {NAND_MFR_TOSHIBA, "Toshiba"},
 139         {NAND_MFR_SAMSUNG, "Samsung"},
 140         {NAND_MFR_FUJITSU, "Fujitsu"},
 141         {NAND_MFR_NATIONAL, "National"},
 142         {NAND_MFR_RENESAS, "Renesas"},
 143         {NAND_MFR_STMICRO, "ST Micro"},
 144         {NAND_MFR_HYNIX, "Hynix"},
 145         {NAND_MFR_MICRON, "Micron"},
 146         {0x0, NULL},
 147 };
 148
 149 /*
 150  * Define default oob placement schemes for large and small page devices
 151  */
 152
 153 #if 0
 154 static struct nand_ecclayout nand_oob_8 = {
 155         .eccbytes = 3,
 156         .eccpos = {0, 1, 2},
 157         .oobfree = {
 158                 {.offset = 3,
 159                  .length = 2},
 160                 {.offset = 6,
 161                  .length = 2}}
 162 };
 163 #endif
 164
 165 struct nand_device *get_nand_device_by_name(const char *name)
 166 {
 167         unsigned requested = get_flash_name_index(name);
 168         unsigned found = 0;
 169
 170         struct nand_device *nand;
 171         for (nand = nand_devices; NULL != nand; nand = nand->next)
 172         {
 173                 if (strcmp(nand->name, name) == 0)
 174                         return nand;
 175                 if (!flash_driver_name_matches(nand->controller->name, name))
 176                         continue;
 177                 if (++found < requested)
 178                         continue;
 179                 return nand;
 180         }
 181         return NULL;
 182 }
 183
 184 struct nand_device *get_nand_device_by_num(int num)
 185 {
 186         struct nand_device *p;
 187         int i = 0;
 188
 189         for (p = nand_devices; p; p = p->next)
 190         {
 191                 if (i++ == num)
 192                 {
 193                         return p;
 194                 }
 195         }
 196
 197         return NULL;
 198 }
 199
 200 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 201                 struct nand_device **nand)
 202 {
 203         const char *str = CMD_ARGV[name_index];
 204         *nand = get_nand_device_by_name(str);
 205         if (*nand)
 206                 return ERROR_OK;
 207
 208         unsigned num;
 209         COMMAND_PARSE_NUMBER(uint, str, num);
 210         *nand = get_nand_device_by_num(num);
 211         if (!*nand) {
 212                 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
 213                 return ERROR_INVALID_ARGUMENTS;
 214         }
 215         return ERROR_OK;
 216 }
 217
 218 int nand_build_bbt(struct nand_device *nand, int first, int last)
 219 {
 220         uint32_t page = 0x0;
 221         int i;
 222         uint8_t oob[6];
 223
 224         if ((first < 0) || (first >= nand->num_blocks))
 225                 first = 0;
 226
 227         if ((last >= nand->num_blocks) || (last == -1))
 228                 last = nand->num_blocks - 1;
 229
 230         for (i = first; i < last; i++)
 231         {
 232                 nand_read_page(nand, page, NULL, 0, oob, 6);
 233
 234                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 235                         || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 236                                 ((nand->page_size == 2048) && (oob[0] != 0xff))))
 237                 {
 238                         LOG_WARNING("bad block: %i", i);
 239                         nand->blocks[i].is_bad = 1;
 240                 }
 241                 else
 242                 {
 243                         nand->blocks[i].is_bad = 0;
 244                 }
 245
 246                 page += (nand->erase_size / nand->page_size);
 247         }
 248
 249         return ERROR_OK;
 250 }
 251
 252 int nand_read_status(struct nand_device *nand, uint8_t *status)
 253 {
 254         if (!nand->device)
 255                 return ERROR_NAND_DEVICE_NOT_PROBED;
 256
 257         /* Send read status command */
 258         nand->controller->command(nand, NAND_CMD_STATUS);
 259
 260         alive_sleep(1);
 261
 262         /* read status */
 263         if (nand->device->options & NAND_BUSWIDTH_16)
 264         {
 265                 uint16_t data;
 266                 nand->controller->read_data(nand, &data);
 267                 *status = data & 0xff;
 268         }
 269         else
 270         {
 271                 nand->controller->read_data(nand, status);
 272         }
 273
 274         return ERROR_OK;
 275 }
 276
 277 static int nand_poll_ready(struct nand_device *nand, int timeout)
 278 {
 279         uint8_t status;
 280
 281         nand->controller->command(nand, NAND_CMD_STATUS);
 282         do {
 283                 if (nand->device->options & NAND_BUSWIDTH_16) {
 284                         uint16_t data;
 285                         nand->controller->read_data(nand, &data);
 286                         status = data & 0xff;
 287                 } else {
 288                         nand->controller->read_data(nand, &status);
 289                 }
 290                 if (status & NAND_STATUS_READY)
 291                         break;
 292                 alive_sleep(1);
 293         } while (timeout--);
 294
 295         return (status & NAND_STATUS_READY) != 0;
 296 }
 297
 298 int nand_probe(struct nand_device *nand)
 299 {
 300         uint8_t manufacturer_id, device_id;
 301         uint8_t id_buff[6];
 302         int retval;
 303         int i;
 304
 305         /* clear device data */
 306         nand->device = NULL;
 307         nand->manufacturer = NULL;
 308
 309         /* clear device parameters */
 310         nand->bus_width = 0;
 311         nand->address_cycles = 0;
 312         nand->page_size = 0;
 313         nand->erase_size = 0;
 314
 315         /* initialize controller (device parameters are zero, use controller default) */
 316         if ((retval = nand->controller->init(nand) != ERROR_OK))
 317         {
 318                 switch (retval)
 319                 {
 320                         case ERROR_NAND_OPERATION_FAILED:
 321                                 LOG_DEBUG("controller initialization failed");
 322                                 return ERROR_NAND_OPERATION_FAILED;
 323                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 324                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 325                                 return ERROR_NAND_OPERATION_FAILED;
 326                         default:
 327                                 LOG_ERROR("BUG: unknown controller initialization failure");
 328                                 return ERROR_NAND_OPERATION_FAILED;
 329                 }
 330         }
 331
 332         nand->controller->command(nand, NAND_CMD_RESET);
 333         nand->controller->reset(nand);
 334
 335         nand->controller->command(nand, NAND_CMD_READID);
 336         nand->controller->address(nand, 0x0);
 337
 338         if (nand->bus_width == 8)
 339         {
 340                 nand->controller->read_data(nand, &manufacturer_id);
 341                 nand->controller->read_data(nand, &device_id);
 342         }
 343         else
 344         {
 345                 uint16_t data_buf;
 346                 nand->controller->read_data(nand, &data_buf);
 347                 manufacturer_id = data_buf & 0xff;
 348                 nand->controller->read_data(nand, &data_buf);
 349                 device_id = data_buf & 0xff;
 350         }
 351
 352         for (i = 0; nand_flash_ids[i].name; i++)
 353         {
 354                 if (nand_flash_ids[i].id == device_id)
 355                 {
 356                         nand->device = &nand_flash_ids[i];
 357                         break;
 358                 }
 359         }
 360
 361         for (i = 0; nand_manuf_ids[i].name; i++)
 362         {
 363                 if (nand_manuf_ids[i].id == manufacturer_id)
 364                 {
 365                         nand->manufacturer = &nand_manuf_ids[i];
 366                         break;
 367                 }
 368         }
 369
 370         if (!nand->manufacturer)
 371         {
 372                 nand->manufacturer = &nand_manuf_ids[0];
 373                 nand->manufacturer->id = manufacturer_id;
 374         }
 375
 376         if (!nand->device)
 377         {
 378                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 379                         manufacturer_id, device_id);
 380                 return ERROR_NAND_OPERATION_FAILED;
 381         }
 382
 383         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 384
 385         /* initialize device parameters */
 386
 387         /* bus width */
 388         if (nand->device->options & NAND_BUSWIDTH_16)
 389                 nand->bus_width = 16;
 390         else
 391                 nand->bus_width = 8;
 392
 393         /* Do we need extended device probe information? */
 394         if (nand->device->page_size == 0 ||
 395             nand->device->erase_size == 0)
 396         {
 397                 if (nand->bus_width == 8)
 398                 {
 399                         nand->controller->read_data(nand, id_buff + 3);
 400                         nand->controller->read_data(nand, id_buff + 4);
 401                         nand->controller->read_data(nand, id_buff + 5);
 402                 }
 403                 else
 404                 {
 405                         uint16_t data_buf;
 406
 407                         nand->controller->read_data(nand, &data_buf);
 408                         id_buff[3] = data_buf;
 409
 410                         nand->controller->read_data(nand, &data_buf);
 411                         id_buff[4] = data_buf;
 412
 413                         nand->controller->read_data(nand, &data_buf);
 414                         id_buff[5] = data_buf >> 8;
 415                 }
 416         }
 417
 418         /* page size */
 419         if (nand->device->page_size == 0)
 420         {
 421                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 422         }
 423         else if (nand->device->page_size == 256)
 424         {
 425                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 426                 return ERROR_NAND_OPERATION_FAILED;
 427         }
 428         else
 429         {
 430                 nand->page_size = nand->device->page_size;
 431         }
 432
 433         /* number of address cycles */
 434         if (nand->page_size <= 512)
 435         {
 436                 /* small page devices */
 437                 if (nand->device->chip_size <= 32)
 438                         nand->address_cycles = 3;
 439                 else if (nand->device->chip_size <= 8*1024)
 440                         nand->address_cycles = 4;
 441                 else
 442                 {
 443                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 444                         nand->address_cycles = 5;
 445                 }
 446         }
 447         else
 448         {
 449                 /* large page devices */
 450                 if (nand->device->chip_size <= 128)
 451                         nand->address_cycles = 4;
 452                 else if (nand->device->chip_size <= 32*1024)
 453                         nand->address_cycles = 5;
 454                 else
 455                 {
 456                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 457                         nand->address_cycles = 6;
 458                 }
 459         }
 460
 461         /* erase size */
 462         if (nand->device->erase_size == 0)
 463         {
 464                 switch ((id_buff[4] >> 4) & 3) {
 465                 case 0:
 466                         nand->erase_size = 64 << 10;
 467                         break;
 468                 case 1:
 469                         nand->erase_size = 128 << 10;
 470                         break;
 471                 case 2:
 472                         nand->erase_size = 256 << 10;
 473                         break;
 474                 case 3:
 475                         nand->erase_size =512 << 10;
 476                         break;
 477                 }
 478         }
 479         else
 480         {
 481                 nand->erase_size = nand->device->erase_size;
 482         }
 483
 484         /* initialize controller, but leave parameters at the controllers default */
 485         if ((retval = nand->controller->init(nand) != ERROR_OK))
 486         {
 487                 switch (retval)
 488                 {
 489                         case ERROR_NAND_OPERATION_FAILED:
 490                                 LOG_DEBUG("controller initialization failed");
 491                                 return ERROR_NAND_OPERATION_FAILED;
 492                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 493                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 494                                         nand->bus_width, nand->address_cycles, nand->page_size);
 495                                 return ERROR_NAND_OPERATION_FAILED;
 496                         default:
 497                                 LOG_ERROR("BUG: unknown controller initialization failure");
 498                                 return ERROR_NAND_OPERATION_FAILED;
 499                 }
 500         }
 501
 502         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 503         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 504
 505         for (i = 0; i < nand->num_blocks; i++)
 506         {
 507                 nand->blocks[i].size = nand->erase_size;
 508                 nand->blocks[i].offset = i * nand->erase_size;
 509                 nand->blocks[i].is_erased = -1;
 510                 nand->blocks[i].is_bad = -1;
 511         }
 512
 513         return ERROR_OK;
 514 }
 515
 516 int nand_erase(struct nand_device *nand, int first_block, int last_block)
 517 {
 518         int i;
 519         uint32_t page;
 520         uint8_t status;
 521         int retval;
 522
 523         if (!nand->device)
 524                 return ERROR_NAND_DEVICE_NOT_PROBED;
 525
 526         if ((first_block < 0) || (last_block > nand->num_blocks))
 527                 return ERROR_INVALID_ARGUMENTS;
 528
 529         /* make sure we know if a block is bad before erasing it */
 530         for (i = first_block; i <= last_block; i++)
 531         {
 532                 if (nand->blocks[i].is_bad == -1)
 533                 {
 534                         nand_build_bbt(nand, i, last_block);
 535                         break;
 536                 }
 537         }
 538
 539         for (i = first_block; i <= last_block; i++)
 540         {
 541                 /* Send erase setup command */
 542                 nand->controller->command(nand, NAND_CMD_ERASE1);
 543
 544                 page = i * (nand->erase_size / nand->page_size);
 545
 546                 /* Send page address */
 547                 if (nand->page_size <= 512)
 548                 {
 549                         /* row */
 550                         nand->controller->address(nand, page & 0xff);
 551                         nand->controller->address(nand, (page >> 8) & 0xff);
 552
 553                         /* 3rd cycle only on devices with more than 32 MiB */
 554                         if (nand->address_cycles >= 4)
 555                                 nand->controller->address(nand, (page >> 16) & 0xff);
 556
 557                         /* 4th cycle only on devices with more than 8 GiB */
 558                         if (nand->address_cycles >= 5)
 559                                 nand->controller->address(nand, (page >> 24) & 0xff);
 560                 }
 561                 else
 562                 {
 563                         /* row */
 564                         nand->controller->address(nand, page & 0xff);
 565                         nand->controller->address(nand, (page >> 8) & 0xff);
 566
 567                         /* 3rd cycle only on devices with more than 128 MiB */
 568                         if (nand->address_cycles >= 5)
 569                                 nand->controller->address(nand, (page >> 16) & 0xff);
 570                 }
 571
 572                 /* Send erase confirm command */
 573                 nand->controller->command(nand, NAND_CMD_ERASE2);
 574
 575                 retval = nand->controller->nand_ready ?
 576                                 nand->controller->nand_ready(nand, 1000) :
 577                                 nand_poll_ready(nand, 1000);
 578                 if (!retval) {
 579                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 580                         return ERROR_NAND_OPERATION_TIMEOUT;
 581                 }
 582
 583                 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
 584                 {
 585                         LOG_ERROR("couldn't read status");
 586                         return ERROR_NAND_OPERATION_FAILED;
 587                 }
 588
 589                 if (status & 0x1)
 590                 {
 591                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 592                                         (nand->blocks[i].is_bad == 1)
 593                                                 ? "bad " : "",
 594                                         i, status);
 595                         /* continue; other blocks might still be erasable */
 596                 }
 597
 598                 nand->blocks[i].is_erased = 1;
 599         }
 600
 601         return ERROR_OK;
 602 }
 603
 604 #if 0
 605 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 606 {
 607         uint8_t *page;
 608
 609         if (!nand->device)
 610                 return ERROR_NAND_DEVICE_NOT_PROBED;
 611
 612         if (address % nand->page_size)
 613         {
 614                 LOG_ERROR("reads need to be page aligned");
 615                 return ERROR_NAND_OPERATION_FAILED;
 616         }
 617
 618         page = malloc(nand->page_size);
 619
 620         while (data_size > 0)
 621         {
 622                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 623                 uint32_t page_address;
 624
 625
 626                 page_address = address / nand->page_size;
 627
 628                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 629
 630                 memcpy(data, page, thisrun_size);
 631
 632                 address += thisrun_size;
 633                 data += thisrun_size;
 634                 data_size -= thisrun_size;
 635         }
 636
 637         free(page);
 638
 639         return ERROR_OK;
 640 }
 641
 642 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 643 {
 644         uint8_t *page;
 645
 646         if (!nand->device)
 647                 return ERROR_NAND_DEVICE_NOT_PROBED;
 648
 649         if (address % nand->page_size)
 650         {
 651                 LOG_ERROR("writes need to be page aligned");
 652                 return ERROR_NAND_OPERATION_FAILED;
 653         }
 654
 655         page = malloc(nand->page_size);
 656
 657         while (data_size > 0)
 658         {
 659                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 660                 uint32_t page_address;
 661
 662                 memset(page, 0xff, nand->page_size);
 663                 memcpy(page, data, thisrun_size);
 664
 665                 page_address = address / nand->page_size;
 666
 667                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 668
 669                 address += thisrun_size;
 670                 data += thisrun_size;
 671                 data_size -= thisrun_size;
 672         }
 673
 674         free(page);
 675
 676         return ERROR_OK;
 677 }
 678 #endif
 679
 680 int nand_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 681 {
 682         uint32_t block;
 683
 684         if (!nand->device)
 685                 return ERROR_NAND_DEVICE_NOT_PROBED;
 686
 687         block = page / (nand->erase_size / nand->page_size);
 688         if (nand->blocks[block].is_erased == 1)
 689                 nand->blocks[block].is_erased = 0;
 690
 691         if (nand->use_raw || nand->controller->write_page == NULL)
 692                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 693         else
 694                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 695 }
 696
 697 int nand_read_page(struct nand_device *nand, uint32_t page,
 698                 uint8_t *data, uint32_t data_size,
 699                 uint8_t *oob, uint32_t oob_size)
 700 {
 701         if (!nand->device)
 702                 return ERROR_NAND_DEVICE_NOT_PROBED;
 703
 704         if (nand->use_raw || nand->controller->read_page == NULL)
 705                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 706         else
 707                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 708 }
 709
 710 int nand_page_command(struct nand_device *nand, uint32_t page,
 711                 uint8_t cmd, bool oob_only)
 712 {
 713         if (!nand->device)
 714                 return ERROR_NAND_DEVICE_NOT_PROBED;
 715
 716         if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
 717                 cmd = NAND_CMD_READOOB;
 718
 719         nand->controller->command(nand, cmd);
 720
 721         if (nand->page_size <= 512) {
 722                 /* small page device */
 723
 724                 /* column (always 0, we start at the beginning of a page/OOB area) */
 725                 nand->controller->address(nand, 0x0);
 726
 727                 /* row */
 728                 nand->controller->address(nand, page & 0xff);
 729                 nand->controller->address(nand, (page >> 8) & 0xff);
 730
 731                 /* 4th cycle only on devices with more than 32 MiB */
 732                 if (nand->address_cycles >= 4)
 733                         nand->controller->address(nand, (page >> 16) & 0xff);
 734
 735                 /* 5th cycle only on devices with more than 8 GiB */
 736                 if (nand->address_cycles >= 5)
 737                         nand->controller->address(nand, (page >> 24) & 0xff);
 738         } else {
 739                 /* large page device */
 740
 741                 /* column (0 when we start at the beginning of a page,
 742                  * or 2048 for the beginning of OOB area)
 743                  */
 744                 nand->controller->address(nand, 0x0);
 745                 if (oob_only)
 746                         nand->controller->address(nand, 0x8);
 747                 else
 748                         nand->controller->address(nand, 0x0);
 749
 750                 /* row */
 751                 nand->controller->address(nand, page & 0xff);
 752                 nand->controller->address(nand, (page >> 8) & 0xff);
 753
 754                 /* 5th cycle only on devices with more than 128 MiB */
 755                 if (nand->address_cycles >= 5)
 756                         nand->controller->address(nand, (page >> 16) & 0xff);
 757
 758                 /* large page devices need a start command if reading */
 759                 if (NAND_CMD_READ0 == cmd)
 760                         nand->controller->command(nand, NAND_CMD_READSTART);
 761         }
 762
 763         if (nand->controller->nand_ready) {
 764                 if (!nand->controller->nand_ready(nand, 100))
 765                         return ERROR_NAND_OPERATION_TIMEOUT;
 766         } else {
 767                 alive_sleep(1);
 768         }
 769
 770         return ERROR_OK;
 771 }
 772
 773 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 774                 uint8_t *data, uint32_t data_size,
 775                 uint8_t *oob, uint32_t oob_size)
 776 {
 777         uint32_t i;
 778         int retval;
 779
 780         retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
 781         if (ERROR_OK != retval)
 782                 return retval;
 783
 784         if (data)
 785         {
 786                 if (nand->controller->read_block_data != NULL)
 787                         (nand->controller->read_block_data)(nand, data, data_size);
 788                 else
 789                 {
 790                         for (i = 0; i < data_size;)
 791                         {
 792                                 if (nand->device->options & NAND_BUSWIDTH_16)
 793                                 {
 794                                         nand->controller->read_data(nand, data);
 795                                         data += 2;
 796                                         i += 2;
 797                                 }
 798                                 else
 799                                 {
 800                                         nand->controller->read_data(nand, data);
 801                                         data += 1;
 802                                         i += 1;
 803                                 }
 804                         }
 805                 }
 806         }
 807
 808         if (oob)
 809         {
 810                 if (nand->controller->read_block_data != NULL)
 811                         (nand->controller->read_block_data)(nand, oob, oob_size);
 812                 else
 813                 {
 814                         for (i = 0; i < oob_size;)
 815                         {
 816                                 if (nand->device->options & NAND_BUSWIDTH_16)
 817                                 {
 818                                         nand->controller->read_data(nand, oob);
 819                                         oob += 2;
 820                                         i += 2;
 821                                 }
 822                                 else
 823                                 {
 824                                         nand->controller->read_data(nand, oob);
 825                                         oob += 1;
 826                                         i += 1;
 827                                 }
 828                         }
 829                 }
 830         }
 831
 832         return ERROR_OK;
 833 }
 834
 835 int nand_write_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 836 {
 837         uint32_t i;
 838         int retval;
 839         uint8_t status;
 840
 841         retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
 842         if (ERROR_OK != retval)
 843                 return retval;
 844
 845         if (data)
 846         {
 847                 if (nand->controller->write_block_data != NULL)
 848                         (nand->controller->write_block_data)(nand, data, data_size);
 849                 else
 850                 {
 851                         for (i = 0; i < data_size;)
 852                         {
 853                                 if (nand->device->options & NAND_BUSWIDTH_16)
 854                                 {
 855                                         uint16_t data_buf = le_to_h_u16(data);
 856                                         nand->controller->write_data(nand, data_buf);
 857                                         data += 2;
 858                                         i += 2;
 859                                 }
 860                                 else
 861                                 {
 862                                         nand->controller->write_data(nand, *data);
 863                                         data += 1;
 864                                         i += 1;
 865                                 }
 866                         }
 867                 }
 868         }
 869
 870         if (oob)
 871         {
 872                 if (nand->controller->write_block_data != NULL)
 873                         (nand->controller->write_block_data)(nand, oob, oob_size);
 874                 else
 875                 {
 876                         for (i = 0; i < oob_size;)
 877                         {
 878                                 if (nand->device->options & NAND_BUSWIDTH_16)
 879                                 {
 880                                         uint16_t oob_buf = le_to_h_u16(data);
 881                                         nand->controller->write_data(nand, oob_buf);
 882                                         oob += 2;
 883                                         i += 2;
 884                                 }
 885                                 else
 886                                 {
 887                                         nand->controller->write_data(nand, *oob);
 888                                         oob += 1;
 889                                         i += 1;
 890                                 }
 891                         }
 892                 }
 893         }
 894
 895         nand->controller->command(nand, NAND_CMD_PAGEPROG);
 896
 897         retval = nand->controller->nand_ready ?
 898                         nand->controller->nand_ready(nand, 100) :
 899                         nand_poll_ready(nand, 100);
 900         if (!retval)
 901                 return ERROR_NAND_OPERATION_TIMEOUT;
 902
 903         if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
 904         {
 905                 LOG_ERROR("couldn't read status");
 906                 return ERROR_NAND_OPERATION_FAILED;
 907         }
 908
 909         if (status & NAND_STATUS_FAIL)
 910         {
 911                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
 912                 return ERROR_NAND_OPERATION_FAILED;
 913         }
 914
 915         return ERROR_OK;
 916 }
 917