git.sur5r.net Git - openocd/blob - src/flash/nand/core.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de>              *
   3  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   4  *   Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net>             *
   5  *                                                                         *
   6  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "imp.h"
  28
  29 /* configured NAND devices and NAND Flash command handler */
  30 struct nand_device *nand_devices = NULL;
  31
  32 void nand_device_add(struct nand_device *c)
  33 {
  34         if (nand_devices) {
  35                 struct nand_device *p = nand_devices;
  36                 while (p && p->next) p = p->next;
  37                 p->next = c;
  38         } else
  39                 nand_devices = c;
  40 }
  41
  42
  43 /*      Chip ID list
  44  *
  45  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  46  *      options
  47  *
  48  *      Pagesize; 0, 256, 512
  49  *      0       get this information from the extended chip ID
  50  *      256     256 Byte page size
  51  *      512     512 Byte page size
  52  */
  53 static struct nand_info nand_flash_ids[] =
  54 {
  55         /* start "museum" IDs */
  56         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  57         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  58         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  59         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  60         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  61         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  62         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  63         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  64         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  65         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
  66
  67         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
  68         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
  69         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  70         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
  71         /* end "museum" IDs */
  72
  73         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
  74         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
  75         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
  76         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
  77
  78         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
  79         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
  80         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
  81         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
  82
  83         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
  84         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
  85         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
  86         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
  87
  88         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
  89         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
  90         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
  91         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  92         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  93         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  94         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
  95
  96         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
  97
  98         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
  99         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 100         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 101         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 102
 103         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 104         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 105         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 106         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 107
 108         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 109         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 110         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 111         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 112
 113         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 114         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 115         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 116         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 117
 118         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 119         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 120         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 121         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 122
 123         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 124         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 125         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 126         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 127
 128         {NULL, 0, 0, 0, 0, 0 }
 129 };
 130
 131 /* Manufacturer ID list
 132  */
 133 static struct nand_manufacturer nand_manuf_ids[] =
 134 {
 135         {0x0, "unknown"},
 136         {NAND_MFR_TOSHIBA, "Toshiba"},
 137         {NAND_MFR_SAMSUNG, "Samsung"},
 138         {NAND_MFR_FUJITSU, "Fujitsu"},
 139         {NAND_MFR_NATIONAL, "National"},
 140         {NAND_MFR_RENESAS, "Renesas"},
 141         {NAND_MFR_STMICRO, "ST Micro"},
 142         {NAND_MFR_HYNIX, "Hynix"},
 143         {NAND_MFR_MICRON, "Micron"},
 144         {0x0, NULL},
 145 };
 146
 147 /*
 148  * Define default oob placement schemes for large and small page devices
 149  */
 150
 151 #if 0
 152 static struct nand_ecclayout nand_oob_8 = {
 153         .eccbytes = 3,
 154         .eccpos = {0, 1, 2},
 155         .oobfree = {
 156                 {.offset = 3,
 157                  .length = 2},
 158                 {.offset = 6,
 159                  .length = 2}}
 160 };
 161 #endif
 162
 163 /**
 164  * Returns the flash bank specified by @a name, which matches the
 165  * driver name and a suffix (option) specify the driver-specific
 166  * bank number. The suffix consists of the '.' and the driver-specific
 167  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 168  * to the second (e.g. DM355EVM).
 169  */
 170 static struct nand_device *get_nand_device_by_name(const char *name)
 171 {
 172         unsigned requested = get_flash_name_index(name);
 173         unsigned found = 0;
 174
 175         struct nand_device *nand;
 176         for (nand = nand_devices; NULL != nand; nand = nand->next)
 177         {
 178                 if (strcmp(nand->name, name) == 0)
 179                         return nand;
 180                 if (!flash_driver_name_matches(nand->controller->name, name))
 181                         continue;
 182                 if (++found < requested)
 183                         continue;
 184                 return nand;
 185         }
 186         return NULL;
 187 }
 188
 189 struct nand_device *get_nand_device_by_num(int num)
 190 {
 191         struct nand_device *p;
 192         int i = 0;
 193
 194         for (p = nand_devices; p; p = p->next)
 195         {
 196                 if (i++ == num)
 197                 {
 198                         return p;
 199                 }
 200         }
 201
 202         return NULL;
 203 }
 204
 205 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 206                 struct nand_device **nand)
 207 {
 208         const char *str = CMD_ARGV[name_index];
 209         *nand = get_nand_device_by_name(str);
 210         if (*nand)
 211                 return ERROR_OK;
 212
 213         unsigned num;
 214         COMMAND_PARSE_NUMBER(uint, str, num);
 215         *nand = get_nand_device_by_num(num);
 216         if (!*nand) {
 217                 command_print(CMD_CTX, "NAND flash device '%s' not found", str);
 218                 return ERROR_INVALID_ARGUMENTS;
 219         }
 220         return ERROR_OK;
 221 }
 222
 223 int nand_build_bbt(struct nand_device *nand, int first, int last)
 224 {
 225         uint32_t page;
 226         int i;
 227         int pages_per_block = (nand->erase_size / nand->page_size);
 228         uint8_t oob[6];
 229
 230         if ((first < 0) || (first >= nand->num_blocks))
 231                 first = 0;
 232
 233         if ((last >= nand->num_blocks) || (last == -1))
 234                 last = nand->num_blocks - 1;
 235
 236         page = first * pages_per_block;
 237         for (i = first; i <= last; i++)
 238         {
 239                 nand_read_page(nand, page, NULL, 0, oob, 6);
 240
 241                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 242                         || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 243                                 ((nand->page_size == 2048) && (oob[0] != 0xff))))
 244                 {
 245                         LOG_WARNING("bad block: %i", i);
 246                         nand->blocks[i].is_bad = 1;
 247                 }
 248                 else
 249                 {
 250                         nand->blocks[i].is_bad = 0;
 251                 }
 252
 253                 page += pages_per_block;
 254         }
 255
 256         return ERROR_OK;
 257 }
 258
 259 int nand_read_status(struct nand_device *nand, uint8_t *status)
 260 {
 261         if (!nand->device)
 262                 return ERROR_NAND_DEVICE_NOT_PROBED;
 263
 264         /* Send read status command */
 265         nand->controller->command(nand, NAND_CMD_STATUS);
 266
 267         alive_sleep(1);
 268
 269         /* read status */
 270         if (nand->device->options & NAND_BUSWIDTH_16)
 271         {
 272                 uint16_t data;
 273                 nand->controller->read_data(nand, &data);
 274                 *status = data & 0xff;
 275         }
 276         else
 277         {
 278                 nand->controller->read_data(nand, status);
 279         }
 280
 281         return ERROR_OK;
 282 }
 283
 284 static int nand_poll_ready(struct nand_device *nand, int timeout)
 285 {
 286         uint8_t status;
 287
 288         nand->controller->command(nand, NAND_CMD_STATUS);
 289         do {
 290                 if (nand->device->options & NAND_BUSWIDTH_16) {
 291                         uint16_t data;
 292                         nand->controller->read_data(nand, &data);
 293                         status = data & 0xff;
 294                 } else {
 295                         nand->controller->read_data(nand, &status);
 296                 }
 297                 if (status & NAND_STATUS_READY)
 298                         break;
 299                 alive_sleep(1);
 300         } while (timeout--);
 301
 302         return (status & NAND_STATUS_READY) != 0;
 303 }
 304
 305 int nand_probe(struct nand_device *nand)
 306 {
 307         uint8_t manufacturer_id, device_id;
 308         uint8_t id_buff[6];
 309         int retval;
 310         int i;
 311
 312         /* clear device data */
 313         nand->device = NULL;
 314         nand->manufacturer = NULL;
 315
 316         /* clear device parameters */
 317         nand->bus_width = 0;
 318         nand->address_cycles = 0;
 319         nand->page_size = 0;
 320         nand->erase_size = 0;
 321
 322         /* initialize controller (device parameters are zero, use controller default) */
 323         if ((retval = nand->controller->init(nand) != ERROR_OK))
 324         {
 325                 switch (retval)
 326                 {
 327                         case ERROR_NAND_OPERATION_FAILED:
 328                                 LOG_DEBUG("controller initialization failed");
 329                                 return ERROR_NAND_OPERATION_FAILED;
 330                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 331                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 332                                 return ERROR_NAND_OPERATION_FAILED;
 333                         default:
 334                                 LOG_ERROR("BUG: unknown controller initialization failure");
 335                                 return ERROR_NAND_OPERATION_FAILED;
 336                 }
 337         }
 338
 339         nand->controller->command(nand, NAND_CMD_RESET);
 340         nand->controller->reset(nand);
 341
 342         nand->controller->command(nand, NAND_CMD_READID);
 343         nand->controller->address(nand, 0x0);
 344
 345         if (nand->bus_width == 8)
 346         {
 347                 nand->controller->read_data(nand, &manufacturer_id);
 348                 nand->controller->read_data(nand, &device_id);
 349         }
 350         else
 351         {
 352                 uint16_t data_buf;
 353                 nand->controller->read_data(nand, &data_buf);
 354                 manufacturer_id = data_buf & 0xff;
 355                 nand->controller->read_data(nand, &data_buf);
 356                 device_id = data_buf & 0xff;
 357         }
 358
 359         for (i = 0; nand_flash_ids[i].name; i++)
 360         {
 361                 if (nand_flash_ids[i].id == device_id)
 362                 {
 363                         nand->device = &nand_flash_ids[i];
 364                         break;
 365                 }
 366         }
 367
 368         for (i = 0; nand_manuf_ids[i].name; i++)
 369         {
 370                 if (nand_manuf_ids[i].id == manufacturer_id)
 371                 {
 372                         nand->manufacturer = &nand_manuf_ids[i];
 373                         break;
 374                 }
 375         }
 376
 377         if (!nand->manufacturer)
 378         {
 379                 nand->manufacturer = &nand_manuf_ids[0];
 380                 nand->manufacturer->id = manufacturer_id;
 381         }
 382
 383         if (!nand->device)
 384         {
 385                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 386                         manufacturer_id, device_id);
 387                 return ERROR_NAND_OPERATION_FAILED;
 388         }
 389
 390         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 391
 392         /* initialize device parameters */
 393
 394         /* bus width */
 395         if (nand->device->options & NAND_BUSWIDTH_16)
 396                 nand->bus_width = 16;
 397         else
 398                 nand->bus_width = 8;
 399
 400         /* Do we need extended device probe information? */
 401         if (nand->device->page_size == 0 ||
 402             nand->device->erase_size == 0)
 403         {
 404                 if (nand->bus_width == 8)
 405                 {
 406                         nand->controller->read_data(nand, id_buff + 3);
 407                         nand->controller->read_data(nand, id_buff + 4);
 408                         nand->controller->read_data(nand, id_buff + 5);
 409                 }
 410                 else
 411                 {
 412                         uint16_t data_buf;
 413
 414                         nand->controller->read_data(nand, &data_buf);
 415                         id_buff[3] = data_buf;
 416
 417                         nand->controller->read_data(nand, &data_buf);
 418                         id_buff[4] = data_buf;
 419
 420                         nand->controller->read_data(nand, &data_buf);
 421                         id_buff[5] = data_buf >> 8;
 422                 }
 423         }
 424
 425         /* page size */
 426         if (nand->device->page_size == 0)
 427         {
 428                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 429         }
 430         else if (nand->device->page_size == 256)
 431         {
 432                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 433                 return ERROR_NAND_OPERATION_FAILED;
 434         }
 435         else
 436         {
 437                 nand->page_size = nand->device->page_size;
 438         }
 439
 440         /* number of address cycles */
 441         if (nand->page_size <= 512)
 442         {
 443                 /* small page devices */
 444                 if (nand->device->chip_size <= 32)
 445                         nand->address_cycles = 3;
 446                 else if (nand->device->chip_size <= 8*1024)
 447                         nand->address_cycles = 4;
 448                 else
 449                 {
 450                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 451                         nand->address_cycles = 5;
 452                 }
 453         }
 454         else
 455         {
 456                 /* large page devices */
 457                 if (nand->device->chip_size <= 128)
 458                         nand->address_cycles = 4;
 459                 else if (nand->device->chip_size <= 32*1024)
 460                         nand->address_cycles = 5;
 461                 else
 462                 {
 463                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 464                         nand->address_cycles = 6;
 465                 }
 466         }
 467
 468         /* erase size */
 469         if (nand->device->erase_size == 0)
 470         {
 471                 switch ((id_buff[4] >> 4) & 3) {
 472                 case 0:
 473                         nand->erase_size = 64 << 10;
 474                         break;
 475                 case 1:
 476                         nand->erase_size = 128 << 10;
 477                         break;
 478                 case 2:
 479                         nand->erase_size = 256 << 10;
 480                         break;
 481                 case 3:
 482                         nand->erase_size =512 << 10;
 483                         break;
 484                 }
 485         }
 486         else
 487         {
 488                 nand->erase_size = nand->device->erase_size;
 489         }
 490
 491         /* initialize controller, but leave parameters at the controllers default */
 492         if ((retval = nand->controller->init(nand) != ERROR_OK))
 493         {
 494                 switch (retval)
 495                 {
 496                         case ERROR_NAND_OPERATION_FAILED:
 497                                 LOG_DEBUG("controller initialization failed");
 498                                 return ERROR_NAND_OPERATION_FAILED;
 499                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 500                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 501                                         nand->bus_width, nand->address_cycles, nand->page_size);
 502                                 return ERROR_NAND_OPERATION_FAILED;
 503                         default:
 504                                 LOG_ERROR("BUG: unknown controller initialization failure");
 505                                 return ERROR_NAND_OPERATION_FAILED;
 506                 }
 507         }
 508
 509         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 510         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 511
 512         for (i = 0; i < nand->num_blocks; i++)
 513         {
 514                 nand->blocks[i].size = nand->erase_size;
 515                 nand->blocks[i].offset = i * nand->erase_size;
 516                 nand->blocks[i].is_erased = -1;
 517                 nand->blocks[i].is_bad = -1;
 518         }
 519
 520         return ERROR_OK;
 521 }
 522
 523 int nand_erase(struct nand_device *nand, int first_block, int last_block)
 524 {
 525         int i;
 526         uint32_t page;
 527         uint8_t status;
 528         int retval;
 529
 530         if (!nand->device)
 531                 return ERROR_NAND_DEVICE_NOT_PROBED;
 532
 533         if ((first_block < 0) || (last_block >= nand->num_blocks))
 534                 return ERROR_INVALID_ARGUMENTS;
 535
 536         /* make sure we know if a block is bad before erasing it */
 537         for (i = first_block; i <= last_block; i++)
 538         {
 539                 if (nand->blocks[i].is_bad == -1)
 540                 {
 541                         nand_build_bbt(nand, i, last_block);
 542                         break;
 543                 }
 544         }
 545
 546         for (i = first_block; i <= last_block; i++)
 547         {
 548                 /* Send erase setup command */
 549                 nand->controller->command(nand, NAND_CMD_ERASE1);
 550
 551                 page = i * (nand->erase_size / nand->page_size);
 552
 553                 /* Send page address */
 554                 if (nand->page_size <= 512)
 555                 {
 556                         /* row */
 557                         nand->controller->address(nand, page & 0xff);
 558                         nand->controller->address(nand, (page >> 8) & 0xff);
 559
 560                         /* 3rd cycle only on devices with more than 32 MiB */
 561                         if (nand->address_cycles >= 4)
 562                                 nand->controller->address(nand, (page >> 16) & 0xff);
 563
 564                         /* 4th cycle only on devices with more than 8 GiB */
 565                         if (nand->address_cycles >= 5)
 566                                 nand->controller->address(nand, (page >> 24) & 0xff);
 567                 }
 568                 else
 569                 {
 570                         /* row */
 571                         nand->controller->address(nand, page & 0xff);
 572                         nand->controller->address(nand, (page >> 8) & 0xff);
 573
 574                         /* 3rd cycle only on devices with more than 128 MiB */
 575                         if (nand->address_cycles >= 5)
 576                                 nand->controller->address(nand, (page >> 16) & 0xff);
 577                 }
 578
 579                 /* Send erase confirm command */
 580                 nand->controller->command(nand, NAND_CMD_ERASE2);
 581
 582                 retval = nand->controller->nand_ready ?
 583                                 nand->controller->nand_ready(nand, 1000) :
 584                                 nand_poll_ready(nand, 1000);
 585                 if (!retval) {
 586                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 587                         return ERROR_NAND_OPERATION_TIMEOUT;
 588                 }
 589
 590                 if ((retval = nand_read_status(nand, &status)) != ERROR_OK)
 591                 {
 592                         LOG_ERROR("couldn't read status");
 593                         return ERROR_NAND_OPERATION_FAILED;
 594                 }
 595
 596                 if (status & 0x1)
 597                 {
 598                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 599                                         (nand->blocks[i].is_bad == 1)
 600                                                 ? "bad " : "",
 601                                         i, status);
 602                         /* continue; other blocks might still be erasable */
 603                 }
 604
 605                 nand->blocks[i].is_erased = 1;
 606         }
 607
 608         return ERROR_OK;
 609 }
 610
 611 #if 0
 612 static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 613 {
 614         uint8_t *page;
 615
 616         if (!nand->device)
 617                 return ERROR_NAND_DEVICE_NOT_PROBED;
 618
 619         if (address % nand->page_size)
 620         {
 621                 LOG_ERROR("reads need to be page aligned");
 622                 return ERROR_NAND_OPERATION_FAILED;
 623         }
 624
 625         page = malloc(nand->page_size);
 626
 627         while (data_size > 0)
 628         {
 629                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 630                 uint32_t page_address;
 631
 632
 633                 page_address = address / nand->page_size;
 634
 635                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 636
 637                 memcpy(data, page, thisrun_size);
 638
 639                 address += thisrun_size;
 640                 data += thisrun_size;
 641                 data_size -= thisrun_size;
 642         }
 643
 644         free(page);
 645
 646         return ERROR_OK;
 647 }
 648
 649 static int nand_write_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size)
 650 {
 651         uint8_t *page;
 652
 653         if (!nand->device)
 654                 return ERROR_NAND_DEVICE_NOT_PROBED;
 655
 656         if (address % nand->page_size)
 657         {
 658                 LOG_ERROR("writes need to be page aligned");
 659                 return ERROR_NAND_OPERATION_FAILED;
 660         }
 661
 662         page = malloc(nand->page_size);
 663
 664         while (data_size > 0)
 665         {
 666                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 667                 uint32_t page_address;
 668
 669                 memset(page, 0xff, nand->page_size);
 670                 memcpy(page, data, thisrun_size);
 671
 672                 page_address = address / nand->page_size;
 673
 674                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 675
 676                 address += thisrun_size;
 677                 data += thisrun_size;
 678                 data_size -= thisrun_size;
 679         }
 680
 681         free(page);
 682
 683         return ERROR_OK;
 684 }
 685 #endif
 686
 687 int nand_write_page(struct nand_device *nand, uint32_t page,
 688                 uint8_t *data, uint32_t data_size,
 689                 uint8_t *oob, uint32_t oob_size)
 690 {
 691         uint32_t block;
 692
 693         if (!nand->device)
 694                 return ERROR_NAND_DEVICE_NOT_PROBED;
 695
 696         block = page / (nand->erase_size / nand->page_size);
 697         if (nand->blocks[block].is_erased == 1)
 698                 nand->blocks[block].is_erased = 0;
 699
 700         if (nand->use_raw || nand->controller->write_page == NULL)
 701                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 702         else
 703                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 704 }
 705
 706 int nand_read_page(struct nand_device *nand, uint32_t page,
 707                 uint8_t *data, uint32_t data_size,
 708                 uint8_t *oob, uint32_t oob_size)
 709 {
 710         if (!nand->device)
 711                 return ERROR_NAND_DEVICE_NOT_PROBED;
 712
 713         if (nand->use_raw || nand->controller->read_page == NULL)
 714                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 715         else
 716                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 717 }
 718
 719 int nand_page_command(struct nand_device *nand, uint32_t page,
 720                 uint8_t cmd, bool oob_only)
 721 {
 722         if (!nand->device)
 723                 return ERROR_NAND_DEVICE_NOT_PROBED;
 724
 725         if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
 726                 cmd = NAND_CMD_READOOB;
 727
 728         nand->controller->command(nand, cmd);
 729
 730         if (nand->page_size <= 512) {
 731                 /* small page device */
 732
 733                 /* column (always 0, we start at the beginning of a page/OOB area) */
 734                 nand->controller->address(nand, 0x0);
 735
 736                 /* row */
 737                 nand->controller->address(nand, page & 0xff);
 738                 nand->controller->address(nand, (page >> 8) & 0xff);
 739
 740                 /* 4th cycle only on devices with more than 32 MiB */
 741                 if (nand->address_cycles >= 4)
 742                         nand->controller->address(nand, (page >> 16) & 0xff);
 743
 744                 /* 5th cycle only on devices with more than 8 GiB */
 745                 if (nand->address_cycles >= 5)
 746                         nand->controller->address(nand, (page >> 24) & 0xff);
 747         } else {
 748                 /* large page device */
 749
 750                 /* column (0 when we start at the beginning of a page,
 751                  * or 2048 for the beginning of OOB area)
 752                  */
 753                 nand->controller->address(nand, 0x0);
 754                 if (oob_only)
 755                         nand->controller->address(nand, 0x8);
 756                 else
 757                         nand->controller->address(nand, 0x0);
 758
 759                 /* row */
 760                 nand->controller->address(nand, page & 0xff);
 761                 nand->controller->address(nand, (page >> 8) & 0xff);
 762
 763                 /* 5th cycle only on devices with more than 128 MiB */
 764                 if (nand->address_cycles >= 5)
 765                         nand->controller->address(nand, (page >> 16) & 0xff);
 766
 767                 /* large page devices need a start command if reading */
 768                 if (NAND_CMD_READ0 == cmd)
 769                         nand->controller->command(nand, NAND_CMD_READSTART);
 770         }
 771
 772         if (nand->controller->nand_ready) {
 773                 if (!nand->controller->nand_ready(nand, 100))
 774                         return ERROR_NAND_OPERATION_TIMEOUT;
 775         } else {
 776                 alive_sleep(1);
 777         }
 778
 779         return ERROR_OK;
 780 }
 781
 782 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 783 {
 784         int retval = ERROR_NAND_NO_BUFFER;
 785
 786         if (nand->controller->read_block_data != NULL)
 787                 retval = (nand->controller->read_block_data)(nand, data, size);
 788
 789         if (ERROR_NAND_NO_BUFFER == retval) {
 790                 uint32_t i;
 791                 int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
 792
 793                 retval = ERROR_OK;
 794                 for (i = 0; retval == ERROR_OK && i < size; i += incr) {
 795                         retval = nand->controller->read_data(nand, data);
 796                         data += incr;
 797                 }
 798         }
 799
 800         return retval;
 801 }
 802
 803 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 804                 uint8_t *data, uint32_t data_size,
 805                 uint8_t *oob, uint32_t oob_size)
 806 {
 807         int retval;
 808
 809         retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
 810         if (ERROR_OK != retval)
 811                 return retval;
 812
 813         if (data)
 814                 nand_read_data_page(nand, data, data_size);
 815
 816         if (oob)
 817                 nand_read_data_page(nand, oob, oob_size);
 818
 819         return ERROR_OK;
 820 }
 821
 822 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 823 {
 824         int retval = ERROR_NAND_NO_BUFFER;
 825
 826         if (nand->controller->write_block_data != NULL)
 827                 retval = (nand->controller->write_block_data)(nand, data, size);
 828
 829         if (ERROR_NAND_NO_BUFFER == retval) {
 830                 bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
 831                 uint32_t incr = is16bit ? 2 : 1;
 832                 uint16_t write_data;
 833                 uint32_t i;
 834
 835                 for (i = 0; i < size; i += incr) {
 836                         if (is16bit)
 837                                 write_data = le_to_h_u16(data);
 838                         else
 839                                 write_data = *data;
 840
 841                         retval = nand->controller->write_data(nand, write_data);
 842                         if (ERROR_OK != retval)
 843                                 break;
 844
 845                         data += incr;
 846                 }
 847         }
 848
 849         return retval;
 850 }
 851
 852 int nand_write_finish(struct nand_device *nand)
 853 {
 854         int retval;
 855         uint8_t status;
 856
 857         nand->controller->command(nand, NAND_CMD_PAGEPROG);
 858
 859         retval = nand->controller->nand_ready ?
 860                         nand->controller->nand_ready(nand, 100) :
 861                         nand_poll_ready(nand, 100);
 862         if (!retval)
 863                 return ERROR_NAND_OPERATION_TIMEOUT;
 864
 865         retval = nand_read_status(nand, &status);
 866         if (ERROR_OK != retval) {
 867                 LOG_ERROR("couldn't read status");
 868                 return ERROR_NAND_OPERATION_FAILED;
 869         }
 870
 871         if (status & NAND_STATUS_FAIL) {
 872                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
 873                                 status);
 874                 return ERROR_NAND_OPERATION_FAILED;
 875         }
 876
 877         return ERROR_OK;
 878 }
 879
 880 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 881                 uint8_t *data, uint32_t data_size,
 882                 uint8_t *oob, uint32_t oob_size)
 883 {
 884         int retval;
 885
 886         retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
 887         if (ERROR_OK != retval)
 888                 return retval;
 889
 890         if (data) {
 891                 retval = nand_write_data_page(nand, data, data_size);
 892                 if (ERROR_OK != retval) {
 893                         LOG_ERROR("Unable to write data to NAND device");
 894                         return retval;
 895                 }
 896         }
 897
 898         if (oob) {
 899                 retval = nand_write_data_page(nand, oob, oob_size);
 900                 if (ERROR_OK != retval) {
 901                         LOG_ERROR("Unable to write OOB data to NAND device");
 902                         return retval;
 903                 }
 904         }
 905
 906         return nand_write_finish(nand);
 907 }
 908