1 /***************************************************************************
2 * Copyright (C) 2010 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
22 * NAND controller interface for Nuvoton NUC910
32 #include <target/arm.h>
34 struct nuc910_nand_controller
36 struct target *target;
37 struct arm_nand_data io;
40 static int validate_target_state(struct nand_device *nand)
42 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
43 struct target *target = nuc910_nand->target;
45 if (target->state != TARGET_HALTED) {
46 LOG_ERROR("Target not halted");
47 return ERROR_NAND_OPERATION_FAILED;
53 static int nuc910_nand_command(struct nand_device *nand, uint8_t command)
55 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
56 struct target *target = nuc910_nand->target;
59 if ((result = validate_target_state(nand)) != ERROR_OK)
62 target_write_u8(target, NUC910_SMCMD, command);
66 static int nuc910_nand_address(struct nand_device *nand, uint8_t address)
68 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
69 struct target *target = nuc910_nand->target;
72 if ((result = validate_target_state(nand)) != ERROR_OK)
75 target_write_u32(target, NUC910_SMADDR, ((address & 0xff) | NUC910_SMADDR_EOA));
79 static int nuc910_nand_read(struct nand_device *nand, void *data)
81 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
82 struct target *target = nuc910_nand->target;
85 if ((result = validate_target_state(nand)) != ERROR_OK)
88 target_read_u8(target, NUC910_SMDATA, data);
92 static int nuc910_nand_write(struct nand_device *nand, uint16_t data)
94 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
95 struct target *target = nuc910_nand->target;
98 if ((result = validate_target_state(nand)) != ERROR_OK)
101 target_write_u8(target, NUC910_SMDATA, data);
105 static int nuc910_nand_read_block_data(struct nand_device *nand,
106 uint8_t *data, int data_size)
108 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
111 if ((result = validate_target_state(nand)) != ERROR_OK)
114 nuc910_nand->io.chunk_size = nand->page_size;
116 /* try the fast way first */
117 result = arm_nandread(&nuc910_nand->io, data, data_size);
118 if (result != ERROR_NAND_NO_BUFFER)
121 /* else do it slowly */
123 nuc910_nand_read(nand, data++);
128 static int nuc910_nand_write_block_data(struct nand_device *nand,
129 uint8_t *data, int data_size)
131 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
134 if ((result = validate_target_state(nand)) != ERROR_OK)
137 nuc910_nand->io.chunk_size = nand->page_size;
139 /* try the fast way first */
140 result = arm_nandwrite(&nuc910_nand->io, data, data_size);
141 if (result != ERROR_NAND_NO_BUFFER)
144 /* else do it slowly */
146 nuc910_nand_write(nand, *data++);
151 static int nuc910_nand_reset(struct nand_device *nand)
153 return nuc910_nand_command(nand, NAND_CMD_RESET);
156 static int nuc910_nand_ready(struct nand_device *nand, int timeout)
158 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
159 struct target *target = nuc910_nand->target;
163 target_read_u32(target, NUC910_SMISR, &status);
164 if (status & NUC910_SMISR_RB_) {
168 } while (timeout-- > 0);
173 NAND_DEVICE_COMMAND_HANDLER(nuc910_nand_device_command)
175 struct nuc910_nand_controller *nuc910_nand;
177 nuc910_nand = calloc(1, sizeof(struct nuc910_nand_controller));
179 LOG_ERROR("no memory for nand controller\n");
180 return ERROR_NAND_DEVICE_INVALID;
183 nand->controller_priv = nuc910_nand;
184 nuc910_nand->target = get_target(CMD_ARGV[1]);
185 if (!nuc910_nand->target) {
186 LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
188 return ERROR_NAND_DEVICE_INVALID;
194 static int nuc910_nand_init(struct nand_device *nand)
196 struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
197 struct target *target = nuc910_nand->target;
198 int bus_width = nand->bus_width ? : 8;
201 if ((result = validate_target_state(nand)) != ERROR_OK)
204 /* nuc910 only supports 8bit */
207 LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
208 return ERROR_NAND_OPERATION_NOT_SUPPORTED;
211 /* inform calling code about selected bus width */
212 nand->bus_width = bus_width;
214 nuc910_nand->io.target = target;
215 nuc910_nand->io.data = NUC910_SMDATA;
216 nuc910_nand->io.op = ARM_NAND_NONE;
218 /* configure nand controller */
219 target_write_u32(target, NUC910_FMICSR, NUC910_FMICSR_SM_EN);
220 target_write_u32(target, NUC910_SMCSR, 0x010000a8); /* 2048 page size */
221 target_write_u32(target, NUC910_SMTCR, 0x00010204);
222 target_write_u32(target, NUC910_SMIER, 0x00000000);
227 struct nand_flash_controller nuc910_nand_controller =
230 .command = nuc910_nand_command,
231 .address = nuc910_nand_address,
232 .read_data = nuc910_nand_read,
233 .write_data = nuc910_nand_write,
234 .write_block_data = nuc910_nand_write_block_data,
235 .read_block_data = nuc910_nand_read_block_data,
236 .nand_ready = nuc910_nand_ready,
237 .reset = nuc910_nand_reset,
238 .nand_device_command = nuc910_nand_device_command,
239 .init = nuc910_nand_init,