git.sur5r.net Git - openocd/blob - src/flash/nand/s3c2440.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18
  19 /*
  20  * S3C2440 OpenOCD NAND Flash controller support.
  21  *
  22  * Many thanks to Simtec Electronics for sponsoring this work.
  23  */
  24
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "s3c24xx.h"
  30
  31 NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
  32 {
  33         struct s3c24xx_nand_controller *info;
  34         CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
  35
  36         /* fill in the address fields for the core device */
  37         info->cmd = S3C2440_NFCMD;
  38         info->addr = S3C2440_NFADDR;
  39         info->data = S3C2440_NFDATA;
  40         info->nfstat = S3C2440_NFSTAT;
  41
  42         return ERROR_OK;
  43 }
  44
  45 static int s3c2440_init(struct nand_device *nand)
  46 {
  47         struct target *target = nand->target;
  48
  49         target_write_u32(target, S3C2410_NFCONF,
  50                          S3C2440_NFCONF_TACLS(3) |
  51                          S3C2440_NFCONF_TWRPH0(7) |
  52                          S3C2440_NFCONF_TWRPH1(7));
  53
  54         target_write_u32(target, S3C2440_NFCONT,
  55                          S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
  56
  57         return ERROR_OK;
  58 }
  59
  60 int s3c2440_nand_ready(struct nand_device *nand, int timeout)
  61 {
  62         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  63         struct target *target = nand->target;
  64         uint8_t status;
  65
  66         if (target->state != TARGET_HALTED) {
  67                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  68                 return ERROR_NAND_OPERATION_FAILED;
  69         }
  70
  71         do {
  72                 target_read_u8(target, s3c24xx_info->nfstat, &status);
  73
  74                 if (status & S3C2440_NFSTAT_READY)
  75                         return 1;
  76
  77                 alive_sleep(1);
  78         } while (timeout-- > 0);
  79
  80
  81         return 0;
  82 }
  83
  84 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
  85
  86 int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_size)
  87 {
  88         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  89         struct target *target = nand->target;
  90         uint32_t nfdata = s3c24xx_info->data;
  91         uint32_t tmp;
  92
  93         LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
  94
  95         if (target->state != TARGET_HALTED) {
  96                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  97                 return ERROR_NAND_OPERATION_FAILED;
  98         }
  99
 100         while (data_size >= 4) {
 101                 target_read_u32(target, nfdata, &tmp);
 102
 103                 data[0] = tmp;
 104                 data[1] = tmp >> 8;
 105                 data[2] = tmp >> 16;
 106                 data[3] = tmp >> 24;
 107
 108                 data_size -= 4;
 109                 data += 4;
 110         }
 111
 112         while (data_size > 0) {
 113                 target_read_u8(target, nfdata, data);
 114
 115                 data_size -= 1;
 116                 data += 1;
 117         }
 118
 119         return ERROR_OK;
 120 }
 121
 122 int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_size)
 123 {
 124         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
 125         struct target *target = nand->target;
 126         uint32_t nfdata = s3c24xx_info->data;
 127         uint32_t tmp;
 128
 129         if (target->state != TARGET_HALTED) {
 130                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 131                 return ERROR_NAND_OPERATION_FAILED;
 132         }
 133
 134         while (data_size >= 4) {
 135                 tmp = le_to_h_u32(data);
 136                 target_write_u32(target, nfdata, tmp);
 137
 138                 data_size -= 4;
 139                 data += 4;
 140         }
 141
 142         while (data_size > 0) {
 143                 target_write_u8(target, nfdata, *data);
 144
 145                 data_size -= 1;
 146                 data += 1;
 147         }
 148
 149         return ERROR_OK;
 150 }
 151
 152 struct nand_flash_controller s3c2440_nand_controller = {
 153         .name = "s3c2440",
 154         .nand_device_command = &s3c2440_nand_device_command,
 155         .init = &s3c2440_init,
 156         .reset = &s3c24xx_reset,
 157         .command = &s3c24xx_command,
 158         .address = &s3c24xx_address,
 159         .write_data = &s3c24xx_write_data,
 160         .read_data = &s3c24xx_read_data,
 161         .write_page = s3c24xx_write_page,
 162         .read_page = s3c24xx_read_page,
 163         .write_block_data = &s3c2440_write_block_data,
 164         .read_block_data = &s3c2440_read_block_data,
 165         .nand_ready = &s3c2440_nand_ready,
 166 };