git.sur5r.net Git - openocd/blob - src/flash/nand/s3c24xx.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C24XX Series OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx.h"
  32
  33
  34 S3C24XX_DEVICE_COMMAND()
  35 {
  36         *info = NULL;
  37
  38         struct s3c24xx_nand_controller *s3c24xx_info;
  39         s3c24xx_info = malloc(sizeof(struct s3c24xx_nand_controller));
  40         if (s3c24xx_info == NULL) {
  41                 LOG_ERROR("no memory for nand controller\n");
  42                 return -ENOMEM;
  43         }
  44
  45         nand->controller_priv = s3c24xx_info;
  46
  47         s3c24xx_info->target = get_target(CMD_ARGV[1]);
  48         if (s3c24xx_info->target == NULL) {
  49                 LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
  50                 return ERROR_COMMAND_SYNTAX_ERROR;
  51         }
  52
  53         *info = s3c24xx_info;
  54
  55         return ERROR_OK;
  56 }
  57
  58 int s3c24xx_reset(struct nand_device *nand)
  59 {
  60         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  61         struct target *target = s3c24xx_info->target;
  62
  63         if (target->state != TARGET_HALTED) {
  64                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  65                 return ERROR_NAND_OPERATION_FAILED;
  66         }
  67
  68         target_write_u32(target, s3c24xx_info->cmd, 0xff);
  69
  70         return ERROR_OK;
  71 }
  72
  73 int s3c24xx_command(struct nand_device *nand, uint8_t command)
  74 {
  75         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  76         struct target *target = s3c24xx_info->target;
  77
  78         if (target->state != TARGET_HALTED) {
  79                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  80                 return ERROR_NAND_OPERATION_FAILED;
  81         }
  82
  83         target_write_u16(target, s3c24xx_info->cmd, command);
  84         return ERROR_OK;
  85 }
  86
  87
  88 int s3c24xx_address(struct nand_device *nand, uint8_t address)
  89 {
  90         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
  91         struct target *target = s3c24xx_info->target;
  92
  93         if (target->state != TARGET_HALTED) {
  94                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  95                 return ERROR_NAND_OPERATION_FAILED;
  96         }
  97
  98         target_write_u16(target, s3c24xx_info->addr, address);
  99         return ERROR_OK;
 100 }
 101
 102 int s3c24xx_write_data(struct nand_device *nand, uint16_t data)
 103 {
 104         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
 105         struct target *target = s3c24xx_info->target;
 106
 107         if (target->state != TARGET_HALTED) {
 108                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 109                 return ERROR_NAND_OPERATION_FAILED;
 110         }
 111
 112         target_write_u8(target, s3c24xx_info->data, data);
 113         return ERROR_OK;
 114 }
 115
 116 int s3c24xx_read_data(struct nand_device *nand, void *data)
 117 {
 118         struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
 119         struct target *target = s3c24xx_info->target;
 120
 121         if (target->state != TARGET_HALTED) {
 122                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 123                 return ERROR_NAND_OPERATION_FAILED;
 124         }
 125
 126         target_read_u8(target, s3c24xx_info->data, data);
 127         return ERROR_OK;
 128 }