git.sur5r.net Git - openocd/blob - src/flash/nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   6  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program; if not, write to the                         *
  20  *   Free Software Foundation, Inc.,                                       *
  21  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  22  ***************************************************************************/
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "nand.h"
  28 #include "time_support.h"
  29 #include "fileio.h"
  30
  31 #include <inttypes.h>
  32
  33
  34 static int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  35 static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  36 static int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  37 static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  38 static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  39 static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  40 static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  41 static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  42
  43 static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  44
  45 static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  46 //static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
  47
  48 static int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  49
  50 /* NAND flash controller
  51  */
  52 extern nand_flash_controller_t lpc3180_nand_controller;
  53 extern nand_flash_controller_t orion_nand_controller;
  54 extern nand_flash_controller_t s3c2410_nand_controller;
  55 extern nand_flash_controller_t s3c2412_nand_controller;
  56 extern nand_flash_controller_t s3c2440_nand_controller;
  57 extern nand_flash_controller_t s3c2443_nand_controller;
  58
  59 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  60
  61 static nand_flash_controller_t *nand_flash_controllers[] =
  62 {
  63         &lpc3180_nand_controller,
  64         &orion_nand_controller,
  65         &s3c2410_nand_controller,
  66         &s3c2412_nand_controller,
  67         &s3c2440_nand_controller,
  68         &s3c2443_nand_controller,
  69 /*      &boundary_scan_nand_controller, */
  70         NULL
  71 };
  72
  73 /* configured NAND devices and NAND Flash command handler */
  74 static nand_device_t *nand_devices = NULL;
  75 static command_t *nand_cmd;
  76
  77 /*      Chip ID list
  78  *
  79  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  80  *      options
  81  *
  82  *      Pagesize; 0, 256, 512
  83  *      0       get this information from the extended chip ID
  84  *      256     256 Byte page size
  85  *      512     512 Byte page size
  86  */
  87 static nand_info_t nand_flash_ids[] =
  88 {
  89         /* start "museum" IDs */
  90         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  91         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  92         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  93         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  94         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  95         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  96         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  97         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
  98         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
  99         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 100
 101         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 102         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 103         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 104         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 105         /* end "museum" IDs */
 106
 107         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 108         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 109         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 110         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 111
 112         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 113         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 114         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 115         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 116
 117         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 118         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 119         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 120         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 121
 122         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 123         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 124         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 125         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 126         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 127         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 128         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 129
 130         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 131
 132         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 133         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 134         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 135         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 136
 137         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 138         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 139         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 140         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 141
 142         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 143         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 144         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 145         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 146
 147         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 148         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 149         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 150         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 151
 152         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 153         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 154         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 155         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 156
 157         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 158         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 159         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 160         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 161
 162         {NULL, 0, 0, 0, 0, 0 }
 163 };
 164
 165 /* Manufacturer ID list
 166  */
 167 static nand_manufacturer_t nand_manuf_ids[] =
 168 {
 169         {0x0, "unknown"},
 170         {NAND_MFR_TOSHIBA, "Toshiba"},
 171         {NAND_MFR_SAMSUNG, "Samsung"},
 172         {NAND_MFR_FUJITSU, "Fujitsu"},
 173         {NAND_MFR_NATIONAL, "National"},
 174         {NAND_MFR_RENESAS, "Renesas"},
 175         {NAND_MFR_STMICRO, "ST Micro"},
 176         {NAND_MFR_HYNIX, "Hynix"},
 177         {NAND_MFR_MICRON, "Micron"},
 178         {0x0, NULL},
 179 };
 180
 181 /*
 182  * Define default oob placement schemes for large and small page devices
 183  */
 184
 185 #if 0
 186 static nand_ecclayout_t nand_oob_8 = {
 187         .eccbytes = 3,
 188         .eccpos = {0, 1, 2},
 189         .oobfree = {
 190                 {.offset = 3,
 191                  .length = 2},
 192                 {.offset = 6,
 193                  .length = 2}}
 194 };
 195 #endif
 196
 197 static nand_ecclayout_t nand_oob_16 = {
 198         .eccbytes = 6,
 199         .eccpos = {0, 1, 2, 3, 6, 7},
 200         .oobfree = {
 201                 {.offset = 8,
 202                  . length = 8}}
 203 };
 204
 205 static nand_ecclayout_t nand_oob_64 = {
 206         .eccbytes = 24,
 207         .eccpos = {
 208                    40, 41, 42, 43, 44, 45, 46, 47,
 209                    48, 49, 50, 51, 52, 53, 54, 55,
 210                    56, 57, 58, 59, 60, 61, 62, 63},
 211         .oobfree = {
 212                 {.offset = 2,
 213                  .length = 38}}
 214 };
 215
 216 /* nand device <nand_controller> [controller options]
 217  */
 218 static int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 219 {
 220         int i;
 221         int retval;
 222
 223         if (argc < 1)
 224         {
 225                 LOG_WARNING("incomplete flash device nand configuration");
 226                 return ERROR_FLASH_BANK_INVALID;
 227         }
 228
 229         for (i = 0; nand_flash_controllers[i]; i++)
 230         {
 231                 nand_device_t *p, *c;
 232
 233                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 234                 {
 235                         /* register flash specific commands */
 236                         if ((retval = nand_flash_controllers[i]->register_commands(cmd_ctx)) != ERROR_OK)
 237                         {
 238                                 LOG_ERROR("couldn't register '%s' commands", args[0]);
 239                                 return retval;
 240                         }
 241
 242                         c = malloc(sizeof(nand_device_t));
 243
 244                         c->controller = nand_flash_controllers[i];
 245                         c->controller_priv = NULL;
 246                         c->manufacturer = NULL;
 247                         c->device = NULL;
 248                         c->bus_width = 0;
 249                         c->address_cycles = 0;
 250                         c->page_size = 0;
 251                         c->use_raw = 0;
 252                         c->next = NULL;
 253
 254                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 255                         {
 256                                 LOG_ERROR("'%s' driver rejected nand flash", c->controller->name);
 257                                 free(c);
 258                                 return ERROR_OK;
 259                         }
 260
 261                         /* put NAND device in linked list */
 262                         if (nand_devices)
 263                         {
 264                                 /* find last flash device */
 265                                 for (p = nand_devices; p && p->next; p = p->next);
 266                                 if (p)
 267                                         p->next = c;
 268                         }
 269                         else
 270                         {
 271                                 nand_devices = c;
 272                         }
 273
 274                         return ERROR_OK;
 275                 }
 276         }
 277
 278         /* no valid NAND controller was found (i.e. the configuration option,
 279          * didn't match one of the compiled-in controllers)
 280          */
 281         LOG_ERROR("No valid NAND flash controller found (%s)", args[0]);
 282         LOG_ERROR("compiled-in NAND flash controllers:");
 283         for (i = 0; nand_flash_controllers[i]; i++)
 284         {
 285                 LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 286         }
 287
 288         return ERROR_OK;
 289 }
 290
 291 int nand_register_commands(struct command_context_s *cmd_ctx)
 292 {
 293         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, "NAND specific commands");
 294
 295         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 296
 297         return ERROR_OK;
 298 }
 299
 300 int nand_init(struct command_context_s *cmd_ctx)
 301 {
 302         if (nand_devices)
 303         {
 304                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 305                                                  "list configured NAND flash devices");
 306                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 307                                                  "print info about NAND flash device <num>");
 308                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 309                                                  "identify NAND flash device <num>");
 310                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 311                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
 312                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 313                                                  "erase blocks on NAND flash device <num> <first> <last>");
 314                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
 315                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
 316                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 317                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 318                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 319                                                  "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc]");
 320                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 321                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 322         }
 323
 324         return ERROR_OK;
 325 }
 326
 327 nand_device_t *get_nand_device_by_num(int num)
 328 {
 329         nand_device_t *p;
 330         int i = 0;
 331
 332         for (p = nand_devices; p; p = p->next)
 333         {
 334                 if (i++ == num)
 335                 {
 336                         return p;
 337                 }
 338         }
 339
 340         return NULL;
 341 }
 342
 343 static int nand_build_bbt(struct nand_device_s *device, int first, int last)
 344 {
 345         u32 page = 0x0;
 346         int i;
 347         u8 oob[6];
 348
 349         if ((first < 0) || (first >= device->num_blocks))
 350                 first = 0;
 351
 352         if ((last >= device->num_blocks) || (last == -1))
 353                 last = device->num_blocks - 1;
 354
 355         for (i = first; i < last; i++)
 356         {
 357                 nand_read_page(device, page, NULL, 0, oob, 6);
 358
 359                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 360                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 361                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 362                 {
 363                         LOG_WARNING("invalid block: %i", i);
 364                         device->blocks[i].is_bad = 1;
 365                 }
 366                 else
 367                 {
 368                         device->blocks[i].is_bad = 0;
 369                 }
 370
 371                 page += (device->erase_size / device->page_size);
 372         }
 373
 374         return ERROR_OK;
 375 }
 376
 377 int nand_read_status(struct nand_device_s *device, u8 *status)
 378 {
 379         if (!device->device)
 380                 return ERROR_NAND_DEVICE_NOT_PROBED;
 381
 382         /* Send read status command */
 383         device->controller->command(device, NAND_CMD_STATUS);
 384
 385         alive_sleep(1);
 386
 387         /* read status */
 388         if (device->device->options & NAND_BUSWIDTH_16)
 389         {
 390                 u16 data;
 391                 device->controller->read_data(device, &data);
 392                 *status = data & 0xff;
 393         }
 394         else
 395         {
 396                 device->controller->read_data(device, status);
 397         }
 398
 399         return ERROR_OK;
 400 }
 401
 402 static int nand_poll_ready(struct nand_device_s *device, int timeout)
 403 {
 404         u8 status;
 405
 406         device->controller->command(device, NAND_CMD_STATUS);
 407         do {
 408                 if (device->device->options & NAND_BUSWIDTH_16) {
 409                         u16 data;
 410                         device->controller->read_data(device, &data);
 411                         status = data & 0xff;
 412                 } else {
 413                         device->controller->read_data(device, &status);
 414                 }
 415                 if (status & NAND_STATUS_READY)
 416                         break;
 417                 alive_sleep(1);
 418         } while (timeout--);
 419
 420         return (status & NAND_STATUS_READY) != 0;
 421 }
 422
 423 int nand_probe(struct nand_device_s *device)
 424 {
 425         u8 manufacturer_id, device_id;
 426         u8 id_buff[6];
 427         int retval;
 428         int i;
 429
 430         /* clear device data */
 431         device->device = NULL;
 432         device->manufacturer = NULL;
 433
 434         /* clear device parameters */
 435         device->bus_width = 0;
 436         device->address_cycles = 0;
 437         device->page_size = 0;
 438         device->erase_size = 0;
 439
 440         /* initialize controller (device parameters are zero, use controller default) */
 441         if ((retval = device->controller->init(device) != ERROR_OK))
 442         {
 443                 switch (retval)
 444                 {
 445                         case ERROR_NAND_OPERATION_FAILED:
 446                                 LOG_DEBUG("controller initialization failed");
 447                                 return ERROR_NAND_OPERATION_FAILED;
 448                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 449                                 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
 450                                 return ERROR_NAND_OPERATION_FAILED;
 451                         default:
 452                                 LOG_ERROR("BUG: unknown controller initialization failure");
 453                                 return ERROR_NAND_OPERATION_FAILED;
 454                 }
 455         }
 456
 457         device->controller->command(device, NAND_CMD_RESET);
 458         device->controller->reset(device);
 459
 460         device->controller->command(device, NAND_CMD_READID);
 461         device->controller->address(device, 0x0);
 462
 463         if (device->bus_width == 8)
 464         {
 465                 device->controller->read_data(device, &manufacturer_id);
 466                 device->controller->read_data(device, &device_id);
 467         }
 468         else
 469         {
 470                 u16 data_buf;
 471                 device->controller->read_data(device, &data_buf);
 472                 manufacturer_id = data_buf & 0xff;
 473                 device->controller->read_data(device, &data_buf);
 474                 device_id = data_buf & 0xff;
 475         }
 476
 477         for (i = 0; nand_flash_ids[i].name; i++)
 478         {
 479                 if (nand_flash_ids[i].id == device_id)
 480                 {
 481                         device->device = &nand_flash_ids[i];
 482                         break;
 483                 }
 484         }
 485
 486         for (i = 0; nand_manuf_ids[i].name; i++)
 487         {
 488                 if (nand_manuf_ids[i].id == manufacturer_id)
 489                 {
 490                         device->manufacturer = &nand_manuf_ids[i];
 491                         break;
 492                 }
 493         }
 494
 495         if (!device->manufacturer)
 496         {
 497                 device->manufacturer = &nand_manuf_ids[0];
 498                 device->manufacturer->id = manufacturer_id;
 499         }
 500
 501         if (!device->device)
 502         {
 503                 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 504                         manufacturer_id, device_id);
 505                 return ERROR_NAND_OPERATION_FAILED;
 506         }
 507
 508         LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 509
 510         /* initialize device parameters */
 511
 512         /* bus width */
 513         if (device->device->options & NAND_BUSWIDTH_16)
 514                 device->bus_width = 16;
 515         else
 516                 device->bus_width = 8;
 517
 518         /* Do we need extended device probe information? */
 519         if (device->device->page_size == 0 ||
 520             device->device->erase_size == 0)
 521         {
 522                 if (device->bus_width == 8)
 523                 {
 524                         device->controller->read_data(device, id_buff+3);
 525                         device->controller->read_data(device, id_buff+4);
 526                         device->controller->read_data(device, id_buff+5);
 527                 }
 528                 else
 529                 {
 530                         u16 data_buf;
 531
 532                         device->controller->read_data(device, &data_buf);
 533                         id_buff[3] = data_buf;
 534
 535                         device->controller->read_data(device, &data_buf);
 536                         id_buff[4] = data_buf;
 537
 538                         device->controller->read_data(device, &data_buf);
 539                         id_buff[5] = data_buf >> 8;
 540                 }
 541         }
 542
 543         /* page size */
 544         if (device->device->page_size == 0)
 545         {
 546                 device->page_size = 1 << (10 + (id_buff[4] & 3));
 547         }
 548         else if (device->device->page_size == 256)
 549         {
 550                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 551                 return ERROR_NAND_OPERATION_FAILED;
 552         }
 553         else
 554         {
 555                 device->page_size = device->device->page_size;
 556         }
 557
 558         /* number of address cycles */
 559         if (device->page_size <= 512)
 560         {
 561                 /* small page devices */
 562                 if (device->device->chip_size <= 32)
 563                         device->address_cycles = 3;
 564                 else if (device->device->chip_size <= 8*1024)
 565                         device->address_cycles = 4;
 566                 else
 567                 {
 568                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 569                         device->address_cycles = 5;
 570                 }
 571         }
 572         else
 573         {
 574                 /* large page devices */
 575                 if (device->device->chip_size <= 128)
 576                         device->address_cycles = 4;
 577                 else if (device->device->chip_size <= 32*1024)
 578                         device->address_cycles = 5;
 579                 else
 580                 {
 581                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 582                         device->address_cycles = 6;
 583                 }
 584         }
 585
 586         /* erase size */
 587         if (device->device->erase_size == 0)
 588         {
 589                 switch ((id_buff[4] >> 4) & 3) {
 590                 case 0:
 591                         device->erase_size = 64 << 10;
 592                         break;
 593                 case 1:
 594                         device->erase_size = 128 << 10;
 595                         break;
 596                 case 2:
 597                         device->erase_size = 256 << 10;
 598                         break;
 599                 case 3:
 600                         device->erase_size =512 << 10;
 601                         break;
 602                 }
 603         }
 604         else
 605         {
 606                 device->erase_size = device->device->erase_size;
 607         }
 608
 609         /* initialize controller, but leave parameters at the controllers default */
 610         if ((retval = device->controller->init(device) != ERROR_OK))
 611         {
 612                 switch (retval)
 613                 {
 614                         case ERROR_NAND_OPERATION_FAILED:
 615                                 LOG_DEBUG("controller initialization failed");
 616                                 return ERROR_NAND_OPERATION_FAILED;
 617                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 618                                 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 619                                         device->bus_width, device->address_cycles, device->page_size);
 620                                 return ERROR_NAND_OPERATION_FAILED;
 621                         default:
 622                                 LOG_ERROR("BUG: unknown controller initialization failure");
 623                                 return ERROR_NAND_OPERATION_FAILED;
 624                 }
 625         }
 626
 627         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 628         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 629
 630         for (i = 0; i < device->num_blocks; i++)
 631         {
 632                 device->blocks[i].size = device->erase_size;
 633                 device->blocks[i].offset = i * device->erase_size;
 634                 device->blocks[i].is_erased = -1;
 635                 device->blocks[i].is_bad = -1;
 636         }
 637
 638         return ERROR_OK;
 639 }
 640
 641 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 642 {
 643         int i;
 644         u32 page;
 645         u8 status;
 646         int retval;
 647
 648         if (!device->device)
 649                 return ERROR_NAND_DEVICE_NOT_PROBED;
 650
 651         if ((first_block < 0) || (last_block > device->num_blocks))
 652                 return ERROR_INVALID_ARGUMENTS;
 653
 654         /* make sure we know if a block is bad before erasing it */
 655         for (i = first_block; i <= last_block; i++)
 656         {
 657                 if (device->blocks[i].is_bad == -1)
 658                 {
 659                         nand_build_bbt(device, i, last_block);
 660                         break;
 661                 }
 662         }
 663
 664         for (i = first_block; i <= last_block; i++)
 665         {
 666                 /* Send erase setup command */
 667                 device->controller->command(device, NAND_CMD_ERASE1);
 668
 669                 page = i * (device->erase_size / device->page_size);
 670
 671                 /* Send page address */
 672                 if (device->page_size <= 512)
 673                 {
 674                         /* row */
 675                         device->controller->address(device, page & 0xff);
 676                         device->controller->address(device, (page >> 8) & 0xff);
 677
 678                         /* 3rd cycle only on devices with more than 32 MiB */
 679                         if (device->address_cycles >= 4)
 680                                 device->controller->address(device, (page >> 16) & 0xff);
 681
 682                         /* 4th cycle only on devices with more than 8 GiB */
 683                         if (device->address_cycles >= 5)
 684                                 device->controller->address(device, (page >> 24) & 0xff);
 685                 }
 686                 else
 687                 {
 688                         /* row */
 689                         device->controller->address(device, page & 0xff);
 690                         device->controller->address(device, (page >> 8) & 0xff);
 691
 692                         /* 3rd cycle only on devices with more than 128 MiB */
 693                         if (device->address_cycles >= 5)
 694                                 device->controller->address(device, (page >> 16) & 0xff);
 695                 }
 696
 697                 /* Send erase confirm command */
 698                 device->controller->command(device, NAND_CMD_ERASE2);
 699
 700                 retval = device->controller->nand_ready ?
 701                                 device->controller->nand_ready(device, 1000) :
 702                                 nand_poll_ready(device, 1000);
 703                 if (!retval) {
 704                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 705                         return ERROR_NAND_OPERATION_TIMEOUT;
 706                 }
 707
 708                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 709                 {
 710                         LOG_ERROR("couldn't read status");
 711                         return ERROR_NAND_OPERATION_FAILED;
 712                 }
 713
 714                 if (status & 0x1)
 715                 {
 716                         LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status);
 717                         return ERROR_NAND_OPERATION_FAILED;
 718                 }
 719
 720                 device->blocks[i].is_erased = 1;
 721         }
 722
 723         return ERROR_OK;
 724 }
 725
 726 #if 0
 727 static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 728 {
 729         u8 *page;
 730
 731         if (!device->device)
 732                 return ERROR_NAND_DEVICE_NOT_PROBED;
 733
 734         if (address % device->page_size)
 735         {
 736                 LOG_ERROR("reads need to be page aligned");
 737                 return ERROR_NAND_OPERATION_FAILED;
 738         }
 739
 740         page = malloc(device->page_size);
 741
 742         while (data_size > 0 )
 743         {
 744                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 745                 u32 page_address;
 746
 747
 748                 page_address = address / device->page_size;
 749
 750                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 751
 752                 memcpy(data, page, thisrun_size);
 753
 754                 address += thisrun_size;
 755                 data += thisrun_size;
 756                 data_size -= thisrun_size;
 757         }
 758
 759         free(page);
 760
 761         return ERROR_OK;
 762 }
 763
 764 static int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 765 {
 766         u8 *page;
 767
 768         if (!device->device)
 769                 return ERROR_NAND_DEVICE_NOT_PROBED;
 770
 771         if (address % device->page_size)
 772         {
 773                 LOG_ERROR("writes need to be page aligned");
 774                 return ERROR_NAND_OPERATION_FAILED;
 775         }
 776
 777         page = malloc(device->page_size);
 778
 779         while (data_size > 0 )
 780         {
 781                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 782                 u32 page_address;
 783
 784                 memset(page, 0xff, device->page_size);
 785                 memcpy(page, data, thisrun_size);
 786
 787                 page_address = address / device->page_size;
 788
 789                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 790
 791                 address += thisrun_size;
 792                 data += thisrun_size;
 793                 data_size -= thisrun_size;
 794         }
 795
 796         free(page);
 797
 798         return ERROR_OK;
 799 }
 800 #endif
 801
 802 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 803 {
 804         u32 block;
 805
 806         if (!device->device)
 807                 return ERROR_NAND_DEVICE_NOT_PROBED;
 808
 809         block = page / (device->erase_size / device->page_size);
 810         if (device->blocks[block].is_erased == 1)
 811                 device->blocks[block].is_erased = 0;
 812
 813         if (device->use_raw || device->controller->write_page == NULL)
 814                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 815         else
 816                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 817 }
 818
 819 static int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 820 {
 821         if (!device->device)
 822                 return ERROR_NAND_DEVICE_NOT_PROBED;
 823
 824         if (device->use_raw || device->controller->read_page == NULL)
 825                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 826         else
 827                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 828 }
 829
 830 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 831 {
 832         u32 i;
 833
 834         if (!device->device)
 835                 return ERROR_NAND_DEVICE_NOT_PROBED;
 836
 837         if (device->page_size <= 512)
 838         {
 839                 /* small page device */
 840                 if (data)
 841                         device->controller->command(device, NAND_CMD_READ0);
 842                 else
 843                         device->controller->command(device, NAND_CMD_READOOB);
 844
 845                 /* column (always 0, we start at the beginning of a page/OOB area) */
 846                 device->controller->address(device, 0x0);
 847
 848                 /* row */
 849                 device->controller->address(device, page & 0xff);
 850                 device->controller->address(device, (page >> 8) & 0xff);
 851
 852                 /* 4th cycle only on devices with more than 32 MiB */
 853                 if (device->address_cycles >= 4)
 854                         device->controller->address(device, (page >> 16) & 0xff);
 855
 856                 /* 5th cycle only on devices with more than 8 GiB */
 857                 if (device->address_cycles >= 5)
 858                         device->controller->address(device, (page >> 24) & 0xff);
 859         }
 860         else
 861         {
 862                 /* large page device */
 863                 device->controller->command(device, NAND_CMD_READ0);
 864
 865                 /* column (0 when we start at the beginning of a page,
 866                  * or 2048 for the beginning of OOB area)
 867                  */
 868                 device->controller->address(device, 0x0);
 869                 if (data)
 870                         device->controller->address(device, 0x0);
 871                 else
 872                         device->controller->address(device, 0x8);
 873
 874                 /* row */
 875                 device->controller->address(device, page & 0xff);
 876                 device->controller->address(device, (page >> 8) & 0xff);
 877
 878                 /* 5th cycle only on devices with more than 128 MiB */
 879                 if (device->address_cycles >= 5)
 880                         device->controller->address(device, (page >> 16) & 0xff);
 881
 882                 /* large page devices need a start command */
 883                 device->controller->command(device, NAND_CMD_READSTART);
 884         }
 885
 886         if (device->controller->nand_ready) {
 887                 if (!device->controller->nand_ready(device, 100))
 888                         return ERROR_NAND_OPERATION_TIMEOUT;
 889         } else {
 890                 alive_sleep(1);
 891         }
 892
 893         if (data)
 894         {
 895                 if (device->controller->read_block_data != NULL)
 896                         (device->controller->read_block_data)(device, data, data_size);
 897                 else
 898                 {
 899                         for (i = 0; i < data_size;)
 900                         {
 901                                 if (device->device->options & NAND_BUSWIDTH_16)
 902                                 {
 903                                         device->controller->read_data(device, data);
 904                                         data += 2;
 905                                         i += 2;
 906                                 }
 907                                 else
 908                                 {
 909                                         device->controller->read_data(device, data);
 910                                         data += 1;
 911                                         i += 1;
 912                                 }
 913                         }
 914                 }
 915         }
 916
 917         if (oob)
 918         {
 919                 if (device->controller->read_block_data != NULL)
 920                         (device->controller->read_block_data)(device, oob, oob_size);
 921                 else
 922                 {
 923                         for (i = 0; i < oob_size;)
 924                         {
 925                                 if (device->device->options & NAND_BUSWIDTH_16)
 926                                 {
 927                                         device->controller->read_data(device, oob);
 928                                         oob += 2;
 929                                         i += 2;
 930                                 }
 931                                 else
 932                                 {
 933                                         device->controller->read_data(device, oob);
 934                                         oob += 1;
 935                                         i += 1;
 936                                 }
 937                         }
 938                 }
 939         }
 940
 941         return ERROR_OK;
 942 }
 943
 944 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 945 {
 946         u32 i;
 947         int retval;
 948         u8 status;
 949
 950         if (!device->device)
 951                 return ERROR_NAND_DEVICE_NOT_PROBED;
 952
 953         device->controller->command(device, NAND_CMD_SEQIN);
 954
 955         if (device->page_size <= 512)
 956         {
 957                 /* column (always 0, we start at the beginning of a page/OOB area) */
 958                 device->controller->address(device, 0x0);
 959
 960                 /* row */
 961                 device->controller->address(device, page & 0xff);
 962                 device->controller->address(device, (page >> 8) & 0xff);
 963
 964                 /* 4th cycle only on devices with more than 32 MiB */
 965                 if (device->address_cycles >= 4)
 966                         device->controller->address(device, (page >> 16) & 0xff);
 967
 968                 /* 5th cycle only on devices with more than 8 GiB */
 969                 if (device->address_cycles >= 5)
 970                         device->controller->address(device, (page >> 24) & 0xff);
 971         }
 972         else
 973         {
 974                 /* column (0 when we start at the beginning of a page,
 975                  * or 2048 for the beginning of OOB area)
 976                  */
 977                 device->controller->address(device, 0x0);
 978                 if (data)
 979                         device->controller->address(device, 0x0);
 980                 else
 981                         device->controller->address(device, 0x8);
 982
 983                 /* row */
 984                 device->controller->address(device, page & 0xff);
 985                 device->controller->address(device, (page >> 8) & 0xff);
 986
 987                 /* 5th cycle only on devices with more than 128 MiB */
 988                 if (device->address_cycles >= 5)
 989                         device->controller->address(device, (page >> 16) & 0xff);
 990         }
 991
 992         if (data)
 993         {
 994                 if (device->controller->write_block_data != NULL)
 995                         (device->controller->write_block_data)(device, data, data_size);
 996                 else
 997                 {
 998                         for (i = 0; i < data_size;)
 999                         {
1000                                 if (device->device->options & NAND_BUSWIDTH_16)
1001                                 {
1002                                         u16 data_buf = le_to_h_u16(data);
1003                                         device->controller->write_data(device, data_buf);
1004                                         data += 2;
1005                                         i += 2;
1006                                 }
1007                                 else
1008                                 {
1009                                         device->controller->write_data(device, *data);
1010                                         data += 1;
1011                                         i += 1;
1012                                 }
1013                         }
1014                 }
1015         }
1016
1017         if (oob)
1018         {
1019                 if (device->controller->write_block_data != NULL)
1020                         (device->controller->write_block_data)(device, oob, oob_size);
1021                 else
1022                 {
1023                         for (i = 0; i < oob_size;)
1024                         {
1025                                 if (device->device->options & NAND_BUSWIDTH_16)
1026                                 {
1027                                         u16 oob_buf = le_to_h_u16(data);
1028                                         device->controller->write_data(device, oob_buf);
1029                                         oob += 2;
1030                                         i += 2;
1031                                 }
1032                                 else
1033                                 {
1034                                         device->controller->write_data(device, *oob);
1035                                         oob += 1;
1036                                         i += 1;
1037                                 }
1038                         }
1039                 }
1040         }
1041
1042         device->controller->command(device, NAND_CMD_PAGEPROG);
1043
1044         retval = device->controller->nand_ready ?
1045                         device->controller->nand_ready(device, 100) :
1046                         nand_poll_ready(device, 100);
1047         if (!retval)
1048                 return ERROR_NAND_OPERATION_TIMEOUT;
1049
1050         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
1051         {
1052                 LOG_ERROR("couldn't read status");
1053                 return ERROR_NAND_OPERATION_FAILED;
1054         }
1055
1056         if (status & NAND_STATUS_FAIL)
1057         {
1058                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
1059                 return ERROR_NAND_OPERATION_FAILED;
1060         }
1061
1062         return ERROR_OK;
1063 }
1064
1065 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1066 {
1067         nand_device_t *p;
1068         int i;
1069
1070         if (!nand_devices)
1071         {
1072                 command_print(cmd_ctx, "no NAND flash devices configured");
1073                 return ERROR_OK;
1074         }
1075
1076         for (p = nand_devices, i = 0; p; p = p->next, i++)
1077         {
1078                 if (p->device)
1079                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1080                                 i, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1081                 else
1082                         command_print(cmd_ctx, "#%i: not probed", i);
1083         }
1084
1085         return ERROR_OK;
1086 }
1087
1088 static int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1089 {
1090         nand_device_t *p;
1091         int i = 0;
1092         int j = 0;
1093         int first = -1;
1094         int last = -1;
1095
1096         if ((argc < 1) || (argc > 3))
1097         {
1098                 return ERROR_COMMAND_SYNTAX_ERROR;
1099
1100         }
1101
1102         if (argc == 2)
1103         {
1104                 first = last = strtoul(args[1], NULL, 0);
1105         }
1106         else if (argc == 3)
1107         {
1108                 first = strtoul(args[1], NULL, 0);
1109                 last = strtoul(args[2], NULL, 0);
1110         }
1111
1112         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1113         if (p)
1114         {
1115                 if (p->device)
1116                 {
1117                         if (first >= p->num_blocks)
1118                                 first = p->num_blocks - 1;
1119
1120                         if (last >= p->num_blocks)
1121                                 last = p->num_blocks - 1;
1122
1123                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1124                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
1125
1126                         for (j = first; j <= last; j++)
1127                         {
1128                                 char *erase_state, *bad_state;
1129
1130                                 if (p->blocks[j].is_erased == 0)
1131                                         erase_state = "not erased";
1132                                 else if (p->blocks[j].is_erased == 1)
1133                                         erase_state = "erased";
1134                                 else
1135                                         erase_state = "erase state unknown";
1136
1137                                 if (p->blocks[j].is_bad == 0)
1138                                         bad_state = "";
1139                                 else if (p->blocks[j].is_bad == 1)
1140                                         bad_state = " (marked bad)";
1141                                 else
1142                                         bad_state = " (block condition unknown)";
1143
1144                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1145                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1146                                                         erase_state, bad_state);
1147                         }
1148                 }
1149                 else
1150                 {
1151                         command_print(cmd_ctx, "#%s: not probed", args[0]);
1152                 }
1153         }
1154
1155         return ERROR_OK;
1156 }
1157
1158 static int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1159 {
1160         nand_device_t *p;
1161         int retval;
1162
1163         if (argc != 1)
1164         {
1165                 return ERROR_COMMAND_SYNTAX_ERROR;
1166         }
1167
1168         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1169         if (p)
1170         {
1171                 if ((retval = nand_probe(p)) == ERROR_OK)
1172                 {
1173                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1174                 }
1175                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1176                 {
1177                         command_print(cmd_ctx, "probing failed for NAND flash device");
1178                 }
1179                 else
1180                 {
1181                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1182                 }
1183         }
1184         else
1185         {
1186                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1187         }
1188
1189         return ERROR_OK;
1190 }
1191
1192 static int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1193 {
1194         nand_device_t *p;
1195         int retval;
1196
1197         if (argc != 3)
1198         {
1199                 return ERROR_COMMAND_SYNTAX_ERROR;
1200
1201         }
1202
1203         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1204         if (p)
1205         {
1206                 int first = strtoul(args[1], NULL, 0);
1207                 int last = strtoul(args[2], NULL, 0);
1208
1209                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1210                 {
1211                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1212                 }
1213                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1214                 {
1215                         command_print(cmd_ctx, "erase failed");
1216                 }
1217                 else
1218                 {
1219                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1220                 }
1221         }
1222         else
1223         {
1224                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1225         }
1226
1227         return ERROR_OK;
1228 }
1229
1230 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1231 {
1232         nand_device_t *p;
1233         int retval;
1234         int first = -1;
1235         int last = -1;
1236
1237         if ((argc < 1) || (argc > 3) || (argc == 2))
1238         {
1239                 return ERROR_COMMAND_SYNTAX_ERROR;
1240
1241         }
1242
1243         if (argc == 3)
1244         {
1245                 first = strtoul(args[1], NULL, 0);
1246                 last = strtoul(args[2], NULL, 0);
1247         }
1248
1249         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1250         if (p)
1251         {
1252                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1253                 {
1254                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks");
1255                 }
1256                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1257                 {
1258                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1259                 }
1260                 else
1261                 {
1262                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1263                 }
1264         }
1265         else
1266         {
1267                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1268         }
1269
1270         return ERROR_OK;
1271 }
1272
1273 static int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1274 {
1275         nand_device_t *p;
1276
1277         if (argc != 4)
1278         {
1279                 return ERROR_COMMAND_SYNTAX_ERROR;
1280
1281         }
1282
1283         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1284         if (p)
1285         {
1286
1287         }
1288         else
1289         {
1290                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1291         }
1292
1293         return ERROR_OK;
1294 }
1295
1296 static int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1297 {
1298         u32 offset;
1299         u32 binary_size;
1300         u32 buf_cnt;
1301         enum oob_formats oob_format = NAND_OOB_NONE;
1302
1303         fileio_t fileio;
1304
1305         duration_t duration;
1306         char *duration_text;
1307
1308         nand_device_t *p;
1309
1310         if (argc < 3)
1311         {
1312                 return ERROR_COMMAND_SYNTAX_ERROR;
1313
1314         }
1315
1316         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1317         if (p)
1318         {
1319                 u8 *page = NULL;
1320                 u32 page_size = 0;
1321                 u8 *oob = NULL;
1322                 u32 oob_size = 0;
1323                 const int *eccpos = NULL;
1324
1325                 offset = strtoul(args[2], NULL, 0);
1326
1327                 if (argc > 3)
1328                 {
1329                         int i;
1330                         for (i = 3; i < argc; i++)
1331                         {
1332                                 if (!strcmp(args[i], "oob_raw"))
1333                                         oob_format |= NAND_OOB_RAW;
1334                                 else if (!strcmp(args[i], "oob_only"))
1335                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1336                                 else if (!strcmp(args[i], "oob_softecc"))
1337                                         oob_format |= NAND_OOB_SW_ECC;
1338                                 else if (!strcmp(args[i], "oob_softecc_kw"))
1339                                         oob_format |= NAND_OOB_SW_ECC_KW;
1340                                 else
1341                                 {
1342                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1343                                         return ERROR_COMMAND_SYNTAX_ERROR;
1344                                 }
1345                         }
1346                 }
1347
1348                 duration_start_measure(&duration);
1349
1350                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1351                 {
1352                         return ERROR_OK;
1353                 }
1354
1355                 buf_cnt = binary_size = fileio.size;
1356
1357                 if (!(oob_format & NAND_OOB_ONLY))
1358                 {
1359                         page_size = p->page_size;
1360                         page = malloc(p->page_size);
1361                 }
1362
1363                 if (oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW))
1364                 {
1365                         if (p->page_size == 512) {
1366                                 oob_size = 16;
1367                                 eccpos = nand_oob_16.eccpos;
1368                         } else if (p->page_size == 2048) {
1369                                 oob_size = 64;
1370                                 eccpos = nand_oob_64.eccpos;
1371                         }
1372                         oob = malloc(oob_size);
1373                 }
1374
1375                 if (offset % p->page_size)
1376                 {
1377                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1378                         fileio_close(&fileio);
1379                         free(oob);
1380                         free(page);
1381                         return ERROR_OK;
1382                 }
1383
1384                 while (buf_cnt > 0)
1385                 {
1386                         u32 size_read;
1387
1388                         if (NULL != page)
1389                         {
1390                                 fileio_read(&fileio, page_size, page, &size_read);
1391                                 buf_cnt -= size_read;
1392                                 if (size_read < page_size)
1393                                 {
1394                                         memset(page + size_read, 0xff, page_size - size_read);
1395                                 }
1396                         }
1397
1398                         if (oob_format & NAND_OOB_SW_ECC)
1399                         {
1400                                 u32 i, j;
1401                                 u8 ecc[3];
1402                                 memset(oob, 0xff, oob_size);
1403                                 for (i = 0, j = 0; i < page_size; i += 256) {
1404                                         nand_calculate_ecc(p, page+i, ecc);
1405                                         oob[eccpos[j++]] = ecc[0];
1406                                         oob[eccpos[j++]] = ecc[1];
1407                                         oob[eccpos[j++]] = ecc[2];
1408                                 }
1409                         } else if (oob_format & NAND_OOB_SW_ECC_KW)
1410                         {
1411                                 /*
1412                                  * In this case eccpos is not used as
1413                                  * the ECC data is always stored contigously
1414                                  * at the end of the OOB area.  It consists
1415                                  * of 10 bytes per 512-byte data block.
1416                                  */
1417                                 u32 i;
1418                                 u8 *ecc = oob + oob_size - page_size/512 * 10;
1419                                 memset(oob, 0xff, oob_size);
1420                                 for (i = 0; i < page_size; i += 512) {
1421                                         nand_calculate_ecc_kw(p, page+i, ecc);
1422                                         ecc += 10;
1423                                 }
1424                         }
1425                         else if (NULL != oob)
1426                         {
1427                                 fileio_read(&fileio, oob_size, oob, &size_read);
1428                                 buf_cnt -= size_read;
1429                                 if (size_read < oob_size)
1430                                 {
1431                                         memset(oob + size_read, 0xff, oob_size - size_read);
1432                                 }
1433                         }
1434
1435                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1436                         {
1437                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1438                                         args[1], args[0], offset);
1439
1440                                 fileio_close(&fileio);
1441                                 free(oob);
1442                                 free(page);
1443
1444                                 return ERROR_OK;
1445                         }
1446                         offset += page_size;
1447                 }
1448
1449                 fileio_close(&fileio);
1450                 free(oob);
1451                 free(page);
1452                 oob = NULL;
1453                 page = NULL;
1454                 duration_stop_measure(&duration, &duration_text);
1455                 command_print(cmd_ctx, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
1456                         args[1], args[0], offset, duration_text);
1457                 free(duration_text);
1458                 duration_text = NULL;
1459         }
1460         else
1461         {
1462                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1463         }
1464
1465         return ERROR_OK;
1466 }
1467
1468 static int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1469 {
1470         nand_device_t *p;
1471
1472         if (argc < 4)
1473         {
1474                 return ERROR_COMMAND_SYNTAX_ERROR;
1475         }
1476
1477         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1478         if (p)
1479         {
1480                 if (p->device)
1481                 {
1482                         fileio_t fileio;
1483                         duration_t duration;
1484                         char *duration_text;
1485                         int retval;
1486
1487                         u8 *page = NULL;
1488                         u32 page_size = 0;
1489                         u8 *oob = NULL;
1490                         u32 oob_size = 0;
1491                         u32 address = strtoul(args[2], NULL, 0);
1492                         u32 size = strtoul(args[3], NULL, 0);
1493                         u32 bytes_done = 0;
1494                         enum oob_formats oob_format = NAND_OOB_NONE;
1495
1496                         if (argc > 4)
1497                         {
1498                                 int i;
1499                                 for (i = 4; i < argc; i++)
1500                                 {
1501                                         if (!strcmp(args[i], "oob_raw"))
1502                                                 oob_format |= NAND_OOB_RAW;
1503                                         else if (!strcmp(args[i], "oob_only"))
1504                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1505                                         else
1506                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1507                                 }
1508                         }
1509
1510                         if ((address % p->page_size) || (size % p->page_size))
1511                         {
1512                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1513                                 return ERROR_OK;
1514                         }
1515
1516                         if (!(oob_format & NAND_OOB_ONLY))
1517                         {
1518                                 page_size = p->page_size;
1519                                 page = malloc(p->page_size);
1520                         }
1521
1522                         if (oob_format & NAND_OOB_RAW)
1523                         {
1524                                 if (p->page_size == 512)
1525                                         oob_size = 16;
1526                                 else if (p->page_size == 2048)
1527                                         oob_size = 64;
1528                                 oob = malloc(oob_size);
1529                         }
1530
1531                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1532                         {
1533                                 return ERROR_OK;
1534                         }
1535
1536                         duration_start_measure(&duration);
1537
1538                         while (size > 0)
1539                         {
1540                                 u32 size_written;
1541                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1542                                 {
1543                                         command_print(cmd_ctx, "reading NAND flash page failed");
1544                                         free(page);
1545                                         free(oob);
1546                                         fileio_close(&fileio);
1547                                         return ERROR_OK;
1548                                 }
1549
1550                                 if (NULL != page)
1551                                 {
1552                                         fileio_write(&fileio, page_size, page, &size_written);
1553                                         bytes_done += page_size;
1554                                 }
1555
1556                                 if (NULL != oob)
1557                                 {
1558                                         fileio_write(&fileio, oob_size, oob, &size_written);
1559                                         bytes_done += oob_size;
1560                                 }
1561
1562                                 size -= p->page_size;
1563                                 address += p->page_size;
1564                         }
1565
1566                         free(page);
1567                         page = NULL;
1568                         free(oob);
1569                         oob = NULL;
1570                         fileio_close(&fileio);
1571
1572                         duration_stop_measure(&duration, &duration_text);
1573                         command_print(cmd_ctx, "dumped %lld byte in %s", fileio.size, duration_text);
1574                         free(duration_text);
1575                         duration_text = NULL;
1576                 }
1577                 else
1578                 {
1579                         command_print(cmd_ctx, "#%s: not probed", args[0]);
1580                 }
1581         }
1582         else
1583         {
1584                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1585         }
1586
1587         return ERROR_OK;
1588 }
1589
1590 static int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1591 {
1592         nand_device_t *p;
1593
1594         if ((argc < 1) || (argc > 2))
1595         {
1596                 return ERROR_COMMAND_SYNTAX_ERROR;
1597         }
1598
1599         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1600         if (p)
1601         {
1602                 if (p->device)
1603                 {
1604                         if (argc == 2)
1605                         {
1606                                 if (strcmp("enable", args[1]) == 0)
1607                                 {
1608                                         p->use_raw = 1;
1609                                 }
1610                                 else if (strcmp("disable", args[1]) == 0)
1611                                 {
1612                                         p->use_raw = 0;
1613                                 }
1614                                 else
1615                                 {
1616                                         return ERROR_COMMAND_SYNTAX_ERROR;
1617                                 }
1618                         }
1619
1620                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1621                 }
1622                 else
1623                 {
1624                         command_print(cmd_ctx, "#%s: not probed", args[0]);
1625                 }
1626         }
1627         else
1628         {
1629                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1630         }
1631
1632         return ERROR_OK;
1633 }