git.sur5r.net Git - openocd/blob - src/flash/nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   partially based on                                                    *
   6  *       drivers/mtd/nand_ids.c                                                *
   7  *                                                                         *
   8  *   Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)               *
   9  *                                                                         *
  10  *   This program is free software; you can redistribute it and/or modify  *
  11  *   it under the terms of the GNU General Public License as published by  *
  12  *   the Free Software Foundation; either version 2 of the License, or     *
  13  *   (at your option) any later version.                                   *
  14  *                                                                         *
  15  *   This program is distributed in the hope that it will be useful,       *
  16  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  *   GNU General Public License for more details.                          *
  19  *                                                                         *
  20  *   You should have received a copy of the GNU General Public License     *
  21  *   along with this program; if not, write to the                         *
  22  *   Free Software Foundation, Inc.,                                       *
  23  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  ***************************************************************************/
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "replacements.h"
  30 #include "log.h"
  31
  32 #include <stdlib.h>
  33 #include <string.h>
  34
  35 #include <errno.h>
  36
  37 #include "nand.h"
  38 #include "flash.h"
  39 #include "time_support.h"
  40 #include "fileio.h"
  41 #include "image.h"
  42
  43 int nand_register_commands(struct command_context_s *cmd_ctx);
  44 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  45 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  52
  53 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  54
  55 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  56 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  57 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
  58
  59 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  60 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
  61
  62 /* NAND flash controller
  63  */
  64 extern nand_flash_controller_t lpc3180_nand_controller;
  65 /* extern nand_flash_controller_t s3c2410_nand_controller; */
  66 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
  67
  68 nand_flash_controller_t *nand_flash_controllers[] =
  69 {
  70         &lpc3180_nand_controller,
  71 /*      &s3c2410_nand_controller, */
  72 /*      &boundary_scan_nand_controller, */
  73         NULL
  74 };
  75
  76 /* configured NAND devices and NAND Flash command handler */
  77 nand_device_t *nand_devices = NULL;
  78 static command_t *nand_cmd;
  79
  80 /*      Chip ID list
  81  *
  82  *      Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  83  *      options
  84  *
  85  *      Pagesize; 0, 256, 512
  86  *      0       get this information from the extended chip ID
  87  *      256     256 Byte page size
  88  *      512     512 Byte page size
  89  */
  90 nand_info_t nand_flash_ids[] =
  91 {
  92         {"NAND 1MiB 5V 8-bit",          0x6e, 256, 1, 0x1000, 0},
  93         {"NAND 2MiB 5V 8-bit",          0x64, 256, 2, 0x1000, 0},
  94         {"NAND 4MiB 5V 8-bit",          0x6b, 512, 4, 0x2000, 0},
  95         {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
  96         {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
  97         {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
  98         {"NAND 4MiB 3,3V 8-bit",        0xd5, 512, 4, 0x2000, 0},
  99         {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
 100         {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
 101         {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},
 102
 103         {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
 104         {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
 105         {"NAND 8MiB 1,8V 16-bit",       0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 106         {"NAND 8MiB 3,3V 16-bit",       0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
 107
 108         {"NAND 16MiB 1,8V 8-bit",       0x33, 512, 16, 0x4000, 0},
 109         {"NAND 16MiB 3,3V 8-bit",       0x73, 512, 16, 0x4000, 0},
 110         {"NAND 16MiB 1,8V 16-bit",      0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 111         {"NAND 16MiB 3,3V 16-bit",      0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
 112
 113         {"NAND 32MiB 1,8V 8-bit",       0x35, 512, 32, 0x4000, 0},
 114         {"NAND 32MiB 3,3V 8-bit",       0x75, 512, 32, 0x4000, 0},
 115         {"NAND 32MiB 1,8V 16-bit",      0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 116         {"NAND 32MiB 3,3V 16-bit",      0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
 117
 118         {"NAND 64MiB 1,8V 8-bit",       0x36, 512, 64, 0x4000, 0},
 119         {"NAND 64MiB 3,3V 8-bit",       0x76, 512, 64, 0x4000, 0},
 120         {"NAND 64MiB 1,8V 16-bit",      0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 121         {"NAND 64MiB 3,3V 16-bit",      0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
 122
 123         {"NAND 128MiB 1,8V 8-bit",      0x78, 512, 128, 0x4000, 0},
 124         {"NAND 128MiB 1,8V 8-bit",      0x39, 512, 128, 0x4000, 0},
 125         {"NAND 128MiB 3,3V 8-bit",      0x79, 512, 128, 0x4000, 0},
 126         {"NAND 128MiB 1,8V 16-bit",     0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 127         {"NAND 128MiB 1,8V 16-bit",     0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 128         {"NAND 128MiB 3,3V 16-bit",     0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 129         {"NAND 128MiB 3,3V 16-bit",     0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
 130
 131         {"NAND 256MiB 3,3V 8-bit",      0x71, 512, 256, 0x4000, 0},
 132
 133         {"NAND 64MiB 1,8V 8-bit",       0xA2, 0,  64, 0, LP_OPTIONS},
 134         {"NAND 64MiB 3,3V 8-bit",       0xF2, 0,  64, 0, LP_OPTIONS},
 135         {"NAND 64MiB 1,8V 16-bit",      0xB2, 0,  64, 0, LP_OPTIONS16},
 136         {"NAND 64MiB 3,3V 16-bit",      0xC2, 0,  64, 0, LP_OPTIONS16},
 137
 138         {"NAND 128MiB 1,8V 8-bit",      0xA1, 0, 128, 0, LP_OPTIONS},
 139         {"NAND 128MiB 3,3V 8-bit",      0xF1, 0, 128, 0, LP_OPTIONS},
 140         {"NAND 128MiB 1,8V 16-bit",     0xB1, 0, 128, 0, LP_OPTIONS16},
 141         {"NAND 128MiB 3,3V 16-bit",     0xC1, 0, 128, 0, LP_OPTIONS16},
 142
 143         {"NAND 256MiB 1,8V 8-bit",      0xAA, 0, 256, 0, LP_OPTIONS},
 144         {"NAND 256MiB 3,3V 8-bit",      0xDA, 0, 256, 0, LP_OPTIONS},
 145         {"NAND 256MiB 1,8V 16-bit",     0xBA, 0, 256, 0, LP_OPTIONS16},
 146         {"NAND 256MiB 3,3V 16-bit",     0xCA, 0, 256, 0, LP_OPTIONS16},
 147
 148         {"NAND 512MiB 1,8V 8-bit",      0xAC, 0, 512, 0, LP_OPTIONS},
 149         {"NAND 512MiB 3,3V 8-bit",      0xDC, 0, 512, 0, LP_OPTIONS},
 150         {"NAND 512MiB 1,8V 16-bit",     0xBC, 0, 512, 0, LP_OPTIONS16},
 151         {"NAND 512MiB 3,3V 16-bit",     0xCC, 0, 512, 0, LP_OPTIONS16},
 152
 153         {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
 154         {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},
 155         {"NAND 1GiB 1,8V 16-bit",       0xB3, 0, 1024, 0, LP_OPTIONS16},
 156         {"NAND 1GiB 3,3V 16-bit",       0xC3, 0, 1024, 0, LP_OPTIONS16},
 157
 158         {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
 159         {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
 160         {"NAND 2GiB 1,8V 16-bit",       0xB5, 0, 2048, 0, LP_OPTIONS16},
 161         {"NAND 2GiB 3,3V 16-bit",       0xC5, 0, 2048, 0, LP_OPTIONS16},
 162
 163         {NULL, 0,}
 164 };
 165
 166 /* Manufacturer ID list
 167  */
 168 nand_manufacturer_t nand_manuf_ids[] =
 169 {
 170         {0x0, "unknown"},
 171         {NAND_MFR_TOSHIBA, "Toshiba"},
 172         {NAND_MFR_SAMSUNG, "Samsung"},
 173         {NAND_MFR_FUJITSU, "Fujitsu"},
 174         {NAND_MFR_NATIONAL, "National"},
 175         {NAND_MFR_RENESAS, "Renesas"},
 176         {NAND_MFR_STMICRO, "ST Micro"},
 177         {NAND_MFR_HYNIX, "Hynix"},
 178         {0x0, NULL},
 179 };
 180
 181 /* nand device <nand_controller> [controller options]
 182  */
 183 int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 184 {
 185         int i;
 186         int retval;
 187
 188         if (argc < 1)
 189         {
 190                 WARNING("incomplete flash device nand configuration");
 191                 return ERROR_FLASH_BANK_INVALID;
 192         }
 193
 194         for (i = 0; nand_flash_controllers[i]; i++)
 195         {
 196                 nand_device_t *p, *c;
 197
 198                 if (strcmp(args[0], nand_flash_controllers[i]->name) == 0)
 199                 {
 200                         /* register flash specific commands */
 201                         if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK)
 202                         {
 203                                 ERROR("couldn't register '%s' commands", args[0]);
 204                                 exit(-1);
 205                         }
 206
 207                         c = malloc(sizeof(nand_device_t));
 208
 209                         c->controller = nand_flash_controllers[i];
 210                         c->controller_priv = NULL;
 211                         c->manufacturer = NULL;
 212                         c->device = NULL;
 213                         c->bus_width = 0;
 214                         c->address_cycles = 0;
 215                         c->page_size = 0;
 216                         c->use_raw = 0;
 217                         c->next = NULL;
 218
 219                         if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK)
 220                         {
 221                                 ERROR("'%s' driver rejected nand flash", c->controller->name);
 222                                 free(c);
 223                                 return ERROR_OK;
 224                         }
 225
 226                         /* put NAND device in linked list */
 227                         if (nand_devices)
 228                         {
 229                                 /* find last flash device */
 230                                 for (p = nand_devices; p && p->next; p = p->next);
 231                                 if (p)
 232                                         p->next = c;
 233                         }
 234                         else
 235                         {
 236                                 nand_devices = c;
 237                         }
 238
 239                         return ERROR_OK;
 240                 }
 241         }
 242
 243         /* no valid NAND controller was found (i.e. the configuration option,
 244          * didn't match one of the compiled-in controllers)
 245          */
 246         ERROR("No valid NAND flash controller found (%s)", args[0]);
 247         ERROR("compiled-in NAND flash controllers:");
 248         for (i = 0; nand_flash_controllers[i]; i++)
 249         {
 250                 ERROR("%i: %s", i, nand_flash_controllers[i]->name);
 251         }
 252
 253         return ERROR_OK;
 254 }
 255
 256 int nand_register_commands(struct command_context_s *cmd_ctx)
 257 {
 258         nand_cmd = register_command(cmd_ctx, NULL, "nand", NULL, COMMAND_ANY, NULL);
 259
 260         register_command(cmd_ctx, nand_cmd, "device", handle_nand_device_command, COMMAND_CONFIG, NULL);
 261
 262         return ERROR_OK;
 263 }
 264
 265 int nand_init(struct command_context_s *cmd_ctx)
 266 {
 267         if (nand_devices)
 268         {
 269                 register_command(cmd_ctx, nand_cmd, "list", handle_nand_list_command, COMMAND_EXEC,
 270                                                  "list configured NAND flash devices");
 271                 register_command(cmd_ctx, nand_cmd, "info", handle_nand_info_command, COMMAND_EXEC,
 272                                                  "print info about NAND flash device <num>");
 273                 register_command(cmd_ctx, nand_cmd, "probe", handle_nand_probe_command, COMMAND_EXEC,
 274                                                  "identify NAND flash device <num>");
 275                 register_command(cmd_ctx, nand_cmd, "check_bad_blocks", handle_nand_check_bad_blocks_command, COMMAND_EXEC,
 276                                                  "check NAND flash device <num> for bad blocks [<first> <last>]");
 277                 register_command(cmd_ctx, nand_cmd, "erase", handle_nand_erase_command, COMMAND_EXEC,
 278                                                  "erase blocks on NAND flash device <num> <first> <last>");
 279                 register_command(cmd_ctx, nand_cmd, "copy", handle_nand_copy_command, COMMAND_EXEC,
 280                                                  "copy from NAND flash device <num> <offset> <length> <ram-address>");
 281                 register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
 282                                                  "dump from NAND flash device <num> <filename> <offset> <size> [options]");
 283                 register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
 284                                                  "write to NAND flash device <num> <filename> <offset> [options]");
 285                 register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
 286                                                  "raw access to NAND flash device <num> ['enable'|'disable']");
 287         }
 288
 289         return ERROR_OK;
 290 }
 291
 292 nand_device_t *get_nand_device_by_num(int num)
 293 {
 294         nand_device_t *p;
 295         int i = 0;
 296
 297         for (p = nand_devices; p; p = p->next)
 298         {
 299                 if (i++ == num)
 300                 {
 301                         return p;
 302                 }
 303         }
 304
 305         return NULL;
 306 }
 307
 308 int nand_build_bbt(struct nand_device_s *device, int first, int last)
 309 {
 310         u32 page = 0x0;
 311         int i;
 312         u8 *oob;
 313
 314         oob = malloc(6);
 315
 316         if ((first < 0) || (first >= device->num_blocks))
 317                 first = 0;
 318
 319         if ((last >= device->num_blocks) || (last == -1))
 320                 last = device->num_blocks - 1;
 321
 322         for (i = first; i < last; i++)
 323         {
 324                 nand_read_page(device, page, NULL, 0, oob, 6);
 325
 326                 if (((device->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 327                         || (((device->page_size == 512) && (oob[5] != 0xff)) ||
 328                                 ((device->page_size == 2048) && (oob[0] != 0xff))))
 329                 {
 330                         WARNING("invalid block: %i", i);
 331                         device->blocks[i].is_bad = 1;
 332                 }
 333                 else
 334                 {
 335                         device->blocks[i].is_bad = 0;
 336                 }
 337
 338                 page += (device->erase_size / device->page_size);
 339         }
 340
 341         return ERROR_OK;
 342 }
 343
 344 int nand_read_status(struct nand_device_s *device, u8 *status)
 345 {
 346         if (!device->device)
 347                 return ERROR_NAND_DEVICE_NOT_PROBED;
 348
 349         /* Send read status command */
 350         device->controller->command(device, NAND_CMD_STATUS);
 351
 352         usleep(1000);
 353
 354         /* read status */
 355         if (device->device->options & NAND_BUSWIDTH_16)
 356         {
 357                 u16 data;
 358                 device->controller->read_data(device, &data);
 359                 *status = data & 0xff;
 360         }
 361         else
 362         {
 363                 device->controller->read_data(device, status);
 364         }
 365
 366         return ERROR_OK;
 367 }
 368
 369 int nand_probe(struct nand_device_s *device)
 370 {
 371         u8 manufacturer_id, device_id;
 372         int retval;
 373         int i;
 374
 375         /* clear device data */
 376         device->device = NULL;
 377         device->manufacturer = NULL;
 378
 379         /* clear device parameters */
 380         device->bus_width = 0;
 381         device->address_cycles = 0;
 382         device->page_size = 0;
 383         device->erase_size = 0;
 384
 385         /* initialize controller (device parameters are zero, use controller default) */
 386         if ((retval = device->controller->init(device) != ERROR_OK))
 387         {
 388                 switch (retval)
 389                 {
 390                         case ERROR_NAND_OPERATION_FAILED:
 391                                 DEBUG("controller initialization failed");
 392                                 return ERROR_NAND_OPERATION_FAILED;
 393                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 394                                 ERROR("BUG: controller reported that it doesn't support default parameters");
 395                                 return ERROR_NAND_OPERATION_FAILED;
 396                         default:
 397                                 ERROR("BUG: unknown controller initialization failure");
 398                                 return ERROR_NAND_OPERATION_FAILED;
 399                 }
 400         }
 401
 402         device->controller->command(device, NAND_CMD_RESET);
 403         device->controller->reset(device);
 404
 405         device->controller->command(device, NAND_CMD_READID);
 406         device->controller->address(device, 0x0);
 407
 408         if (device->bus_width == 8)
 409         {
 410                 device->controller->read_data(device, &manufacturer_id);
 411                 device->controller->read_data(device, &device_id);
 412         }
 413         else
 414         {
 415                 u16 data_buf;
 416                 device->controller->read_data(device, &data_buf);
 417                 manufacturer_id = data_buf & 0xff;
 418                 device->controller->read_data(device, &data_buf);
 419                 device_id = data_buf & 0xff;
 420         }
 421
 422         for (i = 0; nand_flash_ids[i].name; i++)
 423         {
 424                 if (nand_flash_ids[i].id == device_id)
 425                 {
 426                         device->device = &nand_flash_ids[i];
 427                         break;
 428                 }
 429         }
 430
 431         for (i = 0; nand_manuf_ids[i].name; i++)
 432         {
 433                 if (nand_manuf_ids[i].id == manufacturer_id)
 434                 {
 435                         device->manufacturer = &nand_manuf_ids[i];
 436                         break;
 437                 }
 438         }
 439
 440         if (!device->manufacturer)
 441         {
 442                 device->manufacturer = &nand_manuf_ids[0];
 443                 device->manufacturer->id = manufacturer_id;
 444         }
 445
 446         if (!device->device)
 447         {
 448                 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 449                         manufacturer_id, device_id);
 450                 return ERROR_NAND_OPERATION_FAILED;
 451         }
 452
 453         DEBUG("found %s (%s)", device->device->name, device->manufacturer->name);
 454
 455         /* initialize device parameters */
 456
 457         /* bus width */
 458         if (device->device->options & NAND_BUSWIDTH_16)
 459                 device->bus_width = 16;
 460         else
 461                 device->bus_width = 8;
 462
 463         /* page size */
 464         if (device->device->page_size == 0)
 465         {
 466                 /* TODO: support reading extended chip id to determine page size */
 467                 return ERROR_NAND_OPERATION_FAILED;
 468         }
 469         else if (device->device->page_size == 256)
 470         {
 471                 ERROR("NAND flashes with 256 byte pagesize are not supported");
 472                 return ERROR_NAND_OPERATION_FAILED;
 473         }
 474         else
 475         {
 476                 device->page_size = device->device->page_size;
 477         }
 478
 479         /* number of address cycles */
 480         if (device->page_size <= 512)
 481         {
 482                 /* small page devices */
 483                 if (device->device->chip_size <= 32)
 484                         device->address_cycles = 3;
 485                 else if (device->device->chip_size <= 8*1024)
 486                         device->address_cycles = 4;
 487                 else
 488                 {
 489                         ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 490                         device->address_cycles = 5;
 491                 }
 492         }
 493         else
 494         {
 495                 /* large page devices */
 496                 if (device->device->chip_size <= 128)
 497                         device->address_cycles = 4;
 498                 else if (device->device->chip_size <= 32*1024)
 499                         device->address_cycles = 5;
 500                 else
 501                 {
 502                         ERROR("BUG: small page NAND device with more than 32 GiB encountered");
 503                         device->address_cycles = 6;
 504                 }
 505         }
 506
 507         /* erase size */
 508         if (device->device->erase_size == 0)
 509         {
 510                 /* TODO: support reading extended chip id to determine erase size */
 511         }
 512         else
 513         {
 514                 device->erase_size = device->device->erase_size;
 515         }
 516
 517         /* initialize controller, but leave parameters at the controllers default */
 518         if ((retval = device->controller->init(device) != ERROR_OK))
 519         {
 520                 switch (retval)
 521                 {
 522                         case ERROR_NAND_OPERATION_FAILED:
 523                                 DEBUG("controller initialization failed");
 524                                 return ERROR_NAND_OPERATION_FAILED;
 525                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 526                                 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 527                                         device->bus_width, device->address_cycles, device->page_size);
 528                                 return ERROR_NAND_OPERATION_FAILED;
 529                         default:
 530                                 ERROR("BUG: unknown controller initialization failure");
 531                                 return ERROR_NAND_OPERATION_FAILED;
 532                 }
 533         }
 534
 535         device->num_blocks = (device->device->chip_size * 1024) / (device->erase_size / 1024);
 536         device->blocks = malloc(sizeof(nand_block_t) * device->num_blocks);
 537
 538         for (i = 0; i < device->num_blocks; i++)
 539         {
 540                 device->blocks[i].size = device->erase_size;
 541                 device->blocks[i].offset = i * device->erase_size;
 542                 device->blocks[i].is_erased = -1;
 543                 device->blocks[i].is_bad = -1;
 544         }
 545
 546         return ERROR_OK;
 547 }
 548
 549 int nand_erase(struct nand_device_s *device, int first_block, int last_block)
 550 {
 551         int i;
 552         u32 page;
 553         u8 status;
 554         int retval;
 555
 556         if (!device->device)
 557                 return ERROR_NAND_DEVICE_NOT_PROBED;
 558
 559         if ((first_block < 0) || (last_block > device->num_blocks))
 560                 return ERROR_INVALID_ARGUMENTS;
 561
 562         /* make sure we know if a block is bad before erasing it */
 563         for (i = first_block; i <= last_block; i++)
 564         {
 565                 if (device->blocks[i].is_bad == -1)
 566                 {
 567                         nand_build_bbt(device, i, last_block);
 568                         break;
 569                 }
 570         }
 571
 572         for (i = first_block; i <= last_block; i++)
 573         {
 574                 /* Send erase setup command */
 575                 device->controller->command(device, NAND_CMD_ERASE1);
 576
 577                 page = i * (device->erase_size / device->page_size);
 578
 579                 /* Send page address */
 580                 if (device->page_size <= 512)
 581                 {
 582                         /* row */
 583                         device->controller->address(device, page & 0xff);
 584                         device->controller->address(device, (page >> 8) & 0xff);
 585
 586                         /* 3rd cycle only on devices with more than 32 MiB */
 587                         if (device->address_cycles >= 4)
 588                                 device->controller->address(device, (page >> 16) & 0xff);
 589
 590                         /* 4th cycle only on devices with more than 8 GiB */
 591                         if (device->address_cycles >= 5)
 592                                 device->controller->address(device, (page >> 24) & 0xff);
 593                 }
 594                 else
 595                 {
 596                         /* row */
 597                         device->controller->address(device, page & 0xff);
 598                         device->controller->address(device, (page >> 8) & 0xff);
 599
 600                         /* 3rd cycle only on devices with more than 128 MiB */
 601                         if (device->address_cycles >= 5)
 602                                 device->controller->address(device, (page >> 16) & 0xff);
 603                 }
 604
 605                 /* Send erase confirm command */
 606                 device->controller->command(device, NAND_CMD_ERASE2);
 607
 608                 if (!device->controller->nand_ready(device, 1000))
 609                 {
 610                         ERROR("timeout waiting for NAND flash block erase to complete");
 611                         return ERROR_NAND_OPERATION_TIMEOUT;
 612                 }
 613
 614                 if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 615                 {
 616                         ERROR("couldn't read status");
 617                         return ERROR_NAND_OPERATION_FAILED;
 618                 }
 619
 620                 if (status & 0x1)
 621                 {
 622                         ERROR("erase operation didn't pass, status: 0x%2.2x", status);
 623                         return ERROR_NAND_OPERATION_FAILED;
 624                 }
 625         }
 626
 627         return ERROR_OK;
 628 }
 629
 630 int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 631 {
 632         u8 *page;
 633
 634         if (!device->device)
 635                 return ERROR_NAND_DEVICE_NOT_PROBED;
 636
 637         if (address % device->page_size)
 638         {
 639                 ERROR("reads need to be page aligned");
 640                 return ERROR_NAND_OPERATION_FAILED;
 641         }
 642
 643         page = malloc(device->page_size);
 644
 645         while (data_size > 0 )
 646         {
 647                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 648                 u32 page_address;
 649
 650
 651                 page_address = address / device->page_size;
 652
 653                 nand_read_page(device, page_address, page, device->page_size, NULL, 0);
 654
 655                 memcpy(data, page, thisrun_size);
 656
 657                 address += thisrun_size;
 658                 data += thisrun_size;
 659                 data_size -= thisrun_size;
 660         }
 661
 662         free(page);
 663
 664         return ERROR_OK;
 665 }
 666
 667 int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size)
 668 {
 669         u8 *page;
 670
 671         if (!device->device)
 672                 return ERROR_NAND_DEVICE_NOT_PROBED;
 673
 674         if (address % device->page_size)
 675         {
 676                 ERROR("writes need to be page aligned");
 677                 return ERROR_NAND_OPERATION_FAILED;
 678         }
 679
 680         page = malloc(device->page_size);
 681
 682         while (data_size > 0 )
 683         {
 684                 u32 thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
 685                 u32 page_address;
 686
 687                 memset(page, 0xff, device->page_size);
 688                 memcpy(page, data, thisrun_size);
 689
 690                 page_address = address / device->page_size;
 691
 692                 nand_write_page(device, page_address, page, device->page_size, NULL, 0);
 693
 694                 address += thisrun_size;
 695                 data += thisrun_size;
 696                 data_size -= thisrun_size;
 697         }
 698
 699         free(page);
 700
 701         return ERROR_OK;
 702 }
 703
 704 int nand_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 705 {
 706         if (!device->device)
 707                 return ERROR_NAND_DEVICE_NOT_PROBED;
 708
 709         if (device->use_raw)
 710                 return nand_write_page_raw(device, page, data, data_size, oob, oob_size);
 711         else
 712                 return device->controller->write_page(device, page, data, data_size, oob, oob_size);
 713 }
 714
 715 int nand_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 716 {
 717         if (!device->device)
 718                 return ERROR_NAND_DEVICE_NOT_PROBED;
 719
 720         if (device->use_raw)
 721                 return nand_read_page_raw(device, page, data, data_size, oob, oob_size);
 722         else
 723                 return device->controller->read_page(device, page, data, data_size, oob, oob_size);
 724 }
 725
 726 int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 727 {
 728         int i;
 729
 730         if (!device->device)
 731                 return ERROR_NAND_DEVICE_NOT_PROBED;
 732
 733         if (device->page_size <= 512)
 734         {
 735                 /* small page device */
 736                 if (data)
 737                         device->controller->command(device, NAND_CMD_READ0);
 738                 else
 739                         device->controller->command(device, NAND_CMD_READOOB);
 740
 741                 /* column (always 0, we start at the beginning of a page/OOB area) */
 742                 device->controller->address(device, 0x0);
 743
 744                 /* row */
 745                 device->controller->address(device, page & 0xff);
 746                 device->controller->address(device, (page >> 8) & 0xff);
 747
 748                 /* 4th cycle only on devices with more than 32 MiB */
 749                 if (device->address_cycles >= 4)
 750                         device->controller->address(device, (page >> 16) & 0xff);
 751
 752                 /* 5th cycle only on devices with more than 8 GiB */
 753                 if (device->address_cycles >= 5)
 754                         device->controller->address(device, (page >> 24) & 0xff);
 755         }
 756         else
 757         {
 758                 /* large page device */
 759                 device->controller->command(device, NAND_CMD_READ0);
 760
 761                 /* column (0 when we start at the beginning of a page,
 762                  * or 2048 for the beginning of OOB area)
 763                  */
 764                 device->controller->address(device, 0x0);
 765                 device->controller->address(device, 0x8);
 766
 767                 /* row */
 768                 device->controller->address(device, page & 0xff);
 769                 device->controller->address(device, (page >> 8) & 0xff);
 770
 771                 /* 5th cycle only on devices with more than 128 MiB */
 772                 if (device->address_cycles >= 5)
 773                         device->controller->address(device, (page >> 16) & 0xff);
 774
 775                 /* large page devices need a start command */
 776                 device->controller->command(device, NAND_CMD_READSTART);
 777         }
 778
 779         if (!device->controller->nand_ready(device, 100))
 780                 return ERROR_NAND_OPERATION_TIMEOUT;
 781
 782         if (data)
 783         {
 784                 for (i = 0; i < data_size;)
 785                 {
 786                         if (device->device->options & NAND_BUSWIDTH_16)
 787                         {
 788                                 device->controller->read_data(device, data);
 789                                 data += 2;
 790                                 i += 2;
 791                         }
 792                         else
 793                         {
 794                                 device->controller->read_data(device, data);
 795                                 data += 1;
 796                                 i += 1;
 797                         }
 798                 }
 799         }
 800
 801         if (oob)
 802         {
 803                 for (i = 0; i < oob_size;)
 804                 {
 805                         if (device->device->options & NAND_BUSWIDTH_16)
 806                         {
 807                                 device->controller->read_data(device, oob);
 808                                 oob += 2;
 809                                 i += 2;
 810                         }
 811                         else
 812                         {
 813                                 device->controller->read_data(device, oob);
 814                                 oob += 1;
 815                                 i += 1;
 816                         }
 817                 }
 818         }
 819
 820         return ERROR_OK;
 821 }
 822
 823 int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size)
 824 {
 825         int i;
 826         int retval;
 827         u8 status;
 828
 829         if (!device->device)
 830                 return ERROR_NAND_DEVICE_NOT_PROBED;
 831
 832         device->controller->command(device, NAND_CMD_SEQIN);
 833
 834         if (device->page_size <= 512)
 835         {
 836                 /* column (always 0, we start at the beginning of a page/OOB area) */
 837                 device->controller->address(device, 0x0);
 838
 839                 /* row */
 840                 device->controller->address(device, page & 0xff);
 841                 device->controller->address(device, (page >> 8) & 0xff);
 842
 843                 /* 4th cycle only on devices with more than 32 MiB */
 844                 if (device->address_cycles >= 4)
 845                         device->controller->address(device, (page >> 16) & 0xff);
 846
 847                 /* 5th cycle only on devices with more than 8 GiB */
 848                 if (device->address_cycles >= 5)
 849                         device->controller->address(device, (page >> 24) & 0xff);
 850         }
 851         else
 852         {
 853                 /* column (0 when we start at the beginning of a page,
 854                  * or 2048 for the beginning of OOB area)
 855                  */
 856                 device->controller->address(device, 0x0);
 857                 device->controller->address(device, 0x8);
 858
 859                 /* row */
 860                 device->controller->address(device, page & 0xff);
 861                 device->controller->address(device, (page >> 8) & 0xff);
 862
 863                 /* 5th cycle only on devices with more than 128 MiB */
 864                 if (device->address_cycles >= 5)
 865                         device->controller->address(device, (page >> 16) & 0xff);
 866         }
 867
 868         if (data)
 869         {
 870                 for (i = 0; i < data_size;)
 871                 {
 872                         if (device->device->options & NAND_BUSWIDTH_16)
 873                         {
 874                                 u16 data_buf = le_to_h_u16(data);
 875                                 device->controller->write_data(device, data_buf);
 876                                 data += 2;
 877                                 i += 2;
 878                         }
 879                         else
 880                         {
 881                                 device->controller->write_data(device, *data);
 882                                 data += 1;
 883                                 i += 1;
 884                         }
 885                 }
 886         }
 887
 888         if (oob)
 889         {
 890                 for (i = 0; i < oob_size;)
 891                 {
 892                         if (device->device->options & NAND_BUSWIDTH_16)
 893                         {
 894                                 u16 oob_buf = le_to_h_u16(data);
 895                                 device->controller->write_data(device, oob_buf);
 896                                 oob += 2;
 897                                 i += 2;
 898                         }
 899                         else
 900                         {
 901                                 device->controller->write_data(device, *oob);
 902                                 oob += 1;
 903                                 i += 1;
 904                         }
 905                 }
 906         }
 907
 908         device->controller->command(device, NAND_CMD_PAGEPROG);
 909
 910         if (!device->controller->nand_ready(device, 100))
 911                 return ERROR_NAND_OPERATION_TIMEOUT;
 912
 913         if ((retval = nand_read_status(device, &status)) != ERROR_OK)
 914         {
 915                 ERROR("couldn't read status");
 916                 return ERROR_NAND_OPERATION_FAILED;
 917         }
 918
 919         if (status & NAND_STATUS_FAIL)
 920         {
 921                 ERROR("write operation didn't pass, status: 0x%2.2x", status);
 922                 return ERROR_NAND_OPERATION_FAILED;
 923         }
 924
 925         return ERROR_OK;
 926 }
 927
 928 int handle_nand_list_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 929 {
 930         nand_device_t *p;
 931         int i = 0;
 932
 933         if (!nand_devices)
 934         {
 935                 command_print(cmd_ctx, "no NAND flash devices configured");
 936                 return ERROR_OK;
 937         }
 938
 939         for (p = nand_devices; p; p = p->next)
 940         {
 941                 if (p->device)
 942                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
 943                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
 944                 else
 945                         command_print(cmd_ctx, "#%i: not probed");
 946         }
 947
 948         return ERROR_OK;
 949 }
 950
 951 int handle_nand_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 952 {
 953         nand_device_t *p;
 954         int i = 0;
 955         int j = 0;
 956         int first = -1;
 957         int last = -1;
 958
 959         if ((argc < 1) || (argc > 3))
 960         {
 961                 command_print(cmd_ctx, "usage: nand info <num> [<first> <last>]");
 962                 return ERROR_OK;
 963         }
 964
 965         if (argc == 2)
 966         {
 967                 first = last = strtoul(args[1], NULL, 0);
 968         }
 969         else if (argc == 3)
 970         {
 971                 first = strtoul(args[1], NULL, 0);
 972                 last = strtoul(args[2], NULL, 0);
 973         }
 974
 975         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
 976         if (p)
 977         {
 978                 if (p->device)
 979                 {
 980                         if (first >= p->num_blocks)
 981                                 first = p->num_blocks - 1;
 982
 983                         if (last >= p->num_blocks)
 984                                 last = p->num_blocks - 1;
 985
 986                         command_print(cmd_ctx, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
 987                                 i++, p->device->name, p->manufacturer->name, p->page_size, p->bus_width, p->erase_size);
 988
 989                         for (j = first; j <= last; j++)
 990                         {
 991                                 char *erase_state, *bad_state;
 992
 993                                 if (p->blocks[j].is_erased == 0)
 994                                         erase_state = "not erased";
 995                                 else if (p->blocks[j].is_erased == 1)
 996                                         erase_state = "erased";
 997                                 else
 998                                         erase_state = "erase state unknown";
 999
1000                                 if (p->blocks[j].is_bad == 0)
1001                                         bad_state = "";
1002                                 else if (p->blocks[j].is_bad == 1)
1003                                         bad_state = " (marked bad)";
1004                                 else
1005                                         bad_state = " (block condition unknown)";
1006
1007                                 command_print(cmd_ctx, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1008                                                         j, p->blocks[j].offset, p->blocks[j].size / 1024,
1009                                                         erase_state, bad_state);
1010                         }
1011                 }
1012                 else
1013                 {
1014                         command_print(cmd_ctx, "#%i: not probed");
1015                 }
1016         }
1017
1018         return ERROR_OK;
1019 }
1020
1021 int handle_nand_probe_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1022 {
1023         nand_device_t *p;
1024         int retval;
1025
1026         if (argc != 1)
1027         {
1028                 command_print(cmd_ctx, "usage: nand probe <num>");
1029                 return ERROR_OK;
1030         }
1031
1032         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1033         if (p)
1034         {
1035                 if ((retval = nand_probe(p)) == ERROR_OK)
1036                 {
1037                         command_print(cmd_ctx, "NAND flash device '%s' found", p->device->name);
1038                 }
1039                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1040                 {
1041                         command_print(cmd_ctx, "probing failed for NAND flash device");
1042                 }
1043                 else
1044                 {
1045                         command_print(cmd_ctx, "unknown error when probing NAND flash device");
1046                 }
1047         }
1048         else
1049         {
1050                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1051         }
1052
1053         return ERROR_OK;
1054 }
1055
1056 int handle_nand_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1057 {
1058         nand_device_t *p;
1059         int retval;
1060
1061         if (argc != 3)
1062         {
1063                 command_print(cmd_ctx, "usage: nand erase <num> <first> <last>");
1064                 return ERROR_OK;
1065         }
1066
1067         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1068         if (p)
1069         {
1070                 int first = strtoul(args[1], NULL, 0);
1071                 int last = strtoul(args[2], NULL, 0);
1072
1073                 if ((retval = nand_erase(p, first, last)) == ERROR_OK)
1074                 {
1075                         command_print(cmd_ctx, "successfully erased blocks %i to %i on NAND flash device '%s'", first, last, p->device->name);
1076                 }
1077                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1078                 {
1079                         command_print(cmd_ctx, "erase failed");
1080                 }
1081                 else
1082                 {
1083                         command_print(cmd_ctx, "unknown error when erasing NAND flash device");
1084                 }
1085         }
1086         else
1087         {
1088                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1089         }
1090
1091         return ERROR_OK;
1092 }
1093
1094 int handle_nand_check_bad_blocks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1095 {
1096         nand_device_t *p;
1097         int retval;
1098         int first = -1;
1099         int last = -1;
1100
1101         if ((argc < 1) || (argc > 3) || (argc == 2))
1102         {
1103                 command_print(cmd_ctx, "usage: nand check_bad_blocks <num> [<first> <last>]");
1104                 return ERROR_OK;
1105         }
1106
1107         if (argc == 3)
1108         {
1109                 first = strtoul(args[1], NULL, 0);
1110                 last = strtoul(args[2], NULL, 0);
1111         }
1112
1113         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1114         if (p)
1115         {
1116                 if ((retval = nand_build_bbt(p, first, last)) == ERROR_OK)
1117                 {
1118                         command_print(cmd_ctx, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p->device->name);
1119                 }
1120                 else if (retval == ERROR_NAND_OPERATION_FAILED)
1121                 {
1122                         command_print(cmd_ctx, "error when checking for bad blocks on NAND flash device");
1123                 }
1124                 else
1125                 {
1126                         command_print(cmd_ctx, "unknown error when checking for bad blocks on NAND flash device");
1127                 }
1128         }
1129         else
1130         {
1131                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1132         }
1133
1134         return ERROR_OK;
1135 }
1136
1137 int handle_nand_copy_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1138 {
1139         nand_device_t *p;
1140
1141         if (argc != 4)
1142         {
1143                 command_print(cmd_ctx, "usage: nand copy <num> <offset> <length> <ram-address>");
1144                 return ERROR_OK;
1145         }
1146
1147         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1148         if (p)
1149         {
1150
1151         }
1152         else
1153         {
1154                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1155         }
1156
1157         return ERROR_OK;
1158 }
1159
1160 int handle_nand_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1161 {
1162         u32 offset;
1163         u32 binary_size;
1164         u32 buf_cnt;
1165         enum oob_formats oob_format = NAND_OOB_NONE;
1166
1167         fileio_t fileio;
1168
1169         duration_t duration;
1170         char *duration_text;
1171
1172         nand_device_t *p;
1173
1174         if (argc < 3)
1175         {
1176                 command_print(cmd_ctx, "usage: nand write <num> <file> <offset> [options]");
1177                 return ERROR_OK;
1178         }
1179
1180         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1181         if (p)
1182         {
1183                 u8 *page = NULL;
1184                 u32 page_size = 0;
1185                 u8 *oob = NULL;
1186                 u32 oob_size = 0;
1187
1188                 duration_start_measure(&duration);
1189                 offset = strtoul(args[2], NULL, 0);
1190
1191                 if (argc > 3)
1192                 {
1193                         int i;
1194                         for (i = 3; i < argc; i++)
1195                         {
1196                                 if (!strcmp(args[i], "oob_raw"))
1197                                         oob_format |= NAND_OOB_RAW;
1198                                 else if (!strcmp(args[i], "oob_only"))
1199                                         oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1200                                 else
1201                                 {
1202                                         command_print(cmd_ctx, "unknown option: %s", args[i]);
1203                                 }
1204                         }
1205                 }
1206
1207                 if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
1208                 {
1209                         command_print(cmd_ctx, "file open error: %s", fileio.error_str);
1210                         return ERROR_OK;
1211                 }
1212
1213                 buf_cnt = binary_size = fileio.size;
1214
1215                 if (!(oob_format & NAND_OOB_ONLY))
1216                 {
1217                         page_size = p->page_size;
1218                         page = malloc(p->page_size);
1219                 }
1220
1221                 if (oob_format & NAND_OOB_RAW)
1222                 {
1223                         if (p->page_size == 512)
1224                                 oob_size = 16;
1225                         else if (p->page_size == 2048)
1226                                 oob_size = 64;
1227                         oob = malloc(oob_size);
1228                 }
1229
1230                 if (offset % p->page_size)
1231                 {
1232                         command_print(cmd_ctx, "only page size aligned offsets and sizes are supported");
1233                         return ERROR_OK;
1234                 }
1235
1236                 while (buf_cnt > 0)
1237                 {
1238                         u32 size_read;
1239
1240                         if (page)
1241                         {
1242                                 fileio_read(&fileio, page_size, page, &size_read);
1243                                 buf_cnt -= size_read;
1244                                 if (size_read < page_size)
1245                                 {
1246                                         memset(page + size_read, 0xff, page_size - size_read);
1247                                 }
1248                         }
1249
1250                         if (oob)
1251                         {
1252                                 fileio_read(&fileio, oob_size, oob, &size_read);
1253                                 buf_cnt -= size_read;
1254                                 if (size_read < oob_size)
1255                                 {
1256                                         memset(oob + size_read, 0xff, oob_size - size_read);
1257                                 }
1258                         }
1259
1260                         if (nand_write_page(p, offset / p->page_size, page, page_size, oob, oob_size) != ERROR_OK)
1261                         {
1262                                 command_print(cmd_ctx, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1263                                         args[1], args[0], offset);
1264                                 return ERROR_OK;
1265                         }
1266                         offset += page_size;
1267                 }
1268
1269                 fileio_close(&fileio);
1270
1271                 duration_stop_measure(&duration, &duration_text);
1272                 command_print(cmd_ctx, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1273                         args[1], args[0], offset, duration_text);
1274                 free(duration_text);
1275         }
1276         else
1277         {
1278                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1279         }
1280
1281         return ERROR_OK;
1282 }
1283
1284 int handle_nand_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1285 {
1286         nand_device_t *p;
1287
1288         if (argc < 4)
1289         {
1290                 command_print(cmd_ctx, "usage: nand dump <num> <filename> <address> <size> [options]");
1291                 return ERROR_OK;
1292         }
1293
1294         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1295         if (p)
1296         {
1297                 if (p->device)
1298                 {
1299                         fileio_t fileio;
1300                         duration_t duration;
1301                         char *duration_text;
1302                         int retval;
1303
1304                         u8 *page = NULL;
1305                         u32 page_size = 0;
1306                         u8 *oob = NULL;
1307                         u32 oob_size = 0;
1308                         u32 address = strtoul(args[2], NULL, 0);
1309                         u32 size = strtoul(args[3], NULL, 0);
1310                         u32 bytes_done = 0;
1311                         enum oob_formats oob_format = NAND_OOB_NONE;
1312
1313                         if (argc > 4)
1314                         {
1315                                 int i;
1316                                 for (i = 4; i < argc; i++)
1317                                 {
1318                                         if (!strcmp(args[i], "oob_raw"))
1319                                                 oob_format |= NAND_OOB_RAW;
1320                                         else if (!strcmp(args[i], "oob_only"))
1321                                                 oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
1322                                         else
1323                                                 command_print(cmd_ctx, "unknown option: '%s'", args[i]);
1324                                 }
1325                         }
1326
1327                         if ((address % p->page_size) || (size % p->page_size))
1328                         {
1329                                 command_print(cmd_ctx, "only page size aligned addresses and sizes are supported");
1330                                 return ERROR_OK;
1331                         }
1332
1333                         if (!(oob_format & NAND_OOB_ONLY))
1334                         {
1335                                 page_size = p->page_size;
1336                                 page = malloc(p->page_size);
1337                         }
1338
1339                         if (oob_format & NAND_OOB_RAW)
1340                         {
1341                                 if (p->page_size == 512)
1342                                         oob_size = 16;
1343                                 else if (p->page_size == 2048)
1344                                         oob_size = 64;
1345                                 oob = malloc(oob_size);
1346                         }
1347
1348                         if (fileio_open(&fileio, args[1], FILEIO_WRITE, FILEIO_BINARY) != ERROR_OK)
1349                         {
1350                                 command_print(cmd_ctx, "dump_image error: %s", fileio.error_str);
1351                                 return ERROR_OK;
1352                         }
1353
1354                         duration_start_measure(&duration);
1355
1356                         while (size > 0)
1357                         {
1358                                 u32 size_written;
1359                                 if ((retval = nand_read_page(p, address / p->page_size, page, page_size, oob, oob_size)) != ERROR_OK)
1360                                 {
1361                                         command_print(cmd_ctx, "reading NAND flash page failed");
1362                                         return ERROR_OK;
1363                                 }
1364
1365                                 if (page)
1366                                 {
1367                                         fileio_write(&fileio, page_size, page, &size_written);
1368                                         bytes_done += page_size;
1369                                 }
1370
1371                                 if (oob)
1372                                 {
1373                                         fileio_write(&fileio, oob_size, oob, &size_written);
1374                                         bytes_done += oob_size;
1375                                 }
1376
1377                                 size -= p->page_size;
1378                                 address += p->page_size;
1379                         }
1380
1381                         if (page)
1382                                 free(page);
1383
1384                         if (oob)
1385                                 free(oob);
1386
1387                         fileio_close(&fileio);
1388
1389                         duration_stop_measure(&duration, &duration_text);
1390                         command_print(cmd_ctx, "dumped %lli byte in %s", fileio.size, duration_text);
1391                         free(duration_text);
1392                 }
1393                 else
1394                 {
1395                         command_print(cmd_ctx, "#%i: not probed");
1396                 }
1397         }
1398         else
1399         {
1400                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1401         }
1402
1403         return ERROR_OK;
1404 }
1405
1406 int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1407 {
1408         nand_device_t *p;
1409
1410         if ((argc < 1) || (argc > 2))
1411         {
1412                 command_print(cmd_ctx, "usage: nand raw_access <num> ['enable'|'disable']");
1413                 return ERROR_OK;
1414         }
1415
1416         p = get_nand_device_by_num(strtoul(args[0], NULL, 0));
1417         if (p)
1418         {
1419                 if (p->device)
1420                 {
1421                         if (argc == 2)
1422                         {
1423                                 if (strcmp("enable", args[1]) == 0)
1424                                 {
1425                                         p->use_raw = 1;
1426                                 }
1427                                 else if (strcmp("disable", args[1]) == 0)
1428                                 {
1429                                         p->use_raw = 0;
1430                                 }
1431                                 else
1432                                 {
1433                                         command_print(cmd_ctx, "usage: nand raw_access ['enable'|disable']");
1434                                 }
1435                         }
1436
1437                         command_print(cmd_ctx, "raw access is %s", (p->use_raw) ? "enabled" : "disabled");
1438                 }
1439                 else
1440                 {
1441                         command_print(cmd_ctx, "#%i: not probed");
1442                 }
1443         }
1444         else
1445         {
1446                 command_print(cmd_ctx, "NAND flash device '#%s' is out of bounds", args[0]);
1447         }
1448
1449         return ERROR_OK;
1450 }
1451