1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
32 /* non-CFI compatible flashes */
33 non_cfi_t non_cfi_flashes[] = {
38 .dev_size = 0x10, /* 2^16 = 64KB */
39 .interface_desc = 0x0, /* x8 only device */
40 .max_buf_write_size = 0x0,
41 .num_erase_regions = 1,
44 0x0010000f, /* 16x 4KB */
52 .dev_size = 0x11, /* 2^17 = 128KB */
53 .interface_desc = 0x0, /* x8 only device */
54 .max_buf_write_size = 0x0,
55 .num_erase_regions = 1,
66 .dev_size = 0x12, /* 2^18 = 256KB */
67 .interface_desc = 0x0, /* x8 only device */
68 .max_buf_write_size = 0x0,
69 .num_erase_regions = 1,
80 .dev_size = 0x13, /* 2^19 = 512KB */
81 .interface_desc = 0x0, /* x8 only device */
82 .max_buf_write_size = 0x0,
83 .num_erase_regions = 1,
94 .dev_size = 0x13, /* 2^19 = 512KB */
95 .interface_desc = 0x2, /* x8 or x16 device */
96 .max_buf_write_size = 0x0,
97 .num_erase_regions = 1,
106 .id = 0xd6, /* ST29F400BB */
108 .dev_size = 0x13, /* 2^19 = 512KB */
109 .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
110 .max_buf_write_size = 0x0,
111 .num_erase_regions = 4,
114 0x00400000, /* 1x 16KB */
115 0x00200001, /* 2x 8KB */
116 0x00800000, /* 1x 32KB */
117 0x01000006, /* 7x 64KB */
123 .id = 0xd5, /* ST29F400BT */
125 .dev_size = 0x13, /* 2^19 = 512KB */
126 .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
127 .max_buf_write_size = 0x0,
128 .num_erase_regions = 4,
131 0x01000006, /* 7x 64KB */
132 0x00800000, /* 1x 32KB */
133 0x00200001, /* 2x 8KB */
134 0x00400000, /* 1x 16KB */
140 .id = 0x22ab, /* AM29F400BB */
142 .dev_size = 0x13, /* 2^19 = 512KB */
143 .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
144 .max_buf_write_size = 0x0,
145 .num_erase_regions = 4,
148 0x00400000, /* 1x 16KB */
149 0x00200001, /* 2x 8KB */
150 0x00800000, /* 1x 32KB */
151 0x01000006, /* 7x 64KB */
157 .id = 0x2223, /* AM29F400BT */
159 .dev_size = 0x13, /* 2^19 = 512KB */
160 .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
161 .max_buf_write_size = 0x0,
162 .num_erase_regions = 4,
165 0x01000006, /* 7x 64KB */
166 0x00800000, /* 1x 32KB */
167 0x00200001, /* 2x 8KB */
168 0x00400000, /* 1x 16KB */
173 .mfr = CFI_MFR_FUJITSU,
174 .id = 0x226b, /* AM29SL800DB */
176 .dev_size = 0x14, /* 2^20 = 1MB */
177 .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
178 .max_buf_write_size = 0x0,
179 .num_erase_regions = 4,
182 0x00400000, /* 1x 16KB */
183 0x00200001, /* 2x 8KB */
184 0x00800000, /* 1x 32KB */
185 0x0100000e, /* 15x 64KB */
195 void cfi_fixup_non_cfi(flash_bank_t *bank, void *param)
197 cfi_flash_bank_t *cfi_info = bank->driver_priv;
198 non_cfi_t *non_cfi = non_cfi_flashes;
202 if ((cfi_info->manufacturer == non_cfi->mfr)
203 && (cfi_info->device_id == non_cfi->id))
210 cfi_info->not_cfi = 1;
212 /* fill in defaults for non-critical data */
213 cfi_info->vcc_min = 0x0;
214 cfi_info->vcc_max = 0x0;
215 cfi_info->vpp_min = 0x0;
216 cfi_info->vpp_max = 0x0;
217 cfi_info->word_write_timeout_typ = 0x0;
218 cfi_info->buf_write_timeout_typ = 0x0;
219 cfi_info->block_erase_timeout_typ = 0x0;
220 cfi_info->chip_erase_timeout_typ = 0x0;
221 cfi_info->word_write_timeout_max = 0x0;
222 cfi_info->buf_write_timeout_max = 0x0;
223 cfi_info->block_erase_timeout_max = 0x0;
224 cfi_info->chip_erase_timeout_max = 0x0;
226 cfi_info->qry[0] = 'Q';
227 cfi_info->qry[1] = 'R';
228 cfi_info->qry[2] = 'Y';
230 cfi_info->pri_id = non_cfi->pri_id;
231 cfi_info->pri_addr = 0x0;
232 cfi_info->alt_id = 0x0;
233 cfi_info->alt_addr = 0x0;
234 cfi_info->alt_ext = NULL;
236 cfi_info->interface_desc = non_cfi->interface_desc;
237 cfi_info->max_buf_write_size = non_cfi->max_buf_write_size;
238 cfi_info->num_erase_regions = non_cfi->num_erase_regions;
239 cfi_info->erase_region_info = non_cfi->erase_region_info;
241 if (cfi_info->pri_id == 0x2)
243 cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
245 pri_ext->pri[0] = 'P';
246 pri_ext->pri[1] = 'R';
247 pri_ext->pri[2] = 'I';
249 pri_ext->major_version = '1';
250 pri_ext->minor_version = '0';
252 pri_ext->SiliconRevision = 0x0;
253 pri_ext->EraseSuspend = 0x0;
254 pri_ext->EraseSuspend = 0x0;
255 pri_ext->BlkProt = 0x0;
256 pri_ext->TmpBlkUnprotect = 0x0;
257 pri_ext->BlkProtUnprot = 0x0;
258 pri_ext->SimultaneousOps = 0x0;
259 pri_ext->BurstMode = 0x0;
260 pri_ext->PageMode = 0x0;
261 pri_ext->VppMin = 0x0;
262 pri_ext->VppMax = 0x0;
263 pri_ext->TopBottom = 0x0;
265 pri_ext->_reversed_geometry = 0;
267 cfi_info->pri_ext = pri_ext;
268 } else if ((cfi_info->pri_id == 0x1) || (cfi_info->pri_id == 0x3))
270 LOG_ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported");