git.sur5r.net Git - openocd/blob - src/flash/nor/avrf.c

   1 /***************************************************************************
   2  *   Copyright (C) 2009 by Simon Qian                                      *
   3  *   SimonQian@SimonQian.com                                               *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20
  21 #ifdef HAVE_CONFIG_H
  22 #include "config.h"
  23 #endif
  24
  25 #include "imp.h"
  26 #include <target/avrt.h>
  27
  28 /* AVR_JTAG_Instructions */
  29 #define AVR_JTAG_INS_LEN                                        4
  30 /* Public Instructions: */
  31 #define AVR_JTAG_INS_EXTEST                                     0x00
  32 #define AVR_JTAG_INS_IDCODE                                     0x01
  33 #define AVR_JTAG_INS_SAMPLE_PRELOAD                             0x02
  34 #define AVR_JTAG_INS_BYPASS                                     0x0F
  35 /* AVR Specified Public Instructions: */
  36 #define AVR_JTAG_INS_AVR_RESET                                  0x0C
  37 #define AVR_JTAG_INS_PROG_ENABLE                                0x04
  38 #define AVR_JTAG_INS_PROG_COMMANDS                              0x05
  39 #define AVR_JTAG_INS_PROG_PAGELOAD                              0x06
  40 #define AVR_JTAG_INS_PROG_PAGEREAD                              0x07
  41
  42 /* Data Registers: */
  43 #define AVR_JTAG_REG_Bypass_Len                                 1
  44 #define AVR_JTAG_REG_DeviceID_Len                               32
  45
  46 #define AVR_JTAG_REG_Reset_Len                                  1
  47 #define AVR_JTAG_REG_JTAGID_Len                                 32
  48 #define AVR_JTAG_REG_ProgrammingEnable_Len                      16
  49 #define AVR_JTAG_REG_ProgrammingCommand_Len                     15
  50 #define AVR_JTAG_REG_FlashDataByte_Len                          16
  51
  52 struct avrf_type {
  53         char name[15];
  54         uint16_t chip_id;
  55         int flash_page_size;
  56         int flash_page_num;
  57         int eeprom_page_size;
  58         int eeprom_page_num;
  59 };
  60
  61 struct avrf_flash_bank {
  62         int ppage_size;
  63         int probed;
  64 };
  65
  66 static struct avrf_type avft_chips_info[] = {
  67 /*      name, chip_id,  flash_page_size, flash_page_num,
  68  *                      eeprom_page_size, eeprom_page_num
  69  */
  70         {"atmega128", 0x9702, 256, 512, 8, 512},
  71         {"at90can128", 0x9781, 256, 512, 8, 512},
  72 };
  73
  74 /* avr program functions */
  75 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  76 {
  77         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  78         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
  79
  80         return ERROR_OK;
  81 }
  82
  83 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  84 {
  85         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  86         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
  87
  88         return ERROR_OK;
  89 }
  90
  91 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  92 {
  93         avr_jtag_reset(avr, 1);
  94
  95         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
  96         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
  97
  98         return ERROR_OK;
  99 }
 100
 101 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
 102 {
 103         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 104         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
 105         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
 106
 107         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 108         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
 109
 110         avr_jtag_reset(avr, 0);
 111
 112         return ERROR_OK;
 113 }
 114
 115 static int avr_jtagprg_chiperase(struct avr_common *avr)
 116 {
 117         uint32_t poll_value;
 118
 119         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 120         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
 121         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
 122         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 123         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
 124
 125         do {
 126                 poll_value = 0;
 127                 avr_jtag_senddat(avr->jtag_info.tap,
 128                         &poll_value,
 129                         0x3380,
 130                         AVR_JTAG_REG_ProgrammingCommand_Len);
 131                 if (ERROR_OK != mcu_execute_queue())
 132                         return ERROR_FAIL;
 133                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 134         } while (!(poll_value & 0x0200));
 135
 136         return ERROR_OK;
 137 }
 138
 139 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
 140         uint8_t *page_buf,
 141         uint32_t buf_size,
 142         uint32_t addr,
 143         uint32_t page_size)
 144 {
 145         uint32_t i, poll_value;
 146
 147         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 148         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
 149
 150         /* load addr high byte */
 151         avr_jtag_senddat(avr->jtag_info.tap,
 152                 NULL,
 153                 0x0700 | ((addr >> 9) & 0xFF),
 154                 AVR_JTAG_REG_ProgrammingCommand_Len);
 155
 156         /* load addr low byte */
 157         avr_jtag_senddat(avr->jtag_info.tap,
 158                 NULL,
 159                 0x0300 | ((addr >> 1) & 0xFF),
 160                 AVR_JTAG_REG_ProgrammingCommand_Len);
 161
 162         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 163
 164         for (i = 0; i < page_size; i++) {
 165                 if (i < buf_size)
 166                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 167                 else
 168                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 169         }
 170
 171         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 172
 173         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 174         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
 175         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 176         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
 177
 178         do {
 179                 poll_value = 0;
 180                 avr_jtag_senddat(avr->jtag_info.tap,
 181                         &poll_value,
 182                         0x3700,
 183                         AVR_JTAG_REG_ProgrammingCommand_Len);
 184                 if (ERROR_OK != mcu_execute_queue())
 185                         return ERROR_FAIL;
 186                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 187         } while (!(poll_value & 0x0200));
 188
 189         return ERROR_OK;
 190 }
 191
 192 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 193 {
 194         struct avrf_flash_bank *avrf_info;
 195
 196         if (CMD_ARGC < 6)
 197                 return ERROR_COMMAND_SYNTAX_ERROR;
 198
 199         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 200         bank->driver_priv = avrf_info;
 201
 202         avrf_info->probed = 0;
 203
 204         return ERROR_OK;
 205 }
 206
 207 static int avrf_erase(struct flash_bank *bank, int first, int last)
 208 {
 209         struct target *target = bank->target;
 210         struct avr_common *avr = target->arch_info;
 211         int status;
 212
 213         LOG_DEBUG("%s", __func__);
 214
 215         if (target->state != TARGET_HALTED) {
 216                 LOG_ERROR("Target not halted");
 217                 return ERROR_TARGET_NOT_HALTED;
 218         }
 219
 220         status = avr_jtagprg_enterprogmode(avr);
 221         if (status != ERROR_OK)
 222                 return status;
 223
 224         status = avr_jtagprg_chiperase(avr);
 225         if (status != ERROR_OK)
 226                 return status;
 227
 228         return avr_jtagprg_leaveprogmode(avr);
 229 }
 230
 231 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
 232 {
 233         LOG_INFO("%s", __func__);
 234         return ERROR_OK;
 235 }
 236
 237 static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
 238 {
 239         struct target *target = bank->target;
 240         struct avr_common *avr = target->arch_info;
 241         uint32_t cur_size, cur_buffer_size, page_size;
 242
 243         if (bank->target->state != TARGET_HALTED) {
 244                 LOG_ERROR("Target not halted");
 245                 return ERROR_TARGET_NOT_HALTED;
 246         }
 247
 248         page_size = bank->sectors[0].size;
 249         if ((offset % page_size) != 0) {
 250                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
 251                         offset,
 252                         page_size);
 253                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 254         }
 255
 256         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 257         LOG_DEBUG("count is %" PRId32 "", count);
 258
 259         if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
 260                 return ERROR_FAIL;
 261
 262         cur_size = 0;
 263         while (count > 0) {
 264                 if (count > page_size)
 265                         cur_buffer_size = page_size;
 266                 else
 267                         cur_buffer_size = count;
 268                 avr_jtagprg_writeflashpage(avr,
 269                         buffer + cur_size,
 270                         cur_buffer_size,
 271                         offset + cur_size,
 272                         page_size);
 273                 count -= cur_buffer_size;
 274                 cur_size += cur_buffer_size;
 275
 276                 keep_alive();
 277         }
 278
 279         return avr_jtagprg_leaveprogmode(avr);
 280 }
 281
 282 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 283 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 284 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 285
 286 static int avrf_probe(struct flash_bank *bank)
 287 {
 288         struct target *target = bank->target;
 289         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 290         struct avr_common *avr = target->arch_info;
 291         struct avrf_type *avr_info = NULL;
 292         int i;
 293         uint32_t device_id;
 294
 295         if (bank->target->state != TARGET_HALTED) {
 296                 LOG_ERROR("Target not halted");
 297                 return ERROR_TARGET_NOT_HALTED;
 298         }
 299
 300         avrf_info->probed = 0;
 301
 302         avr_jtag_read_jtagid(avr, &device_id);
 303         if (ERROR_OK != mcu_execute_queue())
 304                 return ERROR_FAIL;
 305
 306         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 307         if (EXTRACT_MFG(device_id) != 0x1F)
 308                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 309                         EXTRACT_MFG(device_id),
 310                         0x1F);
 311
 312         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
 313                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 314                         avr_info = &avft_chips_info[i];
 315                         LOG_INFO("target device is %s", avr_info->name);
 316                         break;
 317                 }
 318         }
 319
 320         if (avr_info != NULL) {
 321                 if (bank->sectors) {
 322                         free(bank->sectors);
 323                         bank->sectors = NULL;
 324                 }
 325
 326                 /* chip found */
 327                 bank->base = 0x00000000;
 328                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 329                 bank->num_sectors = avr_info->flash_page_num;
 330                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 331
 332                 for (i = 0; i < avr_info->flash_page_num; i++) {
 333                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 334                         bank->sectors[i].size = avr_info->flash_page_size;
 335                         bank->sectors[i].is_erased = -1;
 336                         bank->sectors[i].is_protected = 1;
 337                 }
 338
 339                 avrf_info->probed = 1;
 340                 return ERROR_OK;
 341         } else {
 342                 /* chip not supported */
 343                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 344
 345                 avrf_info->probed = 1;
 346                 return ERROR_FAIL;
 347         }
 348 }
 349
 350 static int avrf_auto_probe(struct flash_bank *bank)
 351 {
 352         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 353         if (avrf_info->probed)
 354                 return ERROR_OK;
 355         return avrf_probe(bank);
 356 }
 357
 358 static int avrf_protect_check(struct flash_bank *bank)
 359 {
 360         LOG_INFO("%s", __func__);
 361         return ERROR_OK;
 362 }
 363
 364 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
 365 {
 366         struct target *target = bank->target;
 367         struct avr_common *avr = target->arch_info;
 368         struct avrf_type *avr_info = NULL;
 369         int i;
 370         uint32_t device_id;
 371
 372         if (bank->target->state != TARGET_HALTED) {
 373                 LOG_ERROR("Target not halted");
 374                 return ERROR_TARGET_NOT_HALTED;
 375         }
 376
 377         avr_jtag_read_jtagid(avr, &device_id);
 378         if (ERROR_OK != mcu_execute_queue())
 379                 return ERROR_FAIL;
 380
 381         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 382         if (EXTRACT_MFG(device_id) != 0x1F)
 383                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 384                         EXTRACT_MFG(device_id),
 385                         0x1F);
 386
 387         for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
 388                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 389                         avr_info = &avft_chips_info[i];
 390                         LOG_INFO("target device is %s", avr_info->name);
 391
 392                         break;
 393                 }
 394         }
 395
 396         if (avr_info != NULL) {
 397                 /* chip found */
 398                 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 399                         EXTRACT_VER(device_id));
 400                 return ERROR_OK;
 401         } else {
 402                 /* chip not supported */
 403                 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
 404                 return ERROR_FLASH_OPERATION_FAILED;
 405         }
 406 }
 407
 408 static int avrf_mass_erase(struct flash_bank *bank)
 409 {
 410         struct target *target = bank->target;
 411         struct avr_common *avr = target->arch_info;
 412
 413         if (target->state != TARGET_HALTED) {
 414                 LOG_ERROR("Target not halted");
 415                 return ERROR_TARGET_NOT_HALTED;
 416         }
 417
 418         if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
 419             || (ERROR_OK != avr_jtagprg_chiperase(avr))
 420             || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
 421                 return ERROR_FAIL;
 422
 423         return ERROR_OK;
 424 }
 425
 426 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 427 {
 428         int i;
 429
 430         if (CMD_ARGC < 1)
 431                 return ERROR_COMMAND_SYNTAX_ERROR;
 432
 433         struct flash_bank *bank;
 434         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 435         if (ERROR_OK != retval)
 436                 return retval;
 437
 438         if (avrf_mass_erase(bank) == ERROR_OK) {
 439                 /* set all sectors as erased */
 440                 for (i = 0; i < bank->num_sectors; i++)
 441                         bank->sectors[i].is_erased = 1;
 442
 443                 command_print(CMD_CTX, "avr mass erase complete");
 444         } else
 445                 command_print(CMD_CTX, "avr mass erase failed");
 446
 447         LOG_DEBUG("%s", __func__);
 448         return ERROR_OK;
 449 }
 450
 451 static const struct command_registration avrf_exec_command_handlers[] = {
 452         {
 453                 .name = "mass_erase",
 454                 .usage = "<bank>",
 455                 .handler = avrf_handle_mass_erase_command,
 456                 .mode = COMMAND_EXEC,
 457                 .help = "erase entire device",
 458         },
 459         COMMAND_REGISTRATION_DONE
 460 };
 461 static const struct command_registration avrf_command_handlers[] = {
 462         {
 463                 .name = "avrf",
 464                 .mode = COMMAND_ANY,
 465                 .help = "AVR flash command group",
 466                 .usage = "",
 467                 .chain = avrf_exec_command_handlers,
 468         },
 469         COMMAND_REGISTRATION_DONE
 470 };
 471
 472 struct flash_driver avr_flash = {
 473         .name = "avr",
 474         .commands = avrf_command_handlers,
 475         .flash_bank_command = avrf_flash_bank_command,
 476         .erase = avrf_erase,
 477         .protect = avrf_protect,
 478         .write = avrf_write,
 479         .read = default_flash_read,
 480         .probe = avrf_probe,
 481         .auto_probe = avrf_auto_probe,
 482         .erase_check = default_flash_blank_check,
 483         .protect_check = avrf_protect_check,
 484         .info = avrf_info,
 485 };