1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
25 ***************************************************************************/
32 #include <helper/binarybuffer.h>
33 #include <target/algorithm.h>
34 #include <target/armv7m.h>
36 /* em357 register locations */
38 #define EM357_FLASH_ACR 0x40008000
39 #define EM357_FLASH_KEYR 0x40008004
40 #define EM357_FLASH_OPTKEYR 0x40008008
41 #define EM357_FLASH_SR 0x4000800C
42 #define EM357_FLASH_CR 0x40008010
43 #define EM357_FLASH_AR 0x40008014
44 #define EM357_FLASH_OBR 0x4000801C
45 #define EM357_FLASH_WRPR 0x40008020
47 #define EM357_FPEC_CLK 0x4000402c
48 /* option byte location */
50 #define EM357_OB_RDP 0x08040800
51 #define EM357_OB_WRP0 0x08040808
52 #define EM357_OB_WRP1 0x0804080A
53 #define EM357_OB_WRP2 0x0804080C
55 /* FLASH_CR register bits */
57 #define FLASH_PG (1 << 0)
58 #define FLASH_PER (1 << 1)
59 #define FLASH_MER (1 << 2)
60 #define FLASH_OPTPG (1 << 4)
61 #define FLASH_OPTER (1 << 5)
62 #define FLASH_STRT (1 << 6)
63 #define FLASH_LOCK (1 << 7)
64 #define FLASH_OPTWRE (1 << 9)
66 /* FLASH_SR register bits */
68 #define FLASH_BSY (1 << 0)
69 #define FLASH_PGERR (1 << 2)
70 #define FLASH_WRPRTERR (1 << 4)
71 #define FLASH_EOP (1 << 5)
73 /* EM357_FLASH_OBR bit definitions (reading) */
78 /* register unlock keys */
80 #define KEY1 0x45670123
81 #define KEY2 0xCDEF89AB
83 struct em357_options {
85 uint16_t user_options;
86 uint16_t protection[3];
89 struct em357_flash_bank {
90 struct em357_options option_bytes;
95 static int em357_mass_erase(struct flash_bank *bank);
97 /* flash bank em357 <base> <size> 0 0 <target#>
99 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
101 struct em357_flash_bank *em357_info;
104 return ERROR_COMMAND_SYNTAX_ERROR;
106 em357_info = malloc(sizeof(struct em357_flash_bank));
107 bank->driver_priv = em357_info;
109 em357_info->probed = 0;
114 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
116 struct target *target = bank->target;
117 return target_read_u32(target, EM357_FLASH_SR, status);
120 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
122 struct target *target = bank->target;
124 int retval = ERROR_OK;
126 /* wait for busy to clear */
128 retval = em357_get_flash_status(bank, &status);
129 if (retval != ERROR_OK)
131 LOG_DEBUG("status: 0x%" PRIx32 "", status);
132 if ((status & FLASH_BSY) == 0)
134 if (timeout-- <= 0) {
135 LOG_ERROR("timed out waiting for flash");
141 if (status & FLASH_WRPRTERR) {
142 LOG_ERROR("em357 device protected");
146 if (status & FLASH_PGERR) {
147 LOG_ERROR("em357 device programming failed");
151 /* Clear but report errors */
152 if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
153 /* If this operation fails, we ignore it and report the original
156 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
161 static int em357_read_options(struct flash_bank *bank)
164 struct em357_flash_bank *em357_info = NULL;
165 struct target *target = bank->target;
167 em357_info = bank->driver_priv;
169 /* read current option bytes */
170 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
171 if (retval != ERROR_OK)
174 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
175 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
177 if (optiondata & (1 << OPT_READOUT))
178 LOG_INFO("Device Security Bit Set");
180 /* each bit refers to a 4bank protection */
181 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
182 if (retval != ERROR_OK)
185 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
186 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
187 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
192 static int em357_erase_options(struct flash_bank *bank)
194 struct em357_flash_bank *em357_info = NULL;
195 struct target *target = bank->target;
197 em357_info = bank->driver_priv;
199 /* read current options */
200 em357_read_options(bank);
202 /* unlock flash registers */
203 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
204 if (retval != ERROR_OK)
207 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
208 if (retval != ERROR_OK)
211 /* unlock option flash registers */
212 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
213 if (retval != ERROR_OK)
215 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
216 if (retval != ERROR_OK)
219 /* erase option bytes */
220 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
221 if (retval != ERROR_OK)
223 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
224 if (retval != ERROR_OK)
227 retval = em357_wait_status_busy(bank, 10);
228 if (retval != ERROR_OK)
231 /* clear readout protection and complementary option bytes
232 * this will also force a device unlock if set */
233 em357_info->option_bytes.RDP = 0x5AA5;
238 static int em357_write_options(struct flash_bank *bank)
240 struct em357_flash_bank *em357_info = NULL;
241 struct target *target = bank->target;
243 em357_info = bank->driver_priv;
245 /* unlock flash registers */
246 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
247 if (retval != ERROR_OK)
249 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
250 if (retval != ERROR_OK)
253 /* unlock option flash registers */
254 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
255 if (retval != ERROR_OK)
257 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
258 if (retval != ERROR_OK)
261 /* program option bytes */
262 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
263 if (retval != ERROR_OK)
266 retval = em357_wait_status_busy(bank, 10);
267 if (retval != ERROR_OK)
270 /* write protection byte 1 */
271 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
272 if (retval != ERROR_OK)
275 retval = em357_wait_status_busy(bank, 10);
276 if (retval != ERROR_OK)
279 /* write protection byte 2 */
280 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
281 if (retval != ERROR_OK)
284 retval = em357_wait_status_busy(bank, 10);
285 if (retval != ERROR_OK)
288 /* write protection byte 3 */
289 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
290 if (retval != ERROR_OK)
293 retval = em357_wait_status_busy(bank, 10);
294 if (retval != ERROR_OK)
297 /* write readout protection bit */
298 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
299 if (retval != ERROR_OK)
302 retval = em357_wait_status_busy(bank, 10);
303 if (retval != ERROR_OK)
306 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
307 if (retval != ERROR_OK)
313 static int em357_protect_check(struct flash_bank *bank)
315 struct target *target = bank->target;
316 struct em357_flash_bank *em357_info = bank->driver_priv;
323 if (target->state != TARGET_HALTED) {
324 LOG_ERROR("Target not halted");
325 return ERROR_TARGET_NOT_HALTED;
328 /* each bit refers to a 4bank protection (bit 0-23) */
329 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
330 if (retval != ERROR_OK)
333 /* each protection bit is for 4 * 2K pages */
334 num_bits = (bank->num_sectors / em357_info->ppage_size);
336 for (i = 0; i < num_bits; i++) {
338 if (protection & (1 << i))
341 for (s = 0; s < em357_info->ppage_size; s++)
342 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
348 static int em357_erase(struct flash_bank *bank, int first, int last)
350 struct target *target = bank->target;
353 if (bank->target->state != TARGET_HALTED) {
354 LOG_ERROR("Target not halted");
355 return ERROR_TARGET_NOT_HALTED;
358 if ((first == 0) && (last == (bank->num_sectors - 1)))
359 return em357_mass_erase(bank);
361 /* Enable FPEC clock */
362 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
364 /* unlock flash registers */
365 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
366 if (retval != ERROR_OK)
368 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
369 if (retval != ERROR_OK)
372 for (i = first; i <= last; i++) {
373 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
374 if (retval != ERROR_OK)
376 retval = target_write_u32(target, EM357_FLASH_AR,
377 bank->base + bank->sectors[i].offset);
378 if (retval != ERROR_OK)
380 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
381 if (retval != ERROR_OK)
384 retval = em357_wait_status_busy(bank, 100);
385 if (retval != ERROR_OK)
388 bank->sectors[i].is_erased = 1;
391 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
392 if (retval != ERROR_OK)
398 static int em357_protect(struct flash_bank *bank, int set, int first, int last)
400 struct em357_flash_bank *em357_info = NULL;
401 struct target *target = bank->target;
402 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
407 em357_info = bank->driver_priv;
409 if (target->state != TARGET_HALTED) {
410 LOG_ERROR("Target not halted");
411 return ERROR_TARGET_NOT_HALTED;
414 if ((first % em357_info->ppage_size) != 0) {
415 LOG_WARNING("aligned start protect sector to a %d sector boundary",
416 em357_info->ppage_size);
417 first = first - (first % em357_info->ppage_size);
419 if (((last + 1) % em357_info->ppage_size) != 0) {
420 LOG_WARNING("aligned end protect sector to a %d sector boundary",
421 em357_info->ppage_size);
423 last = last - (last % em357_info->ppage_size);
427 /* each bit refers to a 4bank protection */
428 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
429 if (retval != ERROR_OK)
432 prot_reg[0] = (uint16_t)protection;
433 prot_reg[1] = (uint16_t)(protection >> 8);
434 prot_reg[2] = (uint16_t)(protection >> 16);
436 for (i = first; i <= last; i++) {
437 reg = (i / em357_info->ppage_size) / 8;
438 bit = (i / em357_info->ppage_size) - (reg * 8);
440 LOG_WARNING("reg, bit: %d, %d", reg, bit);
442 prot_reg[reg] &= ~(1 << bit);
444 prot_reg[reg] |= (1 << bit);
447 status = em357_erase_options(bank);
448 if (retval != ERROR_OK)
451 em357_info->option_bytes.protection[0] = prot_reg[0];
452 em357_info->option_bytes.protection[1] = prot_reg[1];
453 em357_info->option_bytes.protection[2] = prot_reg[2];
455 return em357_write_options(bank);
458 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
459 uint32_t offset, uint32_t count)
461 struct target *target = bank->target;
462 uint32_t buffer_size = 16384;
463 struct working_area *write_algorithm;
464 struct working_area *source;
465 uint32_t address = bank->base + offset;
466 struct reg_param reg_params[4];
467 struct armv7m_algorithm armv7m_info;
468 int retval = ERROR_OK;
470 /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
471 * a modified *_FLASH_BASE */
473 static const uint8_t em357_flash_write_code[] = {
474 /* #define EM357_FLASH_CR_OFFSET 0x10
475 * #define EM357_FLASH_SR_OFFSET 0x0C
477 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
478 0x1c, 0x44, /* add r4, r3 */
479 /* write_half_word: */
480 0x01, 0x23, /* movs r3, #0x01 */
481 0x23, 0x61, /* str r3, [r4,
482 *#EM357_FLASH_CR_OFFSET] */
483 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
484 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
486 0xe3, 0x68, /* ldr r3, [r4,
487 *#EM357_FLASH_SR_OFFSET] */
488 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
489 0xfb, 0xd0, /* beq busy */
490 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
491 0x01, 0xd1, /* bne exit */
492 0x01, 0x3a, /* subs r2, r2, #0x01 */
493 0xf0, 0xd1, /* bne write_half_word */
495 0x00, 0xbe, /* bkpt #0x00 */
496 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
499 /* flash write code */
500 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
501 &write_algorithm) != ERROR_OK) {
502 LOG_WARNING("no working area available, can't do block memory writes");
503 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
507 retval = target_write_buffer(target, write_algorithm->address,
508 sizeof(em357_flash_write_code), em357_flash_write_code);
509 if (retval != ERROR_OK)
513 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
515 if (buffer_size <= 256) {
516 /* we already allocated the writing code, but failed to get a
517 * buffer, free the algorithm */
518 target_free_working_area(target, write_algorithm);
521 "no large enough working area available, can't do block memory writes");
522 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
526 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
527 armv7m_info.core_mode = ARM_MODE_THREAD;
529 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
530 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
531 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
532 init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT);
535 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
536 (buffer_size / 2) : count;
538 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
539 if (retval != ERROR_OK)
542 buf_set_u32(reg_params[0].value, 0, 32, source->address);
543 buf_set_u32(reg_params[1].value, 0, 32, address);
544 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
545 buf_set_u32(reg_params[3].value, 0, 32, 0);
547 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
548 write_algorithm->address, 0, 10000, &armv7m_info);
549 if (retval != ERROR_OK) {
550 LOG_ERROR("error executing em357 flash write algorithm");
554 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
555 LOG_ERROR("flash memory not erased before writing");
556 /* Clear but report errors */
557 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
562 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
563 LOG_ERROR("flash memory write protected");
564 /* Clear but report errors */
565 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
570 buffer += thisrun_count * 2;
571 address += thisrun_count * 2;
572 count -= thisrun_count;
575 target_free_working_area(target, source);
576 target_free_working_area(target, write_algorithm);
578 destroy_reg_param(®_params[0]);
579 destroy_reg_param(®_params[1]);
580 destroy_reg_param(®_params[2]);
581 destroy_reg_param(®_params[3]);
586 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
587 uint32_t offset, uint32_t count)
589 struct target *target = bank->target;
590 uint32_t words_remaining = (count / 2);
591 uint32_t bytes_remaining = (count & 0x00000001);
592 uint32_t address = bank->base + offset;
593 uint32_t bytes_written = 0;
596 if (bank->target->state != TARGET_HALTED) {
597 LOG_ERROR("Target not halted");
598 return ERROR_TARGET_NOT_HALTED;
602 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
603 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
606 /* unlock flash registers */
607 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
608 if (retval != ERROR_OK)
610 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
611 if (retval != ERROR_OK)
614 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
616 /* multiple half words (2-byte) to be programmed? */
617 if (words_remaining > 0) {
618 /* try using a block write */
619 retval = em357_write_block(bank, buffer, offset, words_remaining);
620 if (retval != ERROR_OK) {
621 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
622 /* if block write failed (no sufficient working area),
623 * we use normal (slow) single dword accesses */
625 "couldn't use block writes, falling back to single memory accesses");
628 buffer += words_remaining * 2;
629 address += words_remaining * 2;
634 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
637 while (words_remaining > 0) {
639 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
641 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
642 if (retval != ERROR_OK)
644 retval = target_write_u16(target, address, value);
645 if (retval != ERROR_OK)
648 retval = em357_wait_status_busy(bank, 5);
649 if (retval != ERROR_OK)
657 if (bytes_remaining) {
658 uint16_t value = 0xffff;
659 memcpy(&value, buffer + bytes_written, bytes_remaining);
661 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
662 if (retval != ERROR_OK)
664 retval = target_write_u16(target, address, value);
665 if (retval != ERROR_OK)
668 retval = em357_wait_status_busy(bank, 5);
669 if (retval != ERROR_OK)
673 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
676 static int em357_probe(struct flash_bank *bank)
678 struct target *target = bank->target;
679 struct em357_flash_bank *em357_info = bank->driver_priv;
683 uint32_t base_address = 0x08000000;
685 em357_info->probed = 0;
687 switch (bank->size) {
689 /* 64k -- 64 1k pages */
694 /* 128k -- 128 1k pages */
699 /* 192k -- 96 2k pages */
704 /* 256k -- 128 2k pages */
709 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
715 /* Enable FPEC CLK */
716 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
717 if (retval != ERROR_OK)
720 em357_info->ppage_size = 4;
722 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
726 bank->sectors = NULL;
729 bank->base = base_address;
730 bank->size = (num_pages * page_size);
731 bank->num_sectors = num_pages;
732 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
734 for (i = 0; i < num_pages; i++) {
735 bank->sectors[i].offset = i * page_size;
736 bank->sectors[i].size = page_size;
737 bank->sectors[i].is_erased = -1;
738 bank->sectors[i].is_protected = 1;
741 em357_info->probed = 1;
746 static int em357_auto_probe(struct flash_bank *bank)
748 struct em357_flash_bank *em357_info = bank->driver_priv;
749 if (em357_info->probed)
751 return em357_probe(bank);
754 COMMAND_HANDLER(em357_handle_lock_command)
756 struct target *target = NULL;
757 struct em357_flash_bank *em357_info = NULL;
760 return ERROR_COMMAND_SYNTAX_ERROR;
762 struct flash_bank *bank;
763 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
764 if (ERROR_OK != retval)
767 em357_info = bank->driver_priv;
769 target = bank->target;
771 if (target->state != TARGET_HALTED) {
772 LOG_ERROR("Target not halted");
773 return ERROR_TARGET_NOT_HALTED;
776 if (em357_erase_options(bank) != ERROR_OK) {
777 command_print(CMD_CTX, "em357 failed to erase options");
781 /* set readout protection */
782 em357_info->option_bytes.RDP = 0;
784 if (em357_write_options(bank) != ERROR_OK) {
785 command_print(CMD_CTX, "em357 failed to lock device");
789 command_print(CMD_CTX, "em357 locked");
794 COMMAND_HANDLER(em357_handle_unlock_command)
796 struct target *target = NULL;
799 return ERROR_COMMAND_SYNTAX_ERROR;
801 struct flash_bank *bank;
802 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
803 if (ERROR_OK != retval)
806 target = bank->target;
808 if (target->state != TARGET_HALTED) {
809 LOG_ERROR("Target not halted");
810 return ERROR_TARGET_NOT_HALTED;
813 if (em357_erase_options(bank) != ERROR_OK) {
814 command_print(CMD_CTX, "em357 failed to unlock device");
818 if (em357_write_options(bank) != ERROR_OK) {
819 command_print(CMD_CTX, "em357 failed to lock device");
823 command_print(CMD_CTX, "em357 unlocked.\n"
824 "INFO: a reset or power cycle is required "
825 "for the new settings to take effect.");
830 static int em357_mass_erase(struct flash_bank *bank)
832 struct target *target = bank->target;
834 if (target->state != TARGET_HALTED) {
835 LOG_ERROR("Target not halted");
836 return ERROR_TARGET_NOT_HALTED;
839 /* Make sure the flash clock is on */
840 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
842 /* unlock option flash registers */
843 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
844 if (retval != ERROR_OK)
846 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
847 if (retval != ERROR_OK)
850 /* mass erase flash memory */
851 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
852 if (retval != ERROR_OK)
854 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
855 if (retval != ERROR_OK)
858 retval = em357_wait_status_busy(bank, 100);
859 if (retval != ERROR_OK)
862 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
863 if (retval != ERROR_OK)
869 COMMAND_HANDLER(em357_handle_mass_erase_command)
874 return ERROR_COMMAND_SYNTAX_ERROR;
876 struct flash_bank *bank;
877 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
878 if (ERROR_OK != retval)
881 retval = em357_mass_erase(bank);
882 if (retval == ERROR_OK) {
883 /* set all sectors as erased */
884 for (i = 0; i < bank->num_sectors; i++)
885 bank->sectors[i].is_erased = 1;
887 command_print(CMD_CTX, "em357 mass erase complete");
889 command_print(CMD_CTX, "em357 mass erase failed");
894 static const struct command_registration em357_exec_command_handlers[] = {
898 .handler = em357_handle_lock_command,
899 .mode = COMMAND_EXEC,
900 .help = "Lock entire flash device.",
905 .handler = em357_handle_unlock_command,
906 .mode = COMMAND_EXEC,
907 .help = "Unlock entire protected flash device.",
910 .name = "mass_erase",
912 .handler = em357_handle_mass_erase_command,
913 .mode = COMMAND_EXEC,
914 .help = "Erase entire flash device.",
916 COMMAND_REGISTRATION_DONE
919 static const struct command_registration em357_command_handlers[] = {
923 .help = "em357 flash command group",
925 .chain = em357_exec_command_handlers,
927 COMMAND_REGISTRATION_DONE
930 struct flash_driver em357_flash = {
932 .commands = em357_command_handlers,
933 .flash_bank_command = em357_flash_bank_command,
934 .erase = em357_erase,
935 .protect = em357_protect,
936 .write = em357_write,
937 .read = default_flash_read,
938 .probe = em357_probe,
939 .auto_probe = em357_auto_probe,
940 .erase_check = default_flash_blank_check,
941 .protect_check = em357_protect_check,