git.sur5r.net Git - openocd/blob - src/flash/nor/kinetis.c

   1 /***************************************************************************
   2  *   Copyright (C) 2011 by Mathias Kuester                                 *
   3  *   kesmtp@freenet.de                                                     *
   4  *                                                                         *
   5  *   Copyright (C) 2011 sleep(5) ltd                                       *
   6  *   tomas@sleepfive.com                                                   *
   7  *                                                                         *
   8  *   Copyright (C) 2012 by Christopher D. Kilgour                          *
   9  *   techie at whiterocker.com                                             *
  10  *                                                                         *
  11  *   Copyright (C) 2013 Nemui Trinomius                                    *
  12  *   nemuisan_kawausogasuki@live.jp                                        *
  13  *                                                                         *
  14  *   Copyright (C) 2015 Tomas Vanek                                        *
  15  *   vanekt@fbl.cz                                                         *
  16  *                                                                         *
  17  *   This program is free software; you can redistribute it and/or modify  *
  18  *   it under the terms of the GNU General Public License as published by  *
  19  *   the Free Software Foundation; either version 2 of the License, or     *
  20  *   (at your option) any later version.                                   *
  21  *                                                                         *
  22  *   This program is distributed in the hope that it will be useful,       *
  23  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  24  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  25  *   GNU General Public License for more details.                          *
  26  *                                                                         *
  27  *   You should have received a copy of the GNU General Public License     *
  28  *   along with this program; if not, write to the                         *
  29  *   Free Software Foundation, Inc.,                                       *
  30  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  31  ***************************************************************************/
  32
  33 #ifdef HAVE_CONFIG_H
  34 #include "config.h"
  35 #endif
  36
  37 #include "jtag/interface.h"
  38 #include "imp.h"
  39 #include <helper/binarybuffer.h>
  40 #include <target/target_type.h>
  41 #include <target/algorithm.h>
  42 #include <target/armv7m.h>
  43 #include <target/cortex_m.h>
  44
  45 /*
  46  * Implementation Notes
  47  *
  48  * The persistent memories in the Kinetis chip families K10 through
  49  * K70 are all manipulated with the Flash Memory Module.  Some
  50  * variants call this module the FTFE, others call it the FTFL.  To
  51  * indicate that both are considered here, we use FTFX.
  52  *
  53  * Within the module, according to the chip variant, the persistent
  54  * memory is divided into what Freescale terms Program Flash, FlexNVM,
  55  * and FlexRAM.  All chip variants have Program Flash.  Some chip
  56  * variants also have FlexNVM and FlexRAM, which always appear
  57  * together.
  58  *
  59  * A given Kinetis chip may have 1, 2 or 4 blocks of flash.  Here we map
  60  * each block to a separate bank.  Each block size varies by chip and
  61  * may be determined by the read-only SIM_FCFG1 register.  The sector
  62  * size within each bank/block varies by chip, and may be 1, 2 or 4k.
  63  * The sector size may be different for flash and FlexNVM.
  64  *
  65  * The first half of the flash (1 or 2 blocks) is always Program Flash
  66  * and always starts at address 0x00000000.  The "PFLSH" flag, bit 23
  67  * of the read-only SIM_FCFG2 register, determines whether the second
  68  * half of the flash is also Program Flash or FlexNVM+FlexRAM.  When
  69  * PFLSH is set, the second from the first half.  When PFLSH is clear,
  70  * the second half of flash is FlexNVM and always starts at address
  71  * 0x10000000.  FlexRAM, which is also present when PFLSH is clear,
  72  * always starts at address 0x14000000.
  73  *
  74  * The Flash Memory Module provides a register set where flash
  75  * commands are loaded to perform flash operations like erase and
  76  * program.  Different commands are available depending on whether
  77  * Program Flash or FlexNVM/FlexRAM is being manipulated.  Although
  78  * the commands used are quite consistent between flash blocks, the
  79  * parameters they accept differ according to the flash sector size.
  80  *
  81  */
  82
  83 /* Addressess */
  84 #define FLEXRAM         0x14000000
  85 #define FTFx_FSTAT      0x40020000
  86 #define FTFx_FCNFG      0x40020001
  87 #define FTFx_FCCOB3     0x40020004
  88 #define FTFx_FPROT3     0x40020010
  89 #define FTFx_FDPROT     0x40020017
  90 #define SIM_SDID        0x40048024
  91 #define SIM_SOPT1       0x40047000
  92 #define SIM_FCFG1       0x4004804c
  93 #define SIM_FCFG2       0x40048050
  94 #define WDOG_STCTRH     0x40052000
  95
  96 /* Commands */
  97 #define FTFx_CMD_BLOCKSTAT  0x00
  98 #define FTFx_CMD_SECTSTAT   0x01
  99 #define FTFx_CMD_LWORDPROG  0x06
 100 #define FTFx_CMD_SECTERASE  0x09
 101 #define FTFx_CMD_SECTWRITE  0x0b
 102 #define FTFx_CMD_MASSERASE  0x44
 103 #define FTFx_CMD_PGMPART    0x80
 104 #define FTFx_CMD_SETFLEXRAM 0x81
 105
 106 /* The older Kinetis K series uses the following SDID layout :
 107  * Bit 31-16 : 0
 108  * Bit 15-12 : REVID
 109  * Bit 11-7  : DIEID
 110  * Bit 6-4   : FAMID
 111  * Bit 3-0   : PINID
 112  *
 113  * The newer Kinetis series uses the following SDID layout :
 114  * Bit 31-28 : FAMID
 115  * Bit 27-24 : SUBFAMID
 116  * Bit 23-20 : SERIESID
 117  * Bit 19-16 : SRAMSIZE
 118  * Bit 15-12 : REVID
 119  * Bit 6-4   : Reserved (0)
 120  * Bit 3-0   : PINID
 121  *
 122  * We assume that if bits 31-16 are 0 then it's an older
 123  * K-series MCU.
 124  */
 125
 126 #define KINETIS_SOPT1_RAMSIZE_MASK  0x0000F000
 127 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
 128
 129 #define KINETIS_SDID_K_SERIES_MASK  0x0000FFFF
 130
 131 #define KINETIS_SDID_DIEID_MASK 0x00000F80
 132
 133 #define KINETIS_SDID_DIEID_K22FN128     0x00000680 /* smaller pflash with FTFA */
 134 #define KINETIS_SDID_DIEID_K22FN256     0x00000A80
 135 #define KINETIS_SDID_DIEID_K22FN512     0x00000E80
 136 #define KINETIS_SDID_DIEID_K24FN256     0x00000700
 137
 138 #define KINETIS_SDID_DIEID_K24FN1M      0x00000300 /* Detect Errata 7534 */
 139
 140 /* We can't rely solely on the FAMID field to determine the MCU
 141  * type since some FAMID values identify multiple MCUs with
 142  * different flash sector sizes (K20 and K22 for instance).
 143  * Therefore we combine it with the DIEID bits which may possibly
 144  * break if Freescale bumps the DIEID for a particular MCU. */
 145 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
 146 #define KINETIS_K_SDID_K10_M50   0x00000000
 147 #define KINETIS_K_SDID_K10_M72   0x00000080
 148 #define KINETIS_K_SDID_K10_M100  0x00000100
 149 #define KINETIS_K_SDID_K10_M120  0x00000180
 150 #define KINETIS_K_SDID_K11               0x00000220
 151 #define KINETIS_K_SDID_K12               0x00000200
 152 #define KINETIS_K_SDID_K20_M50   0x00000010
 153 #define KINETIS_K_SDID_K20_M72   0x00000090
 154 #define KINETIS_K_SDID_K20_M100  0x00000110
 155 #define KINETIS_K_SDID_K20_M120  0x00000190
 156 #define KINETIS_K_SDID_K21_M50   0x00000230
 157 #define KINETIS_K_SDID_K21_M120  0x00000330
 158 #define KINETIS_K_SDID_K22_M50   0x00000210
 159 #define KINETIS_K_SDID_K22_M120  0x00000310
 160 #define KINETIS_K_SDID_K30_M72   0x000000A0
 161 #define KINETIS_K_SDID_K30_M100  0x00000120
 162 #define KINETIS_K_SDID_K40_M72   0x000000B0
 163 #define KINETIS_K_SDID_K40_M100  0x00000130
 164 #define KINETIS_K_SDID_K50_M72   0x000000E0
 165 #define KINETIS_K_SDID_K51_M72   0x000000F0
 166 #define KINETIS_K_SDID_K53               0x00000170
 167 #define KINETIS_K_SDID_K60_M100  0x00000140
 168 #define KINETIS_K_SDID_K60_M150  0x000001C0
 169 #define KINETIS_K_SDID_K70_M150  0x000001D0
 170
 171 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
 172 #define KINETIS_SDID_SERIESID_K   0x00000000
 173 #define KINETIS_SDID_SERIESID_KL   0x00100000
 174 #define KINETIS_SDID_SERIESID_KW   0x00500000
 175 #define KINETIS_SDID_SERIESID_KV   0x00600000
 176
 177 #define KINETIS_SDID_SUBFAMID_MASK  0x0F000000
 178 #define KINETIS_SDID_SUBFAMID_KX0   0x00000000
 179 #define KINETIS_SDID_SUBFAMID_KX1   0x01000000
 180 #define KINETIS_SDID_SUBFAMID_KX2   0x02000000
 181 #define KINETIS_SDID_SUBFAMID_KX3   0x03000000
 182 #define KINETIS_SDID_SUBFAMID_KX4   0x04000000
 183 #define KINETIS_SDID_SUBFAMID_KX5   0x05000000
 184 #define KINETIS_SDID_SUBFAMID_KX6   0x06000000
 185
 186 #define KINETIS_SDID_FAMILYID_MASK  0xF0000000
 187 #define KINETIS_SDID_FAMILYID_K0X   0x00000000
 188 #define KINETIS_SDID_FAMILYID_K1X   0x10000000
 189 #define KINETIS_SDID_FAMILYID_K2X   0x20000000
 190 #define KINETIS_SDID_FAMILYID_K3X   0x30000000
 191 #define KINETIS_SDID_FAMILYID_K4X   0x40000000
 192 #define KINETIS_SDID_FAMILYID_K6X   0x60000000
 193 #define KINETIS_SDID_FAMILYID_K7X   0x70000000
 194
 195 struct kinetis_flash_bank {
 196         bool probed;
 197         uint32_t sector_size;
 198         uint32_t max_flash_prog_size;
 199         uint32_t protection_size;
 200         uint32_t prog_base;             /* base address for FTFx operations */
 201                                         /* same as bank->base for pflash, differs for FlexNVM */
 202         uint32_t protection_block;      /* number of first protection block in this bank */
 203
 204         uint32_t sim_sdid;
 205         uint32_t sim_fcfg1;
 206         uint32_t sim_fcfg2;
 207
 208         enum {
 209                 FC_AUTO = 0,
 210                 FC_PFLASH,
 211                 FC_FLEX_NVM,
 212                 FC_FLEX_RAM,
 213         } flash_class;
 214
 215         enum {
 216                 FS_PROGRAM_SECTOR = 1,
 217                 FS_PROGRAM_LONGWORD = 2,
 218                 FS_PROGRAM_PHRASE = 4, /* Unsupported */
 219         } flash_support;
 220 };
 221
 222 #define MDM_REG_STAT            0x00
 223 #define MDM_REG_CTRL            0x04
 224 #define MDM_REG_ID              0xfc
 225
 226 #define MDM_STAT_FMEACK         (1<<0)
 227 #define MDM_STAT_FREADY         (1<<1)
 228 #define MDM_STAT_SYSSEC         (1<<2)
 229 #define MDM_STAT_SYSRES         (1<<3)
 230 #define MDM_STAT_FMEEN          (1<<5)
 231 #define MDM_STAT_BACKDOOREN     (1<<6)
 232 #define MDM_STAT_LPEN           (1<<7)
 233 #define MDM_STAT_VLPEN          (1<<8)
 234 #define MDM_STAT_LLSMODEXIT     (1<<9)
 235 #define MDM_STAT_VLLSXMODEXIT   (1<<10)
 236 #define MDM_STAT_CORE_HALTED    (1<<16)
 237 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
 238 #define MDM_STAT_CORESLEEPING   (1<<18)
 239
 240 #define MEM_CTRL_FMEIP          (1<<0)
 241 #define MEM_CTRL_DBG_DIS        (1<<1)
 242 #define MEM_CTRL_DBG_REQ        (1<<2)
 243 #define MEM_CTRL_SYS_RES_REQ    (1<<3)
 244 #define MEM_CTRL_CORE_HOLD_RES  (1<<4)
 245 #define MEM_CTRL_VLLSX_DBG_REQ  (1<<5)
 246 #define MEM_CTRL_VLLSX_DBG_ACK  (1<<6)
 247 #define MEM_CTRL_VLLSX_STAT_ACK (1<<7)
 248
 249 #define MDM_ACCESS_TIMEOUT      3000 /* iterations */
 250
 251 static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
 252 {
 253         int retval;
 254         LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 255
 256         retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value);
 257         if (retval != ERROR_OK) {
 258                 LOG_DEBUG("MDM: failed to queue a write request");
 259                 return retval;
 260         }
 261
 262         retval = dap_run(dap);
 263         if (retval != ERROR_OK) {
 264                 LOG_DEBUG("MDM: dap_run failed");
 265                 return retval;
 266         }
 267
 268
 269         return ERROR_OK;
 270 }
 271
 272 static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
 273 {
 274         int retval;
 275
 276         retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result);
 277         if (retval != ERROR_OK) {
 278                 LOG_DEBUG("MDM: failed to queue a read request");
 279                 return retval;
 280         }
 281
 282         retval = dap_run(dap);
 283         if (retval != ERROR_OK) {
 284                 LOG_DEBUG("MDM: dap_run failed");
 285                 return retval;
 286         }
 287
 288         LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32, reg, *result);
 289         return ERROR_OK;
 290 }
 291
 292 static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
 293 {
 294         uint32_t val;
 295         int retval;
 296         int timeout = MDM_ACCESS_TIMEOUT;
 297
 298         do {
 299                 retval = kinetis_mdm_read_register(dap, reg, &val);
 300                 if (retval != ERROR_OK || (val & mask) == value)
 301                         return retval;
 302
 303                 alive_sleep(1);
 304         } while (timeout--);
 305
 306         LOG_DEBUG("MDM: polling timed out");
 307         return ERROR_FAIL;
 308 }
 309
 310 /*
 311  * This function implements the procedure to mass erase the flash via
 312  * SWD/JTAG on Kinetis K and L series of devices as it is described in
 313  * AN4835 "Production Flash Programming Best Practices for Kinetis K-
 314  * and L-series MCUs" Section 4.2.1
 315  */
 316 COMMAND_HANDLER(kinetis_mdm_mass_erase)
 317 {
 318         struct target *target = get_current_target(CMD_CTX);
 319         struct cortex_m_common *cortex_m = target_to_cm(target);
 320         struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
 321
 322         if (!dap) {
 323                 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
 324                 return ERROR_FAIL;
 325         }
 326
 327         int retval;
 328
 329         /*
 330          * ... Power on the processor, or if power has already been
 331          * applied, assert the RESET pin to reset the processor. For
 332          * devices that do not have a RESET pin, write the System
 333          * Reset Request bit in the MDM-AP control register after
 334          * establishing communication...
 335          */
 336
 337         /* assert SRST */
 338         if (jtag_get_reset_config() & RESET_HAS_SRST)
 339                 adapter_assert_reset();
 340         else
 341                 LOG_WARNING("Attempting mass erase without hardware reset. This is not reliable; "
 342                             "it's recommended you connect SRST and use ``reset_config srst_only''.");
 343
 344         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
 345         if (retval != ERROR_OK)
 346                 return retval;
 347
 348         /*
 349          * ... Read the MDM-AP status register until the Flash Ready bit sets...
 350          */
 351         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 352                                            MDM_STAT_FREADY | MDM_STAT_SYSRES,
 353                                            MDM_STAT_FREADY);
 354         if (retval != ERROR_OK) {
 355                 LOG_ERROR("MDM : flash ready timeout");
 356                 return retval;
 357         }
 358
 359         /*
 360          * ... Write the MDM-AP control register to set the Flash Mass
 361          * Erase in Progress bit. This will start the mass erase
 362          * process...
 363          */
 364         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL,
 365                                             MEM_CTRL_SYS_RES_REQ | MEM_CTRL_FMEIP);
 366         if (retval != ERROR_OK)
 367                 return retval;
 368
 369         /* As a sanity check make sure that device started mass erase procedure */
 370         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 371                                            MDM_STAT_FMEACK, MDM_STAT_FMEACK);
 372         if (retval != ERROR_OK)
 373                 return retval;
 374
 375         /*
 376          * ... Read the MDM-AP control register until the Flash Mass
 377          * Erase in Progress bit clears...
 378          */
 379         retval = kinetis_mdm_poll_register(dap, MDM_REG_CTRL,
 380                                            MEM_CTRL_FMEIP,
 381                                            0);
 382         if (retval != ERROR_OK)
 383                 return retval;
 384
 385         /*
 386          * ... Negate the RESET signal or clear the System Reset Request
 387          * bit in the MDM-AP control register...
 388          */
 389         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, 0);
 390         if (retval != ERROR_OK)
 391                 return retval;
 392
 393         if (jtag_get_reset_config() & RESET_HAS_SRST) {
 394                 /* halt MCU otherwise it loops in hard fault - WDOG reset cycle */
 395                 target->reset_halt = true;
 396                 target->type->assert_reset(target);
 397                 target->type->deassert_reset(target);
 398         }
 399
 400         return ERROR_OK;
 401 }
 402
 403 static const uint32_t kinetis_known_mdm_ids[] = {
 404         0x001C0000,     /* Kinetis-K Series */
 405         0x001C0020,     /* Kinetis-L/M/V/E Series */
 406 };
 407
 408 /*
 409  * This function implements the procedure to connect to
 410  * SWD/JTAG on Kinetis K and L series of devices as it is described in
 411  * AN4835 "Production Flash Programming Best Practices for Kinetis K-
 412  * and L-series MCUs" Section 4.1.1
 413  */
 414 COMMAND_HANDLER(kinetis_check_flash_security_status)
 415 {
 416         struct target *target = get_current_target(CMD_CTX);
 417         struct cortex_m_common *cortex_m = target_to_cm(target);
 418         struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
 419
 420         if (!dap) {
 421                 LOG_WARNING("Cannot check flash security status with a high-level adapter");
 422                 return ERROR_OK;
 423         }
 424
 425         uint32_t val;
 426         int retval;
 427
 428         /*
 429          * ... The MDM-AP ID register can be read to verify that the
 430          * connection is working correctly...
 431          */
 432         retval = kinetis_mdm_read_register(dap, MDM_REG_ID, &val);
 433         if (retval != ERROR_OK) {
 434                 LOG_ERROR("MDM: failed to read ID register");
 435                 goto fail;
 436         }
 437
 438         bool found = false;
 439         for (size_t i = 0; i < ARRAY_SIZE(kinetis_known_mdm_ids); i++) {
 440                 if (val == kinetis_known_mdm_ids[i]) {
 441                         found = true;
 442                         break;
 443                 }
 444         }
 445
 446         if (!found)
 447                 LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
 448
 449         /*
 450          * ... Read the MDM-AP status register until the Flash Ready bit sets...
 451          */
 452         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 453                                            MDM_STAT_FREADY,
 454                                            MDM_STAT_FREADY);
 455         if (retval != ERROR_OK) {
 456                 LOG_ERROR("MDM: flash ready timeout");
 457                 goto fail;
 458         }
 459
 460         /*
 461          * ... Read the System Security bit to determine if security is enabled.
 462          * If System Security = 0, then proceed. If System Security = 1, then
 463          * communication with the internals of the processor, including the
 464          * flash, will not be possible without issuing a mass erase command or
 465          * unsecuring the part through other means (backdoor key unlock)...
 466          */
 467         retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
 468         if (retval != ERROR_OK) {
 469                 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
 470                 goto fail;
 471         }
 472
 473         if ((val & (MDM_STAT_SYSSEC | MDM_STAT_CORE_HALTED)) == MDM_STAT_SYSSEC) {
 474                 LOG_WARNING("MDM: Secured MCU state detected however it may be a false alarm");
 475                 LOG_WARNING("MDM: Halting target to detect secured state reliably");
 476
 477                 retval = target_halt(target);
 478                 if (retval == ERROR_OK)
 479                         retval = target_wait_state(target, TARGET_HALTED, 100);
 480
 481                 if (retval != ERROR_OK) {
 482                         LOG_WARNING("MDM: Target not halted, trying reset halt");
 483                         target->reset_halt = true;
 484                         target->type->assert_reset(target);
 485                         target->type->deassert_reset(target);
 486                 }
 487
 488                 /* re-read status */
 489                 retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
 490                 if (retval != ERROR_OK) {
 491                         LOG_ERROR("MDM: failed to read MDM_REG_STAT");
 492                         goto fail;
 493                 }
 494         }
 495
 496         if (val & MDM_STAT_SYSSEC) {
 497                 jtag_poll_set_enabled(false);
 498
 499                 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
 500                 LOG_WARNING("****                                                          ****");
 501                 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that,  ****");
 502                 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD    ****");
 503                 LOG_WARNING("**** interface will NOT work. In order to restore its         ****");
 504                 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase'      ****");
 505                 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD.        ****");
 506                 LOG_WARNING("****                                                          ****");
 507                 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
 508         } else {
 509                 LOG_INFO("MDM: Chip is unsecured. Continuing.");
 510                 jtag_poll_set_enabled(true);
 511         }
 512
 513         return ERROR_OK;
 514
 515 fail:
 516         LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
 517         jtag_poll_set_enabled(false);
 518         return retval;
 519 }
 520
 521 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
 522 {
 523         struct kinetis_flash_bank *bank_info;
 524
 525         if (CMD_ARGC < 6)
 526                 return ERROR_COMMAND_SYNTAX_ERROR;
 527
 528         LOG_INFO("add flash_bank kinetis %s", bank->name);
 529
 530         bank_info = malloc(sizeof(struct kinetis_flash_bank));
 531
 532         memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
 533
 534         bank->driver_priv = bank_info;
 535
 536         return ERROR_OK;
 537 }
 538
 539 /* Disable the watchdog on Kinetis devices */
 540 int kinetis_disable_wdog(struct target *target, uint32_t sim_sdid)
 541 {
 542         struct working_area *wdog_algorithm;
 543         struct armv7m_algorithm armv7m_info;
 544         uint16_t wdog;
 545         int retval;
 546
 547         static const uint8_t kinetis_unlock_wdog_code[] = {
 548                 /* WDOG_UNLOCK = 0xC520 */
 549                 0x4f, 0xf4, 0x00, 0x53,    /* mov.w   r3, #8192     ; 0x2000  */
 550                 0xc4, 0xf2, 0x05, 0x03,    /* movt    r3, #16389    ; 0x4005  */
 551                 0x4c, 0xf2, 0x20, 0x52,   /* movw    r2, #50464    ; 0xc520  */
 552                 0xda, 0x81,               /* strh    r2, [r3, #14]  */
 553
 554                 /* WDOG_UNLOCK = 0xD928 */
 555                 0x4f, 0xf4, 0x00, 0x53,   /* mov.w   r3, #8192     ; 0x2000  */
 556                 0xc4, 0xf2, 0x05, 0x03,   /* movt    r3, #16389    ; 0x4005  */
 557                 0x4d, 0xf6, 0x28, 0x12,   /* movw    r2, #55592    ; 0xd928  */
 558                 0xda, 0x81,               /* strh    r2, [r3, #14]  */
 559
 560                 /* WDOG_SCR = 0x1d2 */
 561                 0x4f, 0xf4, 0x00, 0x53,   /* mov.w   r3, #8192     ; 0x2000  */
 562                 0xc4, 0xf2, 0x05, 0x03,   /* movt    r3, #16389    ; 0x4005  */
 563                 0x4f, 0xf4, 0xe9, 0x72,   /* mov.w   r2, #466      ; 0x1d2  */
 564                 0x1a, 0x80,               /* strh    r2, [r3, #0]  */
 565
 566                 /* END */
 567                 0x00, 0xBE,               /* bkpt #0 */
 568         };
 569
 570         /* Decide whether the connected device needs watchdog disabling.
 571          * Disable for all Kx devices, i.e., return if it is a KLx */
 572
 573         if ((sim_sdid & KINETIS_SDID_SERIESID_MASK) == KINETIS_SDID_SERIESID_KL)
 574                 return ERROR_OK;
 575
 576         /* The connected device requires watchdog disabling. */
 577         retval = target_read_u16(target, WDOG_STCTRH, &wdog);
 578         if (retval != ERROR_OK)
 579                 return retval;
 580
 581         if ((wdog & 0x1) == 0) {
 582                 /* watchdog already disabled */
 583                 return ERROR_OK;
 584         }
 585         LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog);
 586
 587         if (target->state != TARGET_HALTED) {
 588                 LOG_ERROR("Target not halted");
 589                 return ERROR_TARGET_NOT_HALTED;
 590         }
 591
 592         retval = target_alloc_working_area(target, sizeof(kinetis_unlock_wdog_code), &wdog_algorithm);
 593         if (retval != ERROR_OK)
 594                 return retval;
 595
 596         retval = target_write_buffer(target, wdog_algorithm->address,
 597                         sizeof(kinetis_unlock_wdog_code), (uint8_t *)kinetis_unlock_wdog_code);
 598         if (retval != ERROR_OK) {
 599                 target_free_working_area(target, wdog_algorithm);
 600                 return retval;
 601         }
 602
 603         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 604         armv7m_info.core_mode = ARM_MODE_THREAD;
 605
 606         retval = target_run_algorithm(target, 0, NULL, 0, NULL, wdog_algorithm->address,
 607                         wdog_algorithm->address + (sizeof(kinetis_unlock_wdog_code) - 2),
 608                         10000, &armv7m_info);
 609
 610         if (retval != ERROR_OK)
 611                 LOG_ERROR("error executing kinetis wdog unlock algorithm");
 612
 613         retval = target_read_u16(target, WDOG_STCTRH, &wdog);
 614         if (retval != ERROR_OK)
 615                 return retval;
 616         LOG_INFO("WDOG_STCTRLH = 0x%x", wdog);
 617
 618         target_free_working_area(target, wdog_algorithm);
 619
 620         return retval;
 621 }
 622
 623 COMMAND_HANDLER(kinetis_disable_wdog_handler)
 624 {
 625         int result;
 626         uint32_t sim_sdid;
 627         struct target *target = get_current_target(CMD_CTX);
 628
 629         if (CMD_ARGC > 0)
 630                 return ERROR_COMMAND_SYNTAX_ERROR;
 631
 632         result = target_read_u32(target, SIM_SDID, &sim_sdid);
 633         if (result != ERROR_OK) {
 634                 LOG_ERROR("Failed to read SIMSDID");
 635                 return result;
 636         }
 637
 638         result = kinetis_disable_wdog(target, sim_sdid);
 639         return result;
 640 }
 641
 642
 643 /* Kinetis Program-LongWord Microcodes */
 644 static const uint8_t kinetis_flash_write_code[] = {
 645         /* Params:
 646          * r0 - workarea buffer
 647         * r1 - target address
 648         * r2 - wordcount
 649         * Clobbered:
 650         * r4 - tmp
 651         * r5 - tmp
 652         * r6 - tmp
 653         * r7 - tmp
 654         */
 655
 656                                                         /* .L1: */
 657                                                 /* for(register uint32_t i=0;i<wcount;i++){ */
 658         0x04, 0x1C,                                     /* mov    r4, r0          */
 659         0x00, 0x23,                                     /* mov    r3, #0          */
 660                                                         /* .L2: */
 661         0x0E, 0x1A,                                     /* sub    r6, r1, r0      */
 662         0xA6, 0x19,                                     /* add    r6, r4, r6      */
 663         0x93, 0x42,                                     /* cmp    r3, r2          */
 664         0x16, 0xD0,                                     /* beq    .L9             */
 665                                                         /* .L5: */
 666                                                 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
 667         0x0B, 0x4D,                                     /* ldr    r5, .L10        */
 668         0x2F, 0x78,                                     /* ldrb   r7, [r5]        */
 669         0x7F, 0xB2,                                     /* sxtb   r7, r7          */
 670         0x00, 0x2F,                                     /* cmp    r7, #0          */
 671         0xFA, 0xDA,                                     /* bge    .L5             */
 672                                                 /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
 673         0x70, 0x27,                                     /* mov    r7, #112        */
 674         0x2F, 0x70,                                     /* strb   r7, [r5]        */
 675                                                 /* FTFx_FCCOB3 = faddr; */
 676         0x09, 0x4F,                                     /* ldr    r7, .L10+4      */
 677         0x3E, 0x60,                                     /* str    r6, [r7]        */
 678         0x06, 0x27,                                     /* mov    r7, #6          */
 679                                                 /* FTFx_FCCOB0 = 0x06;  */
 680         0x08, 0x4E,                                     /* ldr    r6, .L10+8      */
 681         0x37, 0x70,                                     /* strb   r7, [r6]        */
 682                                                 /* FTFx_FCCOB7 = *pLW;  */
 683         0x80, 0xCC,                                     /* ldmia  r4!, {r7}       */
 684         0x08, 0x4E,                                     /* ldr    r6, .L10+12     */
 685         0x37, 0x60,                                     /* str    r7, [r6]        */
 686                                                 /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
 687         0x80, 0x27,                                     /* mov    r7, #128        */
 688         0x2F, 0x70,                                     /* strb   r7, [r5]        */
 689                                                         /* .L4: */
 690                                                 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
 691         0x2E, 0x78,                                     /* ldrb    r6, [r5]       */
 692         0x77, 0xB2,                                     /* sxtb    r7, r6         */
 693         0x00, 0x2F,                                     /* cmp     r7, #0         */
 694         0xFB, 0xDA,                                     /* bge     .L4            */
 695         0x01, 0x33,                                     /* add     r3, r3, #1     */
 696         0xE4, 0xE7,                                     /* b       .L2            */
 697                                                         /* .L9: */
 698         0x00, 0xBE,                                     /* bkpt #0                */
 699                                                         /* .L10: */
 700         0x00, 0x00, 0x02, 0x40,         /* .word    1073872896    */
 701         0x04, 0x00, 0x02, 0x40,         /* .word    1073872900    */
 702         0x07, 0x00, 0x02, 0x40,         /* .word    1073872903    */
 703         0x08, 0x00, 0x02, 0x40,         /* .word    1073872904    */
 704 };
 705
 706 /* Program LongWord Block Write */
 707 static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
 708                 uint32_t offset, uint32_t wcount)
 709 {
 710         struct target *target = bank->target;
 711         uint32_t buffer_size = 2048;            /* Default minimum value */
 712         struct working_area *write_algorithm;
 713         struct working_area *source;
 714         struct kinetis_flash_bank *kinfo = bank->driver_priv;
 715         uint32_t address = kinfo->prog_base + offset;
 716         struct reg_param reg_params[3];
 717         struct armv7m_algorithm armv7m_info;
 718         int retval = ERROR_OK;
 719
 720         /* Params:
 721          * r0 - workarea buffer
 722          * r1 - target address
 723          * r2 - wordcount
 724          * Clobbered:
 725          * r4 - tmp
 726          * r5 - tmp
 727          * r6 - tmp
 728          * r7 - tmp
 729          */
 730
 731         /* Increase buffer_size if needed */
 732         if (buffer_size < (target->working_area_size/2))
 733                 buffer_size = (target->working_area_size/2);
 734
 735         LOG_INFO("Kinetis: FLASH Write ...");
 736
 737         /* check code alignment */
 738         if (offset & 0x1) {
 739                 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
 740                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 741         }
 742
 743         /* allocate working area with flash programming code */
 744         if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code),
 745                         &write_algorithm) != ERROR_OK) {
 746                 LOG_WARNING("no working area available, can't do block memory writes");
 747                 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 748         }
 749
 750         retval = target_write_buffer(target, write_algorithm->address,
 751                 sizeof(kinetis_flash_write_code), kinetis_flash_write_code);
 752         if (retval != ERROR_OK)
 753                 return retval;
 754
 755         /* memory buffer */
 756         while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
 757                 buffer_size /= 4;
 758                 if (buffer_size <= 256) {
 759                         /* free working area, write algorithm already allocated */
 760                         target_free_working_area(target, write_algorithm);
 761
 762                         LOG_WARNING("No large enough working area available, can't do block memory writes");
 763                         return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 764                 }
 765         }
 766
 767         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 768         armv7m_info.core_mode = ARM_MODE_THREAD;
 769
 770         init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */
 771         init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* faddr */
 772         init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
 773
 774         /* write code buffer and use Flash programming code within kinetis       */
 775         /* Set breakpoint to 0 with time-out of 1000 ms                          */
 776         while (wcount > 0) {
 777                 uint32_t thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
 778
 779                 retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
 780                 if (retval != ERROR_OK)
 781                         break;
 782
 783                 buf_set_u32(reg_params[0].value, 0, 32, source->address);
 784                 buf_set_u32(reg_params[1].value, 0, 32, address);
 785                 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
 786
 787                 retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 788                                 write_algorithm->address, 0, 100000, &armv7m_info);
 789                 if (retval != ERROR_OK) {
 790                         LOG_ERROR("Error executing kinetis Flash programming algorithm");
 791                         retval = ERROR_FLASH_OPERATION_FAILED;
 792                         break;
 793                 }
 794
 795                 buffer += thisrun_count * 4;
 796                 address += thisrun_count * 4;
 797                 wcount -= thisrun_count;
 798         }
 799
 800         target_free_working_area(target, source);
 801         target_free_working_area(target, write_algorithm);
 802
 803         destroy_reg_param(&reg_params[0]);
 804         destroy_reg_param(&reg_params[1]);
 805         destroy_reg_param(&reg_params[2]);
 806
 807         return retval;
 808 }
 809
 810 static int kinetis_protect(struct flash_bank *bank, int set, int first, int last)
 811 {
 812         LOG_WARNING("kinetis_protect not supported yet");
 813         /* FIXME: TODO */
 814
 815         if (bank->target->state != TARGET_HALTED) {
 816                 LOG_ERROR("Target not halted");
 817                 return ERROR_TARGET_NOT_HALTED;
 818         }
 819
 820         return ERROR_FLASH_BANK_INVALID;
 821 }
 822
 823 static int kinetis_protect_check(struct flash_bank *bank)
 824 {
 825         struct kinetis_flash_bank *kinfo = bank->driver_priv;
 826         int result;
 827         int i, b;
 828         uint32_t fprot, psec;
 829
 830         if (bank->target->state != TARGET_HALTED) {
 831                 LOG_ERROR("Target not halted");
 832                 return ERROR_TARGET_NOT_HALTED;
 833         }
 834
 835         if (kinfo->flash_class == FC_PFLASH) {
 836                 uint8_t buffer[4];
 837
 838                 /* read protection register */
 839                 result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
 840
 841                 if (result != ERROR_OK)
 842                         return result;
 843
 844                 fprot = target_buffer_get_u32(bank->target, buffer);
 845                 /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
 846
 847         } else if (kinfo->flash_class == FC_FLEX_NVM) {
 848                 uint8_t fdprot;
 849
 850                 /* read protection register */
 851                 result = target_read_memory(bank->target, FTFx_FDPROT, 1, 1, &fdprot);
 852
 853                 if (result != ERROR_OK)
 854                         return result;
 855
 856                 fprot = fdprot;
 857
 858         } else {
 859                 LOG_ERROR("Protection checks for FlexRAM not supported");
 860                 return ERROR_FLASH_BANK_INVALID;
 861         }
 862
 863         b = kinfo->protection_block;
 864         for (psec = 0, i = 0; i < bank->num_sectors; i++) {
 865                 if ((fprot >> b) & 1)
 866                         bank->sectors[i].is_protected = 0;
 867                 else
 868                         bank->sectors[i].is_protected = 1;
 869
 870                 psec += bank->sectors[i].size;
 871
 872                 if (psec >= kinfo->protection_size) {
 873                         psec = 0;
 874                         b++;
 875                 }
 876         }
 877
 878         return ERROR_OK;
 879 }
 880
 881 static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t faddr,
 882                                 uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
 883                                 uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
 884                                 uint8_t *ftfx_fstat)
 885 {
 886         uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
 887                         fccob7, fccob6, fccob5, fccob4,
 888                         fccobb, fccoba, fccob9, fccob8};
 889         int result, i;
 890         uint8_t buffer;
 891
 892         /* wait for done */
 893         for (i = 0; i < 50; i++) {
 894                 result =
 895                         target_read_memory(target, FTFx_FSTAT, 1, 1, &buffer);
 896
 897                 if (result != ERROR_OK)
 898                         return result;
 899
 900                 if (buffer & 0x80)
 901                         break;
 902
 903                 buffer = 0x00;
 904         }
 905
 906         if (buffer != 0x80) {
 907                 /* reset error flags */
 908                 buffer = 0x30;
 909                 result =
 910                         target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
 911                 if (result != ERROR_OK)
 912                         return result;
 913         }
 914
 915         result = target_write_memory(target, FTFx_FCCOB3, 4, 3, command);
 916
 917         if (result != ERROR_OK)
 918                 return result;
 919
 920         /* start command */
 921         buffer = 0x80;
 922         result = target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
 923         if (result != ERROR_OK)
 924                 return result;
 925
 926         /* wait for done */
 927         for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
 928                 result =
 929                         target_read_memory(target, FTFx_FSTAT, 1, 1, ftfx_fstat);
 930
 931                 if (result != ERROR_OK)
 932                         return result;
 933
 934                 if (*ftfx_fstat & 0x80)
 935                         break;
 936         }
 937
 938         if ((*ftfx_fstat & 0xf0) != 0x80) {
 939                 LOG_ERROR
 940                         ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
 941                          *ftfx_fstat, command[3], command[2], command[1], command[0],
 942                          command[7], command[6], command[5], command[4],
 943                          command[11], command[10], command[9], command[8]);
 944                 return ERROR_FLASH_OPERATION_FAILED;
 945         }
 946
 947         return ERROR_OK;
 948 }
 949
 950
 951 static int kinetis_erase(struct flash_bank *bank, int first, int last)
 952 {
 953         int result, i;
 954         struct kinetis_flash_bank *kinfo = bank->driver_priv;
 955
 956         if (bank->target->state != TARGET_HALTED) {
 957                 LOG_ERROR("Target not halted");
 958                 return ERROR_TARGET_NOT_HALTED;
 959         }
 960
 961         if ((first > bank->num_sectors) || (last > bank->num_sectors))
 962                 return ERROR_FLASH_OPERATION_FAILED;
 963
 964         /*
 965          * FIXME: TODO: use the 'Erase Flash Block' command if the
 966          * requested erase is PFlash or NVM and encompasses the entire
 967          * block.  Should be quicker.
 968          */
 969         for (i = first; i <= last; i++) {
 970                 uint8_t ftfx_fstat;
 971                 /* set command and sector address */
 972                 result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, kinfo->prog_base + bank->sectors[i].offset,
 973                                 0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
 974
 975                 if (result != ERROR_OK) {
 976                         LOG_WARNING("erase sector %d failed", i);
 977                         return ERROR_FLASH_OPERATION_FAILED;
 978                 }
 979
 980                 bank->sectors[i].is_erased = 1;
 981         }
 982
 983         if (first == 0) {
 984                 LOG_WARNING
 985                         ("flash configuration field erased, please reset the device");
 986         }
 987
 988         return ERROR_OK;
 989 }
 990
 991 static int kinetis_make_ram_ready(struct target *target)
 992 {
 993         int result;
 994         uint8_t ftfx_fstat;
 995         uint8_t ftfx_fcnfg;
 996
 997         /* check if ram ready */
 998         result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
 999         if (result != ERROR_OK)
1000                 return result;
1001
1002         if (ftfx_fcnfg & (1 << 1))
1003                 return ERROR_OK;        /* ram ready */
1004
1005         /* make flex ram available */
1006         result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000,
1007                                  0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
1008         if (result != ERROR_OK)
1009                 return ERROR_FLASH_OPERATION_FAILED;
1010
1011         /* check again */
1012         result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
1013         if (result != ERROR_OK)
1014                 return result;
1015
1016         if (ftfx_fcnfg & (1 << 1))
1017                 return ERROR_OK;        /* ram ready */
1018
1019         return ERROR_FLASH_OPERATION_FAILED;
1020 }
1021
1022 static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
1023                          uint32_t offset, uint32_t count)
1024 {
1025         unsigned int i, result, fallback = 0;
1026         uint32_t wc;
1027         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1028         uint8_t *new_buffer = NULL;
1029
1030         if (bank->target->state != TARGET_HALTED) {
1031                 LOG_ERROR("Target not halted");
1032                 return ERROR_TARGET_NOT_HALTED;
1033         }
1034
1035         if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
1036                 /* fallback to longword write */
1037                 fallback = 1;
1038                 LOG_WARNING("This device supports Program Longword execution only.");
1039         } else {
1040                 result = kinetis_make_ram_ready(bank->target);
1041                 if (result != ERROR_OK) {
1042                         fallback = 1;
1043                         LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
1044                 }
1045         }
1046
1047         LOG_DEBUG("flash write @08%" PRIX32, offset);
1048
1049
1050         /* program section command */
1051         if (fallback == 0) {
1052                 /*
1053                  * Kinetis uses different terms for the granularity of
1054                  * sector writes, e.g. "phrase" or "128 bits".  We use
1055                  * the generic term "chunk". The largest possible
1056                  * Kinetis "chunk" is 16 bytes (128 bits).
1057                  */
1058                 unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
1059                 unsigned prog_size_bytes = kinfo->max_flash_prog_size;
1060                 for (i = 0; i < count; i += prog_size_bytes) {
1061                         uint8_t residual_buffer[16];
1062                         uint8_t ftfx_fstat;
1063                         uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
1064                         uint32_t residual_wc = 0;
1065
1066                         /*
1067                          * Assume the word count covers an entire
1068                          * sector.
1069                          */
1070                         wc = prog_size_bytes / 4;
1071
1072                         /*
1073                          * If bytes to be programmed are less than the
1074                          * full sector, then determine the number of
1075                          * full-words to program, and put together the
1076                          * residual buffer so that a full "section"
1077                          * may always be programmed.
1078                          */
1079                         if ((count - i) < prog_size_bytes) {
1080                                 /* number of bytes to program beyond full section */
1081                                 unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
1082
1083                                 /* number of complete words to copy directly from buffer */
1084                                 wc = (count - i - residual_bc) / 4;
1085
1086                                 /* number of total sections to write, including residual */
1087                                 section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
1088
1089                                 /* any residual bytes delivers a whole residual section */
1090                                 residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
1091
1092                                 /* clear residual buffer then populate residual bytes */
1093                                 (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
1094                                 (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
1095                         }
1096
1097                         LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes",
1098                                   offset + i, (uint32_t)wc*4);
1099
1100                         /* write data to flexram as whole-words */
1101                         result = target_write_memory(bank->target, FLEXRAM, 4, wc,
1102                                         buffer + i);
1103
1104                         if (result != ERROR_OK) {
1105                                 LOG_ERROR("target_write_memory failed");
1106                                 return result;
1107                         }
1108
1109                         /* write the residual words to the flexram */
1110                         if (residual_wc) {
1111                                 result = target_write_memory(bank->target,
1112                                                 FLEXRAM+4*wc,
1113                                                 4, residual_wc,
1114                                                 residual_buffer);
1115
1116                                 if (result != ERROR_OK) {
1117                                         LOG_ERROR("target_write_memory failed");
1118                                         return result;
1119                                 }
1120                         }
1121
1122                         /* execute section-write command */
1123                         result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTWRITE, kinfo->prog_base + offset + i,
1124                                         section_count>>8, section_count, 0, 0,
1125                                         0, 0, 0, 0,  &ftfx_fstat);
1126
1127                         if (result != ERROR_OK)
1128                                 return ERROR_FLASH_OPERATION_FAILED;
1129                 }
1130         }
1131         /* program longword command, not supported in "SF3" devices */
1132         else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
1133                 if (count & 0x3) {
1134                         uint32_t old_count = count;
1135                         count = (old_count | 3) + 1;
1136                         new_buffer = malloc(count);
1137                         if (new_buffer == NULL) {
1138                                 LOG_ERROR("odd number of bytes to write and no memory "
1139                                         "for padding buffer");
1140                                 return ERROR_FAIL;
1141                         }
1142                         LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
1143                                 "and padding with 0xff", old_count, count);
1144                         memset(new_buffer, 0xff, count);
1145                         buffer = memcpy(new_buffer, buffer, old_count);
1146                 }
1147
1148                 uint32_t words_remaining = count / 4;
1149
1150                 kinetis_disable_wdog(bank->target, kinfo->sim_sdid);
1151
1152                 /* try using a block write */
1153                 int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
1154
1155                 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
1156                         /* if block write failed (no sufficient working area),
1157                          * we use normal (slow) single word accesses */
1158                         LOG_WARNING("couldn't use block writes, falling back to single "
1159                                 "memory accesses");
1160
1161                         for (i = 0; i < count; i += 4) {
1162                                 uint8_t ftfx_fstat;
1163
1164                                 LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
1165
1166                                 uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
1167                                 memcpy(padding, buffer + i, MIN(4, count-i));
1168
1169                                 result = kinetis_ftfx_command(bank->target, FTFx_CMD_LWORDPROG, kinfo->prog_base + offset + i,
1170                                                 padding[3], padding[2], padding[1], padding[0],
1171                                                 0, 0, 0, 0,  &ftfx_fstat);
1172
1173                                 if (result != ERROR_OK)
1174                                         return ERROR_FLASH_OPERATION_FAILED;
1175                         }
1176                 }
1177         } else {
1178                 LOG_ERROR("Flash write strategy not implemented");
1179                 return ERROR_FLASH_OPERATION_FAILED;
1180         }
1181
1182         return ERROR_OK;
1183 }
1184
1185 static int kinetis_read_part_info(struct flash_bank *bank)
1186 {
1187         int result, i;
1188         uint32_t offset = 0;
1189         uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg1_depart;
1190         uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
1191         uint32_t nvm_size = 0, pf_size = 0, df_size = 0, ee_size = 0;
1192         unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
1193                         pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
1194         struct target *target = bank->target;
1195         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1196
1197         kinfo->probed = false;
1198
1199         result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
1200         if (result != ERROR_OK)
1201                 return result;
1202
1203         if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
1204                 /* older K-series MCU */
1205                 uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
1206
1207                 switch (mcu_type) {
1208                 case KINETIS_K_SDID_K10_M50:
1209                 case KINETIS_K_SDID_K20_M50:
1210                         /* 1kB sectors */
1211                         pflash_sector_size_bytes = 1<<10;
1212                         nvm_sector_size_bytes = 1<<10;
1213                         num_blocks = 2;
1214                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1215                         break;
1216                 case KINETIS_K_SDID_K10_M72:
1217                 case KINETIS_K_SDID_K20_M72:
1218                 case KINETIS_K_SDID_K30_M72:
1219                 case KINETIS_K_SDID_K30_M100:
1220                 case KINETIS_K_SDID_K40_M72:
1221                 case KINETIS_K_SDID_K40_M100:
1222                 case KINETIS_K_SDID_K50_M72:
1223                         /* 2kB sectors, 1kB FlexNVM sectors */
1224                         pflash_sector_size_bytes = 2<<10;
1225                         nvm_sector_size_bytes = 1<<10;
1226                         num_blocks = 2;
1227                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1228                         kinfo->max_flash_prog_size = 1<<10;
1229                         break;
1230                 case KINETIS_K_SDID_K10_M100:
1231                 case KINETIS_K_SDID_K20_M100:
1232                 case KINETIS_K_SDID_K11:
1233                 case KINETIS_K_SDID_K12:
1234                 case KINETIS_K_SDID_K21_M50:
1235                 case KINETIS_K_SDID_K22_M50:
1236                 case KINETIS_K_SDID_K51_M72:
1237                 case KINETIS_K_SDID_K53:
1238                 case KINETIS_K_SDID_K60_M100:
1239                         /* 2kB sectors */
1240                         pflash_sector_size_bytes = 2<<10;
1241                         nvm_sector_size_bytes = 2<<10;
1242                         num_blocks = 2;
1243                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1244                         break;
1245                 case KINETIS_K_SDID_K21_M120:
1246                 case KINETIS_K_SDID_K22_M120:
1247                         /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
1248                         pflash_sector_size_bytes = 4<<10;
1249                         kinfo->max_flash_prog_size = 1<<10;
1250                         nvm_sector_size_bytes = 4<<10;
1251                         num_blocks = 2;
1252                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1253                         break;
1254                 case KINETIS_K_SDID_K10_M120:
1255                 case KINETIS_K_SDID_K20_M120:
1256                 case KINETIS_K_SDID_K60_M150:
1257                 case KINETIS_K_SDID_K70_M150:
1258                         /* 4kB sectors */
1259                         pflash_sector_size_bytes = 4<<10;
1260                         nvm_sector_size_bytes = 4<<10;
1261                         num_blocks = 4;
1262                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1263                         break;
1264                 default:
1265                         LOG_ERROR("Unsupported K-family FAMID");
1266                 }
1267         } else {
1268                 /* Newer K-series or KL series MCU */
1269                 switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
1270                 case KINETIS_SDID_SERIESID_K:
1271                         switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
1272                         case KINETIS_SDID_FAMILYID_K0X | KINETIS_SDID_SUBFAMID_KX2:
1273                                 /* K02FN64, K02FN128: FTFA, 2kB sectors */
1274                                 pflash_sector_size_bytes = 2<<10;
1275                                 num_blocks = 1;
1276                                 kinfo->flash_support = FS_PROGRAM_LONGWORD;
1277                                 break;
1278
1279                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
1280                                 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1281                                 uint32_t sopt1;
1282                                 result = target_read_u32(target, SIM_SOPT1, &sopt1);
1283                                 if (result != ERROR_OK)
1284                                         return result;
1285
1286                                 if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
1287                                                 ((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
1288                                         /* MK24FN1M */
1289                                         pflash_sector_size_bytes = 4<<10;
1290                                         num_blocks = 2;
1291                                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1292                                         kinfo->max_flash_prog_size = 1<<10;
1293                                         break;
1294                                 }
1295                                 if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN128
1296                                         || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN256
1297                                         || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN512) {
1298                                         /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
1299                                         pflash_sector_size_bytes = 2<<10;
1300                                         /* autodetect 1 or 2 blocks */
1301                                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1302                                         break;
1303                                 }
1304                                 LOG_ERROR("Unsupported Kinetis K22 DIEID");
1305                                 break;
1306                         }
1307                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
1308                                 pflash_sector_size_bytes = 4<<10;
1309                                 if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN256) {
1310                                         /* K24FN256 - smaller pflash with FTFA */
1311                                         num_blocks = 1;
1312                                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1313                                         break;
1314                                 }
1315                                 /* K24FN1M without errata 7534 */
1316                                 num_blocks = 2;
1317                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1318                                 kinfo->max_flash_prog_size = 1<<10;
1319                                 break;
1320
1321                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX3:
1322                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX1:     /* errata 7534 - should be K63 */
1323                                 /* K63FN1M0 */
1324                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX4:
1325                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX2:     /* errata 7534 - should be K64 */
1326                                 /* K64FN1M0, K64FX512 */
1327                                 pflash_sector_size_bytes = 4<<10;
1328                                 nvm_sector_size_bytes = 4<<10;
1329                                 kinfo->max_flash_prog_size = 1<<10;
1330                                 num_blocks = 2;
1331                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1332                                 break;
1333
1334                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX6:
1335                                 /* K26FN2M0 */
1336                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX6:
1337                                 /* K66FN2M0, K66FX1M0 */
1338                                 pflash_sector_size_bytes = 4<<10;
1339                                 nvm_sector_size_bytes = 4<<10;
1340                                 kinfo->max_flash_prog_size = 1<<10;
1341                                 num_blocks = 4;
1342                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1343                                 break;
1344                         default:
1345                                 LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
1346                         }
1347                         break;
1348                 case KINETIS_SDID_SERIESID_KL:
1349                         /* KL-series */
1350                         pflash_sector_size_bytes = 1<<10;
1351                         nvm_sector_size_bytes = 1<<10;
1352                         /* autodetect 1 or 2 blocks */
1353                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1354                         break;
1355                 default:
1356                         LOG_ERROR("Unsupported K-series");
1357                 }
1358         }
1359
1360         if (pflash_sector_size_bytes == 0) {
1361                 LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, kinfo->sim_sdid);
1362                 return ERROR_FLASH_OPER_UNSUPPORTED;
1363         }
1364
1365         result = target_read_u32(target, SIM_FCFG1, &kinfo->sim_fcfg1);
1366         if (result != ERROR_OK)
1367                 return result;
1368
1369         result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
1370         if (result != ERROR_OK)
1371                 return result;
1372
1373         LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
1374                         kinfo->sim_fcfg1, kinfo->sim_fcfg2);
1375
1376         fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
1377         fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
1378         fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
1379         fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
1380
1381         fcfg2_pflsh = (uint8_t)((kinfo->sim_fcfg2 >> 23) & 0x01);
1382         fcfg2_maxaddr0 = (uint8_t)((kinfo->sim_fcfg2 >> 24) & 0x7f);
1383         fcfg2_maxaddr1 = (uint8_t)((kinfo->sim_fcfg2 >> 16) & 0x7f);
1384
1385         if (num_blocks == 0)
1386                 num_blocks = fcfg2_maxaddr1 ? 2 : 1;
1387         else if (fcfg2_maxaddr1 == 0 && num_blocks >= 2) {
1388                 num_blocks = 1;
1389                 LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
1390         } else if (fcfg2_maxaddr1 != 0 && num_blocks == 1) {
1391                 num_blocks = 2;
1392                 LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
1393         }
1394
1395         /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1396         if (!fcfg2_pflsh) {
1397                 switch (fcfg1_nvmsize) {
1398                 case 0x03:
1399                 case 0x05:
1400                 case 0x07:
1401                 case 0x09:
1402                 case 0x0b:
1403                         nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
1404                         break;
1405                 case 0x0f:
1406                         if (pflash_sector_size_bytes >= 4<<10)
1407                                 nvm_size = 512<<10;
1408                         else
1409                                 /* K20_100 */
1410                                 nvm_size = 256<<10;
1411                         break;
1412                 default:
1413                         nvm_size = 0;
1414                         break;
1415                 }
1416
1417                 switch (fcfg1_eesize) {
1418                 case 0x00:
1419                 case 0x01:
1420                 case 0x02:
1421                 case 0x03:
1422                 case 0x04:
1423                 case 0x05:
1424                 case 0x06:
1425                 case 0x07:
1426                 case 0x08:
1427                 case 0x09:
1428                         ee_size = (16 << (10 - fcfg1_eesize));
1429                         break;
1430                 default:
1431                         ee_size = 0;
1432                         break;
1433                 }
1434
1435                 switch (fcfg1_depart) {
1436                 case 0x01:
1437                 case 0x02:
1438                 case 0x03:
1439                 case 0x04:
1440                 case 0x05:
1441                 case 0x06:
1442                         df_size = nvm_size - (4096 << fcfg1_depart);
1443                         break;
1444                 case 0x08:
1445                         df_size = 0;
1446                         break;
1447                 case 0x09:
1448                 case 0x0a:
1449                 case 0x0b:
1450                 case 0x0c:
1451                 case 0x0d:
1452                         df_size = 4096 << (fcfg1_depart & 0x7);
1453                         break;
1454                 default:
1455                         df_size = nvm_size;
1456                         break;
1457                 }
1458         }
1459
1460         switch (fcfg1_pfsize) {
1461         case 0x03:
1462         case 0x05:
1463         case 0x07:
1464         case 0x09:
1465         case 0x0b:
1466         case 0x0d:
1467                 pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
1468                 break;
1469         case 0x0f:
1470                 /* a peculiar case: Freescale states different sizes for 0xf
1471                  * K02P64M100SFARM      128 KB ... duplicate of code 0x7
1472                  * K22P121M120SF8RM     256 KB ... duplicate of code 0x9
1473                  * K22P121M120SF7RM     512 KB ... duplicate of code 0xb
1474                  * K22P100M120SF5RM     1024 KB ... duplicate of code 0xd
1475                  * K26P169M180SF5RM     2048 KB ... the only unique value
1476                  * fcfg2_maxaddr0 seems to be the only clue to pf_size
1477                  * Checking fcfg2_maxaddr0 later in this routine is pointless then
1478                  */
1479                 if (fcfg2_pflsh)
1480                         pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks;
1481                 else
1482                         pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks / 2;
1483                 if (pf_size != 2048<<10)
1484                         LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size>>10);
1485
1486                 break;
1487         default:
1488                 pf_size = 0;
1489                 break;
1490         }
1491
1492         LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
1493                   nvm_size, pf_size, ee_size, fcfg2_pflsh);
1494
1495         num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
1496         first_nvm_bank = num_pflash_blocks;
1497         num_nvm_blocks = num_blocks - num_pflash_blocks;
1498
1499         LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1500                         num_blocks, num_pflash_blocks, num_nvm_blocks);
1501
1502         LOG_INFO("Probing flash info for bank %d", bank->bank_number);
1503
1504         if ((unsigned)bank->bank_number < num_pflash_blocks) {
1505                 /* pflash, banks start at address zero */
1506                 kinfo->flash_class = FC_PFLASH;
1507                 bank->size = (pf_size / num_pflash_blocks);
1508                 bank->base = 0x00000000 + bank->size * bank->bank_number;
1509                 kinfo->prog_base = bank->base;
1510                 kinfo->sector_size = pflash_sector_size_bytes;
1511                 kinfo->protection_size = pf_size / 32;
1512                 kinfo->protection_block = (32 / num_pflash_blocks) * bank->bank_number;
1513
1514         } else if ((unsigned)bank->bank_number < num_blocks) {
1515                 /* nvm, banks start at address 0x10000000 */
1516                 unsigned nvm_ord = bank->bank_number - first_nvm_bank;
1517                 uint32_t limit;
1518
1519                 kinfo->flash_class = FC_FLEX_NVM;
1520                 bank->size = (nvm_size / num_nvm_blocks);
1521                 bank->base = 0x10000000 + bank->size * nvm_ord;
1522                 kinfo->prog_base = 0x00800000 + bank->size * nvm_ord;
1523                 kinfo->sector_size = nvm_sector_size_bytes;
1524                 if (df_size == 0) {
1525                         kinfo->protection_size = 0;
1526                 } else {
1527                         for (i = df_size; ~i & 1; i >>= 1)
1528                                 ;
1529                         if (i == 1)
1530                                 kinfo->protection_size = df_size / 8;   /* data flash size = 2^^n */
1531                         else
1532                                 kinfo->protection_size = nvm_size / 8;  /* TODO: verify on SF1, not documented in RM */
1533                 }
1534                 kinfo->protection_block = (8 / num_nvm_blocks) * nvm_ord;
1535
1536                 /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
1537                 if (df_size > bank->size * nvm_ord)
1538                         limit = df_size - bank->size * nvm_ord;
1539                 else
1540                         limit = 0;
1541
1542                 if (bank->size > limit) {
1543                         bank->size = limit;
1544                         LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32 " due to active EEPROM backup",
1545                                 bank->bank_number, limit);
1546                 }
1547
1548         } else if ((unsigned)bank->bank_number == num_blocks) {
1549                 LOG_ERROR("FlexRAM support not yet implemented");
1550                 return ERROR_FLASH_OPER_UNSUPPORTED;
1551         } else {
1552                 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1553                                 bank->bank_number, num_blocks);
1554                 return ERROR_FLASH_BANK_INVALID;
1555         }
1556
1557         if (bank->bank_number == 0 && ((uint32_t)fcfg2_maxaddr0 << 13) != bank->size)
1558                 LOG_WARNING("MAXADDR0 0x%02" PRIx8 " check failed,"
1559                                 " please report to OpenOCD mailing list", fcfg2_maxaddr0);
1560         if (fcfg2_pflsh) {
1561                 if (bank->bank_number == 1 && ((uint32_t)fcfg2_maxaddr1 << 13) != bank->size)
1562                         LOG_WARNING("MAXADDR1 0x%02" PRIx8 " check failed,"
1563                                 " please report to OpenOCD mailing list", fcfg2_maxaddr1);
1564         } else {
1565                 if ((unsigned)bank->bank_number == first_nvm_bank
1566                                 && ((uint32_t)fcfg2_maxaddr1 << 13) != df_size)
1567                         LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed,"
1568                                 " please report to OpenOCD mailing list", fcfg2_maxaddr1);
1569         }
1570
1571         if (bank->sectors) {
1572                 free(bank->sectors);
1573                 bank->sectors = NULL;
1574         }
1575
1576         if (kinfo->sector_size == 0) {
1577                 LOG_ERROR("Unknown sector size for bank %d", bank->bank_number);
1578                 return ERROR_FLASH_BANK_INVALID;
1579         }
1580
1581         if (kinfo->flash_support & FS_PROGRAM_SECTOR
1582                          && kinfo->max_flash_prog_size == 0) {
1583                 kinfo->max_flash_prog_size = kinfo->sector_size;
1584                 /* Program section size is equal to sector size by default */
1585         }
1586
1587         bank->num_sectors = bank->size / kinfo->sector_size;
1588
1589         if (bank->num_sectors > 0) {
1590                 /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
1591                 bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1592
1593                 for (i = 0; i < bank->num_sectors; i++) {
1594                         bank->sectors[i].offset = offset;
1595                         bank->sectors[i].size = kinfo->sector_size;
1596                         offset += kinfo->sector_size;
1597                         bank->sectors[i].is_erased = -1;
1598                         bank->sectors[i].is_protected = 1;
1599                 }
1600         }
1601
1602         kinfo->probed = true;
1603
1604         return ERROR_OK;
1605 }
1606
1607 static int kinetis_probe(struct flash_bank *bank)
1608 {
1609         if (bank->target->state != TARGET_HALTED) {
1610                 LOG_WARNING("Cannot communicate... target not halted.");
1611                 return ERROR_TARGET_NOT_HALTED;
1612         }
1613
1614         return kinetis_read_part_info(bank);
1615 }
1616
1617 static int kinetis_auto_probe(struct flash_bank *bank)
1618 {
1619         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1620
1621         if (kinfo && kinfo->probed)
1622                 return ERROR_OK;
1623
1624         return kinetis_probe(bank);
1625 }
1626
1627 static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
1628 {
1629         const char *bank_class_names[] = {
1630                 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
1631         };
1632
1633         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1634
1635         (void) snprintf(buf, buf_size,
1636                         "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
1637                         bank->driver->name, bank_class_names[kinfo->flash_class],
1638                         bank->name, bank->base);
1639
1640         return ERROR_OK;
1641 }
1642
1643 static int kinetis_blank_check(struct flash_bank *bank)
1644 {
1645         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1646
1647         if (bank->target->state != TARGET_HALTED) {
1648                 LOG_ERROR("Target not halted");
1649                 return ERROR_TARGET_NOT_HALTED;
1650         }
1651
1652         if (kinfo->flash_class == FC_PFLASH || kinfo->flash_class == FC_FLEX_NVM) {
1653                 int result;
1654                 bool block_dirty = false;
1655                 uint8_t ftfx_fstat;
1656
1657                 if (kinfo->flash_class == FC_FLEX_NVM) {
1658                         uint8_t fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
1659                         /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
1660                         if (fcfg1_depart != 0xf && fcfg1_depart != 0)
1661                                 block_dirty = true;
1662                 }
1663
1664                 if (!block_dirty) {
1665                         /* check if whole bank is blank */
1666                         result = kinetis_ftfx_command(bank->target, FTFx_CMD_BLOCKSTAT, kinfo->prog_base,
1667                                                          0, 0, 0, 0,  0, 0, 0, 0, &ftfx_fstat);
1668
1669                         if (result != ERROR_OK || (ftfx_fstat & 0x01))
1670                                 block_dirty = true;
1671                 }
1672
1673                 if (block_dirty) {
1674                         /* the whole bank is not erased, check sector-by-sector */
1675                         int i;
1676                         for (i = 0; i < bank->num_sectors; i++) {
1677                                 /* normal margin */
1678                                 result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT,
1679                                                 kinfo->prog_base + bank->sectors[i].offset,
1680                                                 1, 0, 0, 0,  0, 0, 0, 0, &ftfx_fstat);
1681
1682                                 if (result == ERROR_OK) {
1683                                         bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
1684                                 } else {
1685                                         LOG_DEBUG("Ignoring errored PFlash sector blank-check");
1686                                         bank->sectors[i].is_erased = -1;
1687                                 }
1688                         }
1689                 } else {
1690                         /* the whole bank is erased, update all sectors */
1691                         int i;
1692                         for (i = 0; i < bank->num_sectors; i++)
1693                                 bank->sectors[i].is_erased = 1;
1694                 }
1695         } else {
1696                 LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
1697                 return ERROR_FLASH_OPERATION_FAILED;
1698         }
1699
1700         return ERROR_OK;
1701 }
1702
1703
1704 COMMAND_HANDLER(kinetis_nvm_partition)
1705 {
1706         int result, i;
1707         unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
1708         enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
1709         bool enable;
1710         uint8_t ftfx_fstat;
1711         uint8_t load_flex_ram = 1;
1712         uint8_t ee_size_code = 0x3f;
1713         uint8_t flex_nvm_partition_code = 0;
1714         uint8_t ee_split = 3;
1715         struct target *target = get_current_target(CMD_CTX);
1716         struct flash_bank *bank;
1717         struct kinetis_flash_bank *kinfo;
1718         uint32_t sim_fcfg1;
1719
1720         if (CMD_ARGC >= 2) {
1721                 if (strcmp(CMD_ARGV[0], "dataflash") == 0)
1722                         sz_type = DF_SIZE;
1723                 else if (strcmp(CMD_ARGV[0], "eebkp") == 0)
1724                         sz_type = EEBKP_SIZE;
1725
1726                 par = strtoul(CMD_ARGV[1], NULL, 10);
1727                 while (par >> (log2 + 3))
1728                         log2++;
1729         }
1730         switch (sz_type) {
1731         case SHOW_INFO:
1732                 result = target_read_u32(target, SIM_FCFG1, &sim_fcfg1);
1733                 if (result != ERROR_OK)
1734                         return result;
1735
1736                 flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
1737                 switch (flex_nvm_partition_code) {
1738                 case 0:
1739                         command_print(CMD_CTX, "No EEPROM backup, data flash only");
1740                         break;
1741                 case 1:
1742                 case 2:
1743                 case 3:
1744                 case 4:
1745                 case 5:
1746                 case 6:
1747                         command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
1748                         break;
1749                 case 8:
1750                         command_print(CMD_CTX, "No data flash, EEPROM backup only");
1751                         break;
1752                 case 0x9:
1753                 case 0xA:
1754                 case 0xB:
1755                 case 0xC:
1756                 case 0xD:
1757                 case 0xE:
1758                         command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
1759                         break;
1760                 case 0xf:
1761                         command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
1762                         break;
1763                 default:
1764                         command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
1765                 }
1766                 return ERROR_OK;
1767
1768         case DF_SIZE:
1769                 flex_nvm_partition_code = 0x8 | log2;
1770                 break;
1771
1772         case EEBKP_SIZE:
1773                 flex_nvm_partition_code = log2;
1774                 break;
1775         }
1776
1777         if (CMD_ARGC == 3)
1778                 ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2;
1779         else if (CMD_ARGC >= 4) {
1780                 ee1 = strtoul(CMD_ARGV[2], NULL, 10);
1781                 ee2 = strtoul(CMD_ARGV[3], NULL, 10);
1782         }
1783
1784         enable = ee1 + ee2 > 0;
1785         if (enable) {
1786                 for (log2 = 2; ; log2++) {
1787                         if (ee1 + ee2 == (16u << 10) >> log2)
1788                                 break;
1789                         if (ee1 + ee2 > (16u << 10) >> log2 || log2 >= 9) {
1790                                 LOG_ERROR("Unsupported EEPROM size");
1791                                 return ERROR_FLASH_OPERATION_FAILED;
1792                         }
1793                 }
1794
1795                 if (ee1 * 3 == ee2)
1796                         ee_split = 1;
1797                 else if (ee1 * 7 == ee2)
1798                         ee_split = 0;
1799                 else if (ee1 != ee2) {
1800                         LOG_ERROR("Unsupported EEPROM sizes ratio");
1801                         return ERROR_FLASH_OPERATION_FAILED;
1802                 }
1803
1804                 ee_size_code = log2 | ee_split << 4;
1805         }
1806
1807         if (CMD_ARGC >= 5)
1808                 COMMAND_PARSE_ON_OFF(CMD_ARGV[4], enable);
1809         if (enable)
1810                 load_flex_ram = 0;
1811
1812         LOG_INFO("DEPART 0x%" PRIx8 ", EEPROM size code 0x%" PRIx8,
1813                  flex_nvm_partition_code, ee_size_code);
1814
1815         if (target->state != TARGET_HALTED) {
1816                 LOG_ERROR("Target not halted");
1817                 return ERROR_TARGET_NOT_HALTED;
1818         }
1819
1820         result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram,
1821                                       ee_size_code, flex_nvm_partition_code, 0, 0,
1822                                       0, 0, 0, 0,  &ftfx_fstat);
1823         if (result != ERROR_OK)
1824                 return result;
1825
1826         command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
1827
1828         for (i = 1; i < 4; i++) {
1829                 bank = get_flash_bank_by_num_noprobe(i);
1830                 if (bank == NULL)
1831                         break;
1832
1833                 kinfo = bank->driver_priv;
1834                 if (kinfo && kinfo->flash_class == FC_FLEX_NVM)
1835                         kinfo->probed = false;  /* re-probe before next use */
1836         }
1837
1838         command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
1839         return ERROR_OK;
1840 }
1841
1842
1843 static const struct command_registration kinetis_securtiy_command_handlers[] = {
1844         {
1845                 .name = "check_security",
1846                 .mode = COMMAND_EXEC,
1847                 .help = "",
1848                 .usage = "",
1849                 .handler = kinetis_check_flash_security_status,
1850         },
1851         {
1852                 .name = "mass_erase",
1853                 .mode = COMMAND_EXEC,
1854                 .help = "",
1855                 .usage = "",
1856                 .handler = kinetis_mdm_mass_erase,
1857         },
1858         COMMAND_REGISTRATION_DONE
1859 };
1860
1861 static const struct command_registration kinetis_exec_command_handlers[] = {
1862         {
1863                 .name = "mdm",
1864                 .mode = COMMAND_ANY,
1865                 .help = "",
1866                 .usage = "",
1867                 .chain = kinetis_securtiy_command_handlers,
1868         },
1869         {
1870                 .name = "disable_wdog",
1871                 .mode = COMMAND_EXEC,
1872                 .help = "Disable the watchdog timer",
1873                 .usage = "",
1874                 .handler = kinetis_disable_wdog_handler,
1875         },
1876         {
1877                 .name = "nvm_partition",
1878                 .mode = COMMAND_EXEC,
1879                 .help = "Show/set data flash or EEPROM backup size in kilobytes,"
1880                         " set two EEPROM sizes in bytes and FlexRAM loading during reset",
1881                 .usage = "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
1882                 .handler = kinetis_nvm_partition,
1883         },
1884         COMMAND_REGISTRATION_DONE
1885 };
1886
1887 static const struct command_registration kinetis_command_handler[] = {
1888         {
1889                 .name = "kinetis",
1890                 .mode = COMMAND_ANY,
1891                 .help = "kinetis flash controller commands",
1892                 .usage = "",
1893                 .chain = kinetis_exec_command_handlers,
1894         },
1895         COMMAND_REGISTRATION_DONE
1896 };
1897
1898
1899
1900 struct flash_driver kinetis_flash = {
1901         .name = "kinetis",
1902         .commands = kinetis_command_handler,
1903         .flash_bank_command = kinetis_flash_bank_command,
1904         .erase = kinetis_erase,
1905         .protect = kinetis_protect,
1906         .write = kinetis_write,
1907         .read = default_flash_read,
1908         .probe = kinetis_probe,
1909         .auto_probe = kinetis_auto_probe,
1910         .erase_check = kinetis_blank_check,
1911         .protect_check = kinetis_protect_check,
1912         .info = kinetis_info,
1913 };