git.sur5r.net Git - openocd/blob - src/flash/orion_nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2009 by Marvell Semiconductors, Inc.                    *
   3  *   Written by Nicolas Pitre <nico at marvell.com>                           *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * NAND controller interface for Marvell Orion/Kirkwood SoCs.
  23  */
  24
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "arm_nandio.h"
  30 #include "armv4_5.h"
  31
  32
  33 typedef struct orion_nand_controller_s
  34 {
  35         struct target_s *target;
  36
  37         struct arm_nand_data    io;
  38
  39         uint32_t                cmd;
  40         uint32_t                addr;
  41         uint32_t                data;
  42 } orion_nand_controller_t;
  43
  44 #define CHECK_HALTED \
  45         do { \
  46                 if (target->state != TARGET_HALTED) { \
  47                         LOG_ERROR("NAND flash access requires halted target"); \
  48                         return ERROR_NAND_OPERATION_FAILED; \
  49                 } \
  50         } while (0)
  51
  52 static int orion_nand_command(struct nand_device_s *device, uint8_t command)
  53 {
  54         orion_nand_controller_t *hw = device->controller_priv;
  55         target_t *target = hw->target;
  56
  57         CHECK_HALTED;
  58         target_write_u8(target, hw->cmd, command);
  59         return ERROR_OK;
  60 }
  61
  62 static int orion_nand_address(struct nand_device_s *device, uint8_t address)
  63 {
  64         orion_nand_controller_t *hw = device->controller_priv;
  65         target_t *target = hw->target;
  66
  67         CHECK_HALTED;
  68         target_write_u8(target, hw->addr, address);
  69         return ERROR_OK;
  70 }
  71
  72 static int orion_nand_read(struct nand_device_s *device, void *data)
  73 {
  74         orion_nand_controller_t *hw = device->controller_priv;
  75         target_t *target = hw->target;
  76
  77         CHECK_HALTED;
  78         target_read_u8(target, hw->data, data);
  79         return ERROR_OK;
  80 }
  81
  82 static int orion_nand_write(struct nand_device_s *device, uint16_t data)
  83 {
  84         orion_nand_controller_t *hw = device->controller_priv;
  85         target_t *target = hw->target;
  86
  87         CHECK_HALTED;
  88         target_write_u8(target, hw->data, data);
  89         return ERROR_OK;
  90 }
  91
  92 static int orion_nand_slow_block_write(struct nand_device_s *device, uint8_t *data, int size)
  93 {
  94         while (size--)
  95                 orion_nand_write(device, *data++);
  96         return ERROR_OK;
  97 }
  98
  99 static int orion_nand_fast_block_write(struct nand_device_s *device, uint8_t *data, int size)
 100 {
 101         orion_nand_controller_t *hw = device->controller_priv;
 102         int retval;
 103
 104         hw->io.chunk_size = device->page_size;
 105
 106         retval = arm_nandwrite(&hw->io, data, size);
 107         if (retval == ERROR_NAND_NO_BUFFER)
 108                 retval = orion_nand_slow_block_write(device, data, size);
 109
 110         return retval;
 111 }
 112
 113 static int orion_nand_reset(struct nand_device_s *device)
 114 {
 115         return orion_nand_command(device, NAND_CMD_RESET);
 116 }
 117
 118 static int orion_nand_controller_ready(struct nand_device_s *device, int timeout)
 119 {
 120         return 1;
 121 }
 122
 123 static int orion_nand_register_commands(struct command_context_s *cmd_ctx)
 124 {
 125         return ERROR_OK;
 126 }
 127
 128 int orion_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
 129                               char **args, int argc,
 130                               struct nand_device_s *device)
 131 {
 132         orion_nand_controller_t *hw;
 133         uint32_t base;
 134         uint8_t ale, cle;
 135
 136         if (argc != 3) {
 137                 LOG_ERROR("arguments must be: <target_id> <NAND_address>\n");
 138                 return ERROR_NAND_DEVICE_INVALID;
 139         }
 140
 141         hw = calloc(1, sizeof(*hw));
 142         if (!hw) {
 143                 LOG_ERROR("no memory for nand controller\n");
 144                 return ERROR_NAND_DEVICE_INVALID;
 145         }
 146
 147         device->controller_priv = hw;
 148         hw->target = get_target(args[1]);
 149         if (!hw->target) {
 150                 LOG_ERROR("target '%s' not defined", args[1]);
 151                 free(hw);
 152                 return ERROR_NAND_DEVICE_INVALID;
 153         }
 154
 155         base = strtoul(args[2], NULL, 0);
 156         cle = 0;
 157         ale = 1;
 158
 159         hw->data = base;
 160         hw->cmd = base + (1 << cle);
 161         hw->addr = base + (1 << ale);
 162
 163         hw->io.target = hw->target;
 164         hw->io.data = hw->data;
 165
 166         return ERROR_OK;
 167 }
 168
 169 static int orion_nand_init(struct nand_device_s *device)
 170 {
 171         return ERROR_OK;
 172 }
 173
 174 nand_flash_controller_t orion_nand_controller =
 175 {
 176         .name                   = "orion",
 177         .command                = orion_nand_command,
 178         .address                = orion_nand_address,
 179         .read_data              = orion_nand_read,
 180         .write_data             = orion_nand_write,
 181         .write_block_data       = orion_nand_fast_block_write,
 182         .reset                  = orion_nand_reset,
 183         .controller_ready       = orion_nand_controller_ready,
 184         .nand_device_command    = orion_nand_device_command,
 185         .register_commands      = orion_nand_register_commands,
 186         .init                   = orion_nand_init,
 187 };
 188