1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * Copyright (C) 2008 by John McCarthy *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
32 typedef struct pic32mx_flash_bank_s
34 working_area_t *write_algorithm;
38 } pic32mx_flash_bank_t;
40 #define PIC32MX_MANUF_ID 0x029
42 /* pic32mx memory locations */
44 #define PIC32MX_KUSEG_PGM_FLASH 0x7D000000
45 #define PIC32MX_KUSEG_RAM 0x7F000000
47 #define PIC32MX_KSEG0_RAM 0x80000000
48 #define PIC32MX_KSEG0_PGM_FLASH 0x9D000000
49 #define PIC32MX_KSEG0_BOOT_FLASH 0x9FC00000
51 #define PIC32MX_KSEG1_RAM 0xA0000000
52 #define PIC32MX_KSEG1_PGM_FLASH 0xBD000000
53 #define PIC32MX_KSEG1_PERIPHERAL 0xBF800000
54 #define PIC32MX_KSEG1_BOOT_FLASH 0xBFC00000
56 #define PIC32MX_PHYS_RAM 0x00000000
57 #define PIC32MX_PHYS_PGM_FLASH 0x1D000000
58 #define PIC32MX_PHYS_PERIPHERALS 0x1F800000
59 #define PIC32MX_PHYS_BOOT_FLASH 0x1FC00000
62 * Translate Virtual and Physical addresses.
63 * Note: These macros only work for KSEG0/KSEG1 addresses.
65 #define KS1Virt2Phys(vaddr) ((vaddr)-0xA0000000)
66 #define Phys2KS1Virt(paddr) ((paddr)+0xA0000000)
67 #define KS0Virt2Phys(vaddr) ((vaddr)-0x80000000)
68 #define Phys2KS0Virt(paddr) ((paddr)+0x80000000)
70 /* pic32mx configuration register locations */
72 #define PIC32MX_DEVCFG0 0xBFC02FFC
73 #define PIC32MX_DEVCFG1 0xBFC02FF8
74 #define PIC32MX_DEVCFG2 0xBFC02FF4
75 #define PIC32MX_DEVCFG3 0XBFC02FF0
76 #define PIC32MX_DEVID 0xBF80F220
78 /* pic32mx flash controller register locations */
80 #define PIC32MX_NVMCON 0xBF80F400
81 #define PIC32MX_NVMCONCLR 0xBF80F404
82 #define PIC32MX_NVMCONSET 0xBF80F408
83 #define PIC32MX_NVMCONINV 0xBF80F40C
84 #define NVMCON_NVMWR (1<<15)
85 #define NVMCON_NVMWREN (1<<14)
86 #define NVMCON_NVMERR (1<<13)
87 #define NVMCON_LVDERR (1<<12)
88 #define NVMCON_LVDSTAT (1<<11)
89 #define NVMCON_OP_PFM_ERASE 0x5
90 #define NVMCON_OP_PAGE_ERASE 0x4
91 #define NVMCON_OP_ROW_PROG 0x3
92 #define NVMCON_OP_WORD_PROG 0x1
93 #define NVMCON_OP_NOP 0x0
95 #define PIC32MX_NVMKEY 0xBF80F410
96 #define PIC32MX_NVMADDR 0xBF80F420
97 #define PIC32MX_NVMADDRCLR 0xBF80F424
98 #define PIC32MX_NVMADDRSET 0xBF80F428
99 #define PIC32MX_NVMADDRINV 0xBF80F42C
100 #define PIC32MX_NVMDATA 0xBF80F430
101 #define PIC32MX_NVMSRCADDR 0xBF80F440
103 /* flash unlock keys */
105 #define NVMKEY1 0xAA996655
106 #define NVMKEY2 0x556699AA
108 typedef struct pic32mx_mem_layout_s {
111 } pic32mx_mem_layout_t;
113 #endif /* PIC32MX_H */