1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
22 * S3C2410 OpenOCD NAND Flash controller support.
24 * Many thanks to Simtec Electronics for sponsoring this work.
31 #include "s3c24xx_nand.h"
33 static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
34 char **args, int argc,
35 struct nand_device_s *nand)
37 s3c24xx_nand_controller_t *info;
38 CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
40 /* fill in the address fields for the core device */
41 info->cmd = S3C2410_NFCMD;
42 info->addr = S3C2410_NFADDR;
43 info->data = S3C2410_NFDATA;
44 info->nfstat = S3C2410_NFSTAT;
49 static int s3c2410_init(struct nand_device_s *nand)
51 s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
52 target_t *target = s3c24xx_info->target;
54 target_write_u32(target, S3C2410_NFCONF,
55 S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
56 S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
61 static int s3c2410_write_data(struct nand_device_s *nand, uint16_t data)
63 s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
64 target_t *target = s3c24xx_info->target;
66 if (target->state != TARGET_HALTED) {
67 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
68 return ERROR_NAND_OPERATION_FAILED;
71 target_write_u32(target, S3C2410_NFDATA, data);
75 static int s3c2410_read_data(struct nand_device_s *nand, void *data)
77 s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
78 target_t *target = s3c24xx_info->target;
80 if (target->state != TARGET_HALTED) {
81 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
82 return ERROR_NAND_OPERATION_FAILED;
85 target_read_u8(target, S3C2410_NFDATA, data);
89 static int s3c2410_nand_ready(struct nand_device_s *nand, int timeout)
91 s3c24xx_nand_controller_t *s3c24xx_info = nand->controller_priv;
92 target_t *target = s3c24xx_info->target;
95 if (target->state != TARGET_HALTED) {
96 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
97 return ERROR_NAND_OPERATION_FAILED;
101 target_read_u8(target, S3C2410_NFSTAT, &status);
103 if (status & S3C2410_NFSTAT_BUSY)
107 } while (timeout-- > 0);
112 nand_flash_controller_t s3c2410_nand_controller = {
114 .nand_device_command = &s3c2410_nand_device_command,
115 .register_commands = &s3c24xx_register_commands,
116 .init = &s3c2410_init,
117 .reset = &s3c24xx_reset,
118 .command = &s3c24xx_command,
119 .address = &s3c24xx_address,
120 .write_data = &s3c2410_write_data,
121 .read_data = &s3c2410_read_data,
122 .write_page = s3c24xx_write_page,
123 .read_page = s3c24xx_read_page,
124 .controller_ready = &s3c24xx_controller_ready,
125 .nand_ready = &s3c2410_nand_ready,