1 /* src/flash/s3c2443_nand.c
3 * S3C2443 OpenOCD NAND Flash controller support.
5 * Copyright 2007,2008 Ben Dooks <ben@fluff.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * Many thanks to Simtec Electronics for sponsoring this work.
20 #include "replacements.h"
27 #include "s3c24xx_nand.h"
30 int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
31 int s3c2443_init(struct nand_device_s *device);
32 int s3c2443_nand_ready(struct nand_device_s *device, int timeout);
34 nand_flash_controller_t s3c2443_nand_controller =
37 .nand_device_command = s3c2443_nand_device_command,
38 .register_commands = s3c24xx_register_commands,
40 .reset = s3c24xx_reset,
41 .command = s3c24xx_command,
42 .address = s3c24xx_address,
43 .write_data = s3c24xx_write_data,
44 .read_data = s3c24xx_read_data,
45 .write_page = s3c24xx_write_page,
46 .read_page = s3c24xx_read_page,
47 .write_block_data = s3c2440_write_block_data,
48 .read_block_data = s3c2440_read_block_data,
49 .controller_ready = s3c24xx_controller_ready,
50 .nand_ready = s3c2440_nand_ready,
53 int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
54 char **args, int argc,
55 struct nand_device_s *device)
57 s3c24xx_nand_controller_t *info;
59 info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
61 return ERROR_NAND_DEVICE_INVALID;
64 /* fill in the address fields for the core device */
65 info->cmd = S3C2440_NFCMD;
66 info->addr = S3C2440_NFADDR;
67 info->data = S3C2440_NFDATA;
68 info->nfstat = S3C2412_NFSTAT;
73 int s3c2443_init(struct nand_device_s *device)
75 s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
76 target_t *target = s3c24xx_info->target;
79 target_write_u32(target, S3C2410_NFCONF,
80 S3C2440_NFCONF_TACLS(3) |
81 S3C2440_NFCONF_TWRPH0(7) |
82 S3C2440_NFCONF_TWRPH1(7));
84 target_write_u32(target, S3C2440_NFCONT,
85 S3C2412_NFCONT_INIT_MAIN_ECC |
86 S3C2440_NFCONT_ENABLE);