]> git.sur5r.net Git - openocd/blob - src/flash/s3c24xx_nand.h
David Brownell <david-b@pacbell.net>:
[openocd] / src / flash / s3c24xx_nand.h
1 /***************************************************************************
2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
3  *   ben@fluff.org                                                         *
4  *                                                                         *
5  *   This program is free software; you can redistribute it and/or modify  *
6  *   it under the terms of the GNU General Public License as published by  *
7  *   the Free Software Foundation; either version 2 of the License, or     *
8  *   (at your option) any later version.                                   *
9  *                                                                         *
10  *   This program is distributed in the hope that it will be useful,       *
11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
13  *   GNU General Public License for more details.                          *
14  *                                                                         *
15  *   You should have received a copy of the GNU General Public License     *
16  *   along with this program; if not, write to the                         *
17  *   Free Software Foundation, Inc.,                                       *
18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
19  ***************************************************************************/
20
21 /*
22  * S3C24XX Series OpenOCD NAND Flash controller support.
23  *
24  * Many thanks to Simtec Electronics for sponsoring this work.
25  */
26
27 #include "nand.h"
28 #include "s3c24xx_regs_nand.h"
29
30 typedef struct s3c24xx_nand_controller_s
31 {
32         struct target_s *target;
33
34         /* register addresses */
35         u32              cmd;
36         u32              addr;
37         u32              data;
38         u32              nfstat;
39 } s3c24xx_nand_controller_t;
40
41 /* Default to using the un-translated NAND register based address */
42 #undef S3C2410_NFREG
43 #define S3C2410_NFREG(x) ((x) + 0x4e000000)
44
45 extern s3c24xx_nand_controller_t *s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
46
47 extern int s3c24xx_register_commands(struct command_context_s *cmd_ctx);
48 extern int s3c24xx_reset(struct nand_device_s *device);
49 extern int s3c24xx_command(struct nand_device_s *device, u8 command);
50 extern int s3c24xx_address(struct nand_device_s *device, u8 address);
51 extern int s3c24xx_write_data(struct nand_device_s *device, u16 data);
52 extern int s3c24xx_read_data(struct nand_device_s *device, void *data);
53 extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout);
54
55 #define s3c24xx_write_page NULL
56 #define s3c24xx_read_page NULL
57
58 /* code shared between different controllers */
59
60 extern int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
61
62 extern int s3c2440_read_block_data(struct nand_device_s *, u8 *data, int data_size);
63 extern int s3c2440_write_block_data(struct nand_device_s *, u8 *data, int data_size);