1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * STELLARIS is tested on LM3S811
26 ***************************************************************************/
31 #include "replacements.h"
33 #include "stellaris.h"
34 #include "cortex_m3.h"
39 #include "binarybuffer.h"
46 int stellaris_register_commands(struct command_context_s *cmd_ctx);
47 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
48 int stellaris_erase(struct flash_bank_s *bank, int first, int last);
49 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
50 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
51 int stellaris_probe(struct flash_bank_s *bank);
52 int stellaris_erase_check(struct flash_bank_s *bank);
53 int stellaris_protect_check(struct flash_bank_s *bank);
54 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
56 u32 stellaris_get_flash_status(flash_bank_t *bank);
57 void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
58 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
60 flash_driver_t stellaris_flash =
63 .register_commands = stellaris_register_commands,
64 .flash_bank_command = stellaris_flash_bank_command,
65 .erase = stellaris_erase,
66 .protect = stellaris_protect,
67 .write = stellaris_write,
68 .probe = stellaris_probe,
69 .erase_check = stellaris_erase_check,
70 .protect_check = stellaris_protect_check,
71 .info = stellaris_info
102 /***************************************************************************
103 * openocd command interface *
104 ***************************************************************************/
106 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
108 stellaris_flash_bank_t *stellaris_info;
112 WARNING("incomplete flash_bank stellaris configuration");
113 return ERROR_FLASH_BANK_INVALID;
116 stellaris_info = calloc(sizeof(stellaris_flash_bank_t),1);
118 bank->driver_priv = stellaris_info;
120 stellaris_info->target_name ="Unknown target";
121 stellaris_info->target = get_target_by_num(strtoul(args[5], NULL, 0));
122 if (!stellaris_info->target)
124 ERROR("no target '%i' configured", args[5]);
128 /* part wasn't probed for info yet */
129 stellaris_info->did1 = 0;
131 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
135 int stellaris_register_commands(struct command_context_s *cmd_ctx)
138 command_t *stellaris_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, NULL);
139 register_command(cmd_ctx, stellaris_cmd, "gpnvm", stellaris_handle_gpnvm_command, COMMAND_EXEC,
140 "stellaris gpnvm <num> <bit> set|clear, set or clear stellaris gpnvm bit");
145 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
148 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
150 stellaris_read_part_info(bank);
152 if (stellaris_info->did1 == 0)
154 printed = snprintf(buf, buf_size, "Cannot identify target as a Stellaris\n");
157 return ERROR_FLASH_OPERATION_FAILED;
160 printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is %s v%i.%02i\n",stellaris_info->target_name, (stellaris_info->did0>>8)&0xFF, (stellaris_info->did0)&0xFF);
164 printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
165 stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+(stellaris_info->dc0>>16)&0xFFFF)/4, (1+stellaris_info->dc0&0xFFFF)*2);
169 printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info->mck_freq / 1000, stellaris_info->rcc);
173 if (stellaris_info->num_lockbits>0) {
174 printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info->pagesize, stellaris_info->num_lockbits, stellaris_info->lockbits,stellaris_info->num_pages/stellaris_info->num_lockbits);
181 /***************************************************************************
182 * chip identification and status *
183 ***************************************************************************/
185 u32 stellaris_get_flash_status(flash_bank_t *bank)
187 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
188 target_t *target = stellaris_info->target;
191 target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
196 /** Read clock configuration and set stellaris_info->usec_clocks*/
198 void stellaris_read_clock_info(flash_bank_t *bank)
200 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
201 target_t *target = stellaris_info->target;
202 u32 rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
203 unsigned long tmp, mainfreq;
205 target_read_u32(target, SCB_BASE|RCC, &rcc);
206 DEBUG("Stellaris RCC %x",rcc);
207 target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
208 DEBUG("Stellaris PLLCFG %x",pllcfg);
209 stellaris_info->rcc = rcc;
211 sysdiv = (rcc>>23)&0xF;
212 usesysdiv = (rcc>>22)&0x1;
213 bypass = (rcc>>11)&0x1;
214 oscsrc = (rcc>>4)&0x3;
215 /* xtal = (rcc>>6)&0xF; */
219 mainfreq = 6000000; /* Default xtal */
222 mainfreq = 22500000; /* Internal osc. 15 MHz +- 50% */
225 mainfreq = 5625000; /* Internal osc. / 4 */
228 WARNING("Invalid oscsrc (3) in rcc register");
234 mainfreq = 200000000; /* PLL out frec */
237 stellaris_info->mck_freq = mainfreq/(1+sysdiv);
239 stellaris_info->mck_freq = mainfreq;
241 /* Forget old flash timing */
242 stellaris_set_flash_mode(bank,0);
245 /* Setup the timimg registers */
246 void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
248 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
249 target_t *target = stellaris_info->target;
251 u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
252 DEBUG("usecrl = %i",usecrl);
253 target_write_u32(target, SCB_BASE|USECRL , usecrl);
257 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
261 /* Stellaris waits for cmdbit to clear */
262 while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
264 DEBUG("status: 0x%x", status);
268 /* Flash errors are reflected in the FLASH_CRIS register */
274 /* Send one command to the flash controller */
275 int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
278 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
279 target_t *target = stellaris_info->target;
281 fmc = FMC_WRKEY | cmd;
282 target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
283 DEBUG("Flash command: 0x%x", fmc);
285 if (stellaris_wait_status_busy(bank, cmd, 100))
287 return ERROR_FLASH_OPERATION_FAILED;
293 /* Read device id register, main clock frequency register and fill in driver info structure */
294 int stellaris_read_part_info(struct flash_bank_s *bank)
296 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
297 target_t *target = stellaris_info->target;
298 u32 did0,did1, status;
301 /* Read and parse chip identification register */
302 target_read_u32(target, SCB_BASE|DID0, &did0);
303 target_read_u32(target, SCB_BASE|DID1, &did1);
304 target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
305 target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
306 DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1);
308 if (((did0>>27)&0x7))
310 WARNING("Unkown did0 version, cannot identify target");
311 return ERROR_FLASH_OPERATION_FAILED;
317 WARNING("Unkown did1 version/family, cannot positively identify target as a Stellaris");
322 WARNING("Cannot identify target as a Stellaris");
323 return ERROR_FLASH_OPERATION_FAILED;
326 for (i=0;StellarisParts[i].partno;i++)
328 if (StellarisParts[i].partno==((did1>>16)&0xFF))
332 stellaris_info->target_name = StellarisParts[i].partname;
334 stellaris_info->did0 = did0;
335 stellaris_info->did1 = did1;
337 stellaris_info->num_lockbits = 1+stellaris_info->dc0&0xFFFF;
338 stellaris_info->num_pages = 2*(1+stellaris_info->dc0&0xFFFF);
339 stellaris_info->pagesize = 1024;
340 bank->size = 1024*stellaris_info->num_pages;
341 stellaris_info->pages_in_lockregion = 2;
342 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
344 // Read main and master clock freqency register
345 stellaris_read_clock_info(bank);
347 status = stellaris_get_flash_status(bank);
349 WARNING("stellaris flash only tested for LM3S811 series");
354 /***************************************************************************
356 ***************************************************************************/
358 int stellaris_erase_check(struct flash_bank_s *bank)
360 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
361 target_t *target = stellaris_info->target;
369 int stellaris_protect_check(struct flash_bank_s *bank)
373 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
374 target_t *target = stellaris_info->target;
376 if (stellaris_info->did1 == 0)
378 stellaris_read_part_info(bank);
381 if (stellaris_info->did1 == 0)
383 WARNING("Cannot identify target as an AT91SAM");
384 return ERROR_FLASH_OPERATION_FAILED;
387 status = stellaris_get_flash_status(bank);
388 stellaris_info->lockbits = status >> 16;
393 int stellaris_erase(struct flash_bank_s *bank, int first, int last)
396 u32 flash_fmc, flash_cris;
397 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
398 target_t *target = stellaris_info->target;
400 if (stellaris_info->target->state != TARGET_HALTED)
402 return ERROR_TARGET_NOT_HALTED;
405 if (stellaris_info->did1 == 0)
407 stellaris_read_part_info(bank);
410 if (stellaris_info->did1 == 0)
412 WARNING("Cannot identify target as an AT91SAM");
413 return ERROR_FLASH_OPERATION_FAILED;
416 if ((first < 0) || (last < first) || (last >= stellaris_info->num_pages))
418 return ERROR_FLASH_SECTOR_INVALID;
421 /* Configure the flash controller timing */
422 stellaris_read_clock_info(bank);
423 stellaris_set_flash_mode(bank,0);
425 /* Clear and disable flash programming interrupts */
426 target_write_u32(target, FLASH_CIM, 0);
427 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
429 if ((first == 0) && (last == (stellaris_info->num_pages-1)))
431 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
432 /* Wait until erase complete */
435 target_read_u32(target, FLASH_FMC, &flash_fmc);
437 while(flash_fmc & FMC_MERASE);
442 for (banknr=first;banknr<=last;banknr++)
444 /* Address is first word in page */
445 target_write_u32(target, FLASH_FMA, banknr*stellaris_info->pagesize);
446 /* Write erase command */
447 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
448 /* Wait until erase complete */
451 target_read_u32(target, FLASH_FMC, &flash_fmc);
453 while(flash_fmc & FMC_ERASE);
455 /* Check acess violations */
456 target_read_u32(target, FLASH_CRIS, &flash_cris);
457 if(flash_cris & (AMASK))
459 WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
460 target_write_u32(target, FLASH_CRIS, 0);
461 return ERROR_FLASH_OPERATION_FAILED;
468 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
470 u32 cmd, fmppe, flash_fmc, flash_cris;
473 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
474 target_t *target = stellaris_info->target;
476 if (stellaris_info->target->state != TARGET_HALTED)
478 return ERROR_TARGET_NOT_HALTED;
481 if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits))
483 return ERROR_FLASH_SECTOR_INVALID;
486 if (stellaris_info->did1 == 0)
488 stellaris_read_part_info(bank);
491 if (stellaris_info->did1 == 0)
493 WARNING("Cannot identify target as an Stellaris MCU");
494 return ERROR_FLASH_OPERATION_FAILED;
497 /* Configure the flash controller timing */
498 stellaris_read_clock_info(bank);
499 stellaris_set_flash_mode(bank,0);
501 fmppe = stellaris_info->lockbits;
502 for (lockregion=first;lockregion<=last;lockregion++)
505 fmppe &= ~(1<<lockregion);
507 fmppe |= (1<<lockregion);
510 /* Clear and disable flash programming interrupts */
511 target_write_u32(target, FLASH_CIM, 0);
512 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
514 DEBUG("fmppe 0x%x",fmppe);
515 target_write_u32(target, SCB_BASE|FMPPE, fmppe);
517 target_write_u32(target, FLASH_FMA, 1);
518 /* Write commit command */
519 /* TODO safety check, sice this cannot be undone */
520 WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
521 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
522 /* Wait until erase complete */
525 target_read_u32(target, FLASH_FMC, &flash_fmc);
527 while(flash_fmc & FMC_COMT);
529 /* Check acess violations */
530 target_read_u32(target, FLASH_CRIS, &flash_cris);
531 if(flash_cris & (AMASK))
533 WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
534 target_write_u32(target, FLASH_CRIS, 0);
535 return ERROR_FLASH_OPERATION_FAILED;
538 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
543 u8 stellaris_write_code[] =
547 r1 = destination address
548 r2 = bytecount (in) - endaddr (work)
549 r3 = pFLASH_CTRL_BASE
555 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
556 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
557 0x01,0x25, /* movs r5, 1 */
558 0x00,0x26, /* movs r6, #0 */
560 0x19,0x60, /* str r1, [r3, #0] */
561 0x87,0x59, /* ldr r7, [r0, r6] */
562 0x5F,0x60, /* str r7, [r3, #4] */
563 0x9C,0x60, /* str r4, [r3, #8] */
565 0x9F,0x68, /* ldr r7, [r3, #8] */
566 0x2F,0x42, /* tst r7, r5 */
567 0xFC,0xD1, /* bne waitloop */
568 0x04,0x31, /* adds r1, r1, #4 */
569 0x04,0x36, /* adds r6, r6, #4 */
570 0x96,0x42, /* cmp r6, r2 */
571 0xF4,0xD1, /* bne mainloop */
572 0x00,0xBE, /* bkpt #0 */
573 /* pFLASH_CTRL_BASE: */
574 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
576 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
579 int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
581 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
582 target_t *target = stellaris_info->target;
583 u32 buffer_size = 8192;
584 working_area_t *source;
585 working_area_t *write_algorithm;
586 u32 address = bank->base + offset;
587 reg_param_t reg_params[8];
588 armv7m_algorithm_t armv7m_info;
592 /* flash write code */
593 if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
595 WARNING("no working area available, can't do block memory writes");
596 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
599 target_write_buffer(target, write_algorithm->address, sizeof(stellaris_write_code), stellaris_write_code);
602 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
605 if (buffer_size <= 256)
607 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
609 target_free_working_area(target, write_algorithm);
611 WARNING("no large enough working area available, can't do block memory writes");
612 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
616 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
617 armv7m_info.core_mode = ARMV7M_MODE_ANY;
618 armv7m_info.core_state = ARMV7M_STATE_THUMB;
620 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
621 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
622 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
623 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
624 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
625 init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
626 init_reg_param(®_params[6], "r6", 32, PARAM_OUT);
627 init_reg_param(®_params[7], "r7", 32, PARAM_OUT);
631 u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
633 target_write_buffer(target, source->address, thisrun_count * 4, buffer);
635 buf_set_u32(reg_params[0].value, 0, 32, source->address);
636 buf_set_u32(reg_params[1].value, 0, 32, address);
637 buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
638 WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
639 DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
640 if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
642 ERROR("error executing stellaris flash write algorithm");
643 target_free_working_area(target, source);
644 destroy_reg_param(®_params[0]);
645 destroy_reg_param(®_params[1]);
646 destroy_reg_param(®_params[2]);
647 return ERROR_FLASH_OPERATION_FAILED;
650 buffer += thisrun_count * 4;
651 address += thisrun_count * 4;
652 wcount -= thisrun_count;
656 target_free_working_area(target, write_algorithm);
657 target_free_working_area(target, source);
659 destroy_reg_param(®_params[0]);
660 destroy_reg_param(®_params[1]);
661 destroy_reg_param(®_params[2]);
662 destroy_reg_param(®_params[3]);
663 destroy_reg_param(®_params[4]);
664 destroy_reg_param(®_params[5]);
665 destroy_reg_param(®_params[6]);
666 destroy_reg_param(®_params[7]);
671 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
673 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
674 target_t *target = stellaris_info->target;
675 u32 dst_min_alignment, wcount, bytes_remaining = count;
676 u32 address = offset;
677 u32 fcr,flash_cris,flash_fmc;
680 if (stellaris_info->target->state != TARGET_HALTED)
682 return ERROR_TARGET_NOT_HALTED;
685 if (stellaris_info->did1 == 0)
687 stellaris_read_part_info(bank);
690 if (stellaris_info->did1 == 0)
692 WARNING("Cannot identify target as a Stellaris processor");
693 return ERROR_FLASH_OPERATION_FAILED;
696 if((offset & 3) || (count & 3))
698 WARNING("offset size must be word aligned");
699 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
702 if (offset + count > bank->size)
703 return ERROR_FLASH_DST_OUT_OF_BANK;
705 /* Configure the flash controller timing */
706 stellaris_read_clock_info(bank);
707 stellaris_set_flash_mode(bank,0);
710 /* Clear and disable flash programming interrupts */
711 target_write_u32(target, FLASH_CIM, 0);
712 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
714 /* multiple words to be programmed? */
717 /* try using a block write */
718 if ((retval = stellaris_write_block(bank, buffer, offset, count/4)) != ERROR_OK)
720 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
722 /* if block write failed (no sufficient working area),
723 * we use normal (slow) single dword accesses */
724 WARNING("couldn't use block writes, falling back to single memory accesses");
726 else if (retval == ERROR_FLASH_OPERATION_FAILED)
728 /* if an error occured, we examine the reason, and quit */
729 target_read_u32(target, FLASH_CRIS, &flash_cris);
731 ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
732 return ERROR_FLASH_OPERATION_FAILED;
738 address += count * 4;
747 if (!(address&0xff)) DEBUG("0x%x",address);
748 /* Program one word */
749 target_write_u32(target, FLASH_FMA, address);
750 target_write_buffer(target, FLASH_FMD, 4, buffer);
751 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
752 //DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE);
753 /* Wait until write complete */
756 target_read_u32(target, FLASH_FMC, &flash_fmc);
758 while(flash_fmc & FMC_WRITE);
763 /* Check acess violations */
764 target_read_u32(target, FLASH_CRIS, &flash_cris);
765 if(flash_cris & (AMASK))
767 DEBUG("flash_cris 0x%x", flash_cris);
768 return ERROR_FLASH_OPERATION_FAILED;
774 int stellaris_probe(struct flash_bank_s *bank)
776 /* we can't probe on an stellaris
777 * if this is an stellaris, it has the configured flash
779 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
781 if (stellaris_info->did1 == 0)
783 stellaris_read_part_info(bank);
786 if (stellaris_info->did1 == 0)
788 WARNING("Cannot identify target as a LMI Stellaris");
789 return ERROR_FLASH_OPERATION_FAILED;