1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
24 /***************************************************************************
25 * STELLARIS is tested on LM3S811, LM3S6965
26 ***************************************************************************/
31 #include "replacements.h"
33 #include "stellaris.h"
34 #include "cortex_m3.h"
39 #include "binarybuffer.h"
46 #define DID0_VER(did0) ((did0>>28)&0x07)
47 int stellaris_register_commands(struct command_context_s *cmd_ctx);
48 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
49 int stellaris_erase(struct flash_bank_s *bank, int first, int last);
50 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
51 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
52 int stellaris_auto_probe(struct flash_bank_s *bank);
53 int stellaris_probe(struct flash_bank_s *bank);
54 int stellaris_protect_check(struct flash_bank_s *bank);
55 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
57 int stellaris_read_part_info(struct flash_bank_s *bank);
58 u32 stellaris_get_flash_status(flash_bank_t *bank);
59 void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
60 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
62 int stellaris_read_part_info(struct flash_bank_s *bank);
63 int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
64 int stellaris_mass_erase(struct flash_bank_s *bank);
66 flash_driver_t stellaris_flash =
69 .register_commands = stellaris_register_commands,
70 .flash_bank_command = stellaris_flash_bank_command,
71 .erase = stellaris_erase,
72 .protect = stellaris_protect,
73 .write = stellaris_write,
74 .probe = stellaris_probe,
75 .auto_probe = stellaris_auto_probe,
76 .erase_check = default_flash_mem_blank_check,
77 .protect_check = stellaris_protect_check,
78 .info = stellaris_info
118 /*{0x33,"LM3S2616"},*/
237 char * StellarisClassname[5] =
246 /***************************************************************************
247 * openocd command interface *
248 ***************************************************************************/
250 /* flash_bank stellaris <base> <size> 0 0 <target#>
252 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
254 stellaris_flash_bank_t *stellaris_info;
258 LOG_WARNING("incomplete flash_bank stellaris configuration");
259 return ERROR_FLASH_BANK_INVALID;
262 stellaris_info = calloc(sizeof(stellaris_flash_bank_t), 1);
264 bank->driver_priv = stellaris_info;
266 stellaris_info->target_name = "Unknown target";
268 /* part wasn't probed for info yet */
269 stellaris_info->did1 = 0;
271 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
275 int stellaris_register_commands(struct command_context_s *cmd_ctx)
277 command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, "stellaris flash specific commands");
279 register_command(cmd_ctx, stm32x_cmd, "mass_erase", stellaris_handle_mass_erase_command, COMMAND_EXEC, "mass erase device");
283 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
285 int printed, device_class;
286 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
288 stellaris_read_part_info(bank);
290 if (stellaris_info->did1 == 0)
292 printed = snprintf(buf, buf_size, "Cannot identify target as a Stellaris\n");
295 return ERROR_FLASH_OPERATION_FAILED;
298 if (DID0_VER(stellaris_info->did0) > 0)
300 device_class = (stellaris_info->did0>>16) & 0xFF;
306 printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
307 device_class, StellarisClassname[device_class], stellaris_info->target_name,
308 'A' + ((stellaris_info->did0>>8) & 0xFF), (stellaris_info->did0) & 0xFF);
312 printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
313 stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16) & 0xFFFF))/4, (1+(stellaris_info->dc0 & 0xFFFF))*2);
317 printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info->mck_freq / 1000, stellaris_info->rcc);
321 if (stellaris_info->num_lockbits>0)
323 printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info->pagesize, stellaris_info->num_lockbits, stellaris_info->lockbits,stellaris_info->num_pages/stellaris_info->num_lockbits);
330 /***************************************************************************
331 * chip identification and status *
332 ***************************************************************************/
334 u32 stellaris_get_flash_status(flash_bank_t *bank)
336 target_t *target = bank->target;
339 target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
344 /** Read clock configuration and set stellaris_info->usec_clocks*/
346 void stellaris_read_clock_info(flash_bank_t *bank)
348 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
349 target_t *target = bank->target;
350 u32 rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
351 unsigned long mainfreq;
353 target_read_u32(target, SCB_BASE|RCC, &rcc);
354 LOG_DEBUG("Stellaris RCC %x", rcc);
355 target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
356 LOG_DEBUG("Stellaris PLLCFG %x", pllcfg);
357 stellaris_info->rcc = rcc;
359 sysdiv = (rcc>>23) & 0xF;
360 usesysdiv = (rcc>>22) & 0x1;
361 bypass = (rcc>>11) & 0x1;
362 oscsrc = (rcc>>4) & 0x3;
363 /* xtal = (rcc>>6)&0xF; */
367 mainfreq = 6000000; /* Default xtal */
370 mainfreq = 22500000; /* Internal osc. 15 MHz +- 50% */
373 mainfreq = 5625000; /* Internal osc. / 4 */
376 LOG_WARNING("Invalid oscsrc (3) in rcc register");
380 default: /* NOTREACHED */
386 mainfreq = 200000000; /* PLL out frec */
389 stellaris_info->mck_freq = mainfreq/(1+sysdiv);
391 stellaris_info->mck_freq = mainfreq;
393 /* Forget old flash timing */
394 stellaris_set_flash_mode(bank, 0);
397 /* Setup the timimg registers */
398 void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
400 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
401 target_t *target = bank->target;
403 u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
404 LOG_DEBUG("usecrl = %i",usecrl);
405 target_write_u32(target, SCB_BASE|USECRL, usecrl);
408 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
412 /* Stellaris waits for cmdbit to clear */
413 while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
415 LOG_DEBUG("status: 0x%x", status);
419 /* Flash errors are reflected in the FLASH_CRIS register */
424 /* Send one command to the flash controller */
425 int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
428 target_t *target = bank->target;
430 fmc = FMC_WRKEY | cmd;
431 target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
432 LOG_DEBUG("Flash command: 0x%x", fmc);
434 if (stellaris_wait_status_busy(bank, cmd, 100))
436 return ERROR_FLASH_OPERATION_FAILED;
442 /* Read device id register, main clock frequency register and fill in driver info structure */
443 int stellaris_read_part_info(struct flash_bank_s *bank)
445 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
446 target_t *target = bank->target;
447 u32 did0, did1, ver, fam, status;
450 /* Read and parse chip identification register */
451 target_read_u32(target, SCB_BASE|DID0, &did0);
452 target_read_u32(target, SCB_BASE|DID1, &did1);
453 target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
454 target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
455 LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x", did0, did1, stellaris_info->dc0, stellaris_info->dc1);
458 if((ver != 0) && (ver != 1))
460 LOG_WARNING("Unknown did0 version, cannot identify target");
461 return ERROR_FLASH_OPERATION_FAILED;
466 LOG_WARNING("Cannot identify target as a Stellaris");
467 return ERROR_FLASH_OPERATION_FAILED;
471 fam = (did1 >> 24) & 0xF;
472 if(((ver != 0) && (ver != 1)) || (fam != 0))
474 LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
477 for (i = 0; StellarisParts[i].partno; i++)
479 if (StellarisParts[i].partno == ((did1 >> 16) & 0xFF))
483 stellaris_info->target_name = StellarisParts[i].partname;
485 stellaris_info->did0 = did0;
486 stellaris_info->did1 = did1;
488 stellaris_info->num_lockbits = 1 + (stellaris_info->dc0 & 0xFFFF);
489 stellaris_info->num_pages = 2 *(1+(stellaris_info->dc0 & 0xFFFF));
490 stellaris_info->pagesize = 1024;
491 bank->size = 1024 * stellaris_info->num_pages;
492 stellaris_info->pages_in_lockregion = 2;
493 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
495 /* provide this for the benefit of the higher flash driver layers */
496 bank->num_sectors = stellaris_info->num_pages;
497 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
498 for (i = 0; i < bank->num_sectors; i++)
500 bank->sectors[i].offset = i * stellaris_info->pagesize;
501 bank->sectors[i].size = stellaris_info->pagesize;
502 bank->sectors[i].is_erased = -1;
503 bank->sectors[i].is_protected = -1;
506 /* Read main and master clock freqency register */
507 stellaris_read_clock_info(bank);
509 status = stellaris_get_flash_status(bank);
514 /***************************************************************************
516 ***************************************************************************/
518 int stellaris_protect_check(struct flash_bank_s *bank)
522 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
524 if (bank->target->state != TARGET_HALTED)
526 LOG_ERROR("Target not halted");
527 return ERROR_TARGET_NOT_HALTED;
530 if (stellaris_info->did1 == 0)
532 stellaris_read_part_info(bank);
535 if (stellaris_info->did1 == 0)
537 LOG_WARNING("Cannot identify target as an AT91SAM");
538 return ERROR_FLASH_OPERATION_FAILED;
541 status = stellaris_get_flash_status(bank);
542 stellaris_info->lockbits = status >> 16;
547 int stellaris_erase(struct flash_bank_s *bank, int first, int last)
550 u32 flash_fmc, flash_cris;
551 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
552 target_t *target = bank->target;
554 if (bank->target->state != TARGET_HALTED)
556 LOG_ERROR("Target not halted");
557 return ERROR_TARGET_NOT_HALTED;
560 if (stellaris_info->did1 == 0)
562 stellaris_read_part_info(bank);
565 if (stellaris_info->did1 == 0)
567 LOG_WARNING("Cannot identify target as Stellaris");
568 return ERROR_FLASH_OPERATION_FAILED;
571 if ((first < 0) || (last < first) || (last >= stellaris_info->num_pages))
573 return ERROR_FLASH_SECTOR_INVALID;
576 if ((first == 0) && (last == (stellaris_info->num_pages-1)))
578 return stellaris_mass_erase(bank);
581 /* Configure the flash controller timing */
582 stellaris_read_clock_info(bank);
583 stellaris_set_flash_mode(bank,0);
585 /* Clear and disable flash programming interrupts */
586 target_write_u32(target, FLASH_CIM, 0);
587 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
589 for (banknr = first; banknr <= last; banknr++)
591 /* Address is first word in page */
592 target_write_u32(target, FLASH_FMA, banknr * stellaris_info->pagesize);
593 /* Write erase command */
594 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
595 /* Wait until erase complete */
598 target_read_u32(target, FLASH_FMC, &flash_fmc);
600 while(flash_fmc & FMC_ERASE);
602 /* Check acess violations */
603 target_read_u32(target, FLASH_CRIS, &flash_cris);
604 if(flash_cris & (AMASK))
606 LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
607 target_write_u32(target, FLASH_CRIS, 0);
608 return ERROR_FLASH_OPERATION_FAILED;
611 bank->sectors[banknr].is_erased = 1;
617 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
619 u32 fmppe, flash_fmc, flash_cris;
622 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
623 target_t *target = bank->target;
625 if (bank->target->state != TARGET_HALTED)
627 LOG_ERROR("Target not halted");
628 return ERROR_TARGET_NOT_HALTED;
631 if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits))
633 return ERROR_FLASH_SECTOR_INVALID;
636 if (stellaris_info->did1 == 0)
638 stellaris_read_part_info(bank);
641 if (stellaris_info->did1 == 0)
643 LOG_WARNING("Cannot identify target as an Stellaris MCU");
644 return ERROR_FLASH_OPERATION_FAILED;
647 /* Configure the flash controller timing */
648 stellaris_read_clock_info(bank);
649 stellaris_set_flash_mode(bank, 0);
651 fmppe = stellaris_info->lockbits;
652 for (lockregion = first; lockregion <= last; lockregion++)
655 fmppe &= ~(1<<lockregion);
657 fmppe |= (1<<lockregion);
660 /* Clear and disable flash programming interrupts */
661 target_write_u32(target, FLASH_CIM, 0);
662 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
664 LOG_DEBUG("fmppe 0x%x",fmppe);
665 target_write_u32(target, SCB_BASE|FMPPE, fmppe);
667 target_write_u32(target, FLASH_FMA, 1);
668 /* Write commit command */
669 /* TODO safety check, sice this cannot be undone */
670 LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
671 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
672 /* Wait until erase complete */
675 target_read_u32(target, FLASH_FMC, &flash_fmc);
677 while(flash_fmc & FMC_COMT);
679 /* Check acess violations */
680 target_read_u32(target, FLASH_CRIS, &flash_cris);
681 if(flash_cris & (AMASK))
683 LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
684 target_write_u32(target, FLASH_CRIS, 0);
685 return ERROR_FLASH_OPERATION_FAILED;
688 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
693 u8 stellaris_write_code[] =
698 r1 = destination address
699 r2 = bytecount (in) - endaddr (work)
702 r3 = pFLASH_CTRL_BASE
708 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
709 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
710 0x01,0x25, /* movs r5, 1 */
711 0x00,0x26, /* movs r6, #0 */
713 0x19,0x60, /* str r1, [r3, #0] */
714 0x87,0x59, /* ldr r7, [r0, r6] */
715 0x5F,0x60, /* str r7, [r3, #4] */
716 0x9C,0x60, /* str r4, [r3, #8] */
718 0x9F,0x68, /* ldr r7, [r3, #8] */
719 0x2F,0x42, /* tst r7, r5 */
720 0xFC,0xD1, /* bne waitloop */
721 0x04,0x31, /* adds r1, r1, #4 */
722 0x04,0x36, /* adds r6, r6, #4 */
723 0x96,0x42, /* cmp r6, r2 */
724 0xF4,0xD1, /* bne mainloop */
726 0xFE,0xE7, /* b exit */
727 /* pFLASH_CTRL_BASE: */
728 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
730 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
733 int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
735 target_t *target = bank->target;
736 u32 buffer_size = 8192;
737 working_area_t *source;
738 working_area_t *write_algorithm;
739 u32 address = bank->base + offset;
740 reg_param_t reg_params[3];
741 armv7m_algorithm_t armv7m_info;
742 int retval = ERROR_OK;
744 LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
745 bank, buffer, offset, wcount);
747 /* flash write code */
748 if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
750 LOG_WARNING("no working area available, can't do block memory writes");
751 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
754 target_write_buffer(target, write_algorithm->address, sizeof(stellaris_write_code), stellaris_write_code);
757 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
759 LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
760 target, buffer_size, source);
762 if (buffer_size <= 256)
764 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
766 target_free_working_area(target, write_algorithm);
768 LOG_WARNING("no large enough working area available, can't do block memory writes");
769 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
773 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
774 armv7m_info.core_mode = ARMV7M_MODE_ANY;
776 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
777 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
778 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
782 u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
784 target_write_buffer(target, source->address, thisrun_count * 4, buffer);
786 buf_set_u32(reg_params[0].value, 0, 32, source->address);
787 buf_set_u32(reg_params[1].value, 0, 32, address);
788 buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
789 LOG_INFO("Algorithm flash write %i words to 0x%x, %i remaining", thisrun_count, address, wcount);
790 LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining", thisrun_count, address, wcount);
791 if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
793 LOG_ERROR("error executing stellaris flash write algorithm");
794 retval = ERROR_FLASH_OPERATION_FAILED;
798 buffer += thisrun_count * 4;
799 address += thisrun_count * 4;
800 wcount -= thisrun_count;
803 target_free_working_area(target, write_algorithm);
804 target_free_working_area(target, source);
806 destroy_reg_param(®_params[0]);
807 destroy_reg_param(®_params[1]);
808 destroy_reg_param(®_params[2]);
813 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
815 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
816 target_t *target = bank->target;
817 u32 address = offset;
818 u32 flash_cris,flash_fmc;
821 if (bank->target->state != TARGET_HALTED)
823 LOG_ERROR("Target not halted");
824 return ERROR_TARGET_NOT_HALTED;
827 LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
828 bank, buffer, offset, count);
830 if (stellaris_info->did1 == 0)
832 stellaris_read_part_info(bank);
835 if (stellaris_info->did1 == 0)
837 LOG_WARNING("Cannot identify target as a Stellaris processor");
838 return ERROR_FLASH_OPERATION_FAILED;
841 if((offset & 3) || (count & 3))
843 LOG_WARNING("offset size must be word aligned");
844 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
847 if (offset + count > bank->size)
848 return ERROR_FLASH_DST_OUT_OF_BANK;
850 /* Configure the flash controller timing */
851 stellaris_read_clock_info(bank);
852 stellaris_set_flash_mode(bank, 0);
854 /* Clear and disable flash programming interrupts */
855 target_write_u32(target, FLASH_CIM, 0);
856 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
858 /* multiple words to be programmed? */
861 /* try using a block write */
862 if ((retval = stellaris_write_block(bank, buffer, offset, count/4)) != ERROR_OK)
864 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
866 /* if block write failed (no sufficient working area),
867 * we use normal (slow) single dword accesses */
868 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
870 else if (retval == ERROR_FLASH_OPERATION_FAILED)
872 /* if an error occured, we examine the reason, and quit */
873 target_read_u32(target, FLASH_CRIS, &flash_cris);
875 LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
876 return ERROR_FLASH_OPERATION_FAILED;
882 address += count * 4;
889 if (!(address & 0xff))
890 LOG_DEBUG("0x%x", address);
892 /* Program one word */
893 target_write_u32(target, FLASH_FMA, address);
894 target_write_buffer(target, FLASH_FMD, 4, buffer);
895 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
896 /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
897 /* Wait until write complete */
900 target_read_u32(target, FLASH_FMC, &flash_fmc);
902 while (flash_fmc & FMC_WRITE);
907 /* Check acess violations */
908 target_read_u32(target, FLASH_CRIS, &flash_cris);
909 if (flash_cris & (AMASK))
911 LOG_DEBUG("flash_cris 0x%x", flash_cris);
912 return ERROR_FLASH_OPERATION_FAILED;
917 int stellaris_probe(struct flash_bank_s *bank)
919 /* we can't probe on an stellaris
920 * if this is an stellaris, it has the configured flash
923 if (bank->target->state != TARGET_HALTED)
925 LOG_ERROR("Target not halted");
926 return ERROR_TARGET_NOT_HALTED;
929 /* stellaris_read_part_info() already takes care about error checking and reporting */
930 return stellaris_read_part_info(bank);
933 int stellaris_auto_probe(struct flash_bank_s *bank)
935 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
936 if (stellaris_info->did1)
938 return stellaris_probe(bank);
941 int stellaris_mass_erase(struct flash_bank_s *bank)
943 target_t *target = NULL;
944 stellaris_flash_bank_t *stellaris_info = NULL;
947 stellaris_info = bank->driver_priv;
948 target = bank->target;
950 if (target->state != TARGET_HALTED)
952 LOG_ERROR("Target not halted");
953 return ERROR_TARGET_NOT_HALTED;
956 if (stellaris_info->did1 == 0)
958 stellaris_read_part_info(bank);
961 if (stellaris_info->did1 == 0)
963 LOG_WARNING("Cannot identify target as Stellaris");
964 return ERROR_FLASH_OPERATION_FAILED;
967 /* Configure the flash controller timing */
968 stellaris_read_clock_info(bank);
969 stellaris_set_flash_mode(bank, 0);
971 /* Clear and disable flash programming interrupts */
972 target_write_u32(target, FLASH_CIM, 0);
973 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
975 target_write_u32(target, FLASH_FMA, 0);
976 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
977 /* Wait until erase complete */
980 target_read_u32(target, FLASH_FMC, &flash_fmc);
982 while (flash_fmc & FMC_MERASE);
984 /* if device has > 128k, then second erase cycle is needed
985 * this is only valid for older devices, but will not hurt */
986 if (stellaris_info->num_pages * stellaris_info->pagesize > 0x20000)
988 target_write_u32(target, FLASH_FMA, 0x20000);
989 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
990 /* Wait until erase complete */
993 target_read_u32(target, FLASH_FMC, &flash_fmc);
995 while (flash_fmc & FMC_MERASE);
1001 int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1008 command_print(cmd_ctx, "stellaris mass_erase <bank>");
1012 bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
1015 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
1019 if (stellaris_mass_erase(bank) == ERROR_OK)
1021 /* set all sectors as erased */
1022 for (i = 0; i < bank->num_sectors; i++)
1024 bank->sectors[i].is_erased = 1;
1027 command_print(cmd_ctx, "stellaris mass erase complete");
1031 command_print(cmd_ctx, "stellaris mass erase failed");