1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * STELLARIS is tested on LM3S811
23 ***************************************************************************/
28 #include "replacements.h"
30 #include "stellaris.h"
31 #include "cortex_m3.h"
36 #include "binarybuffer.h"
43 #define DID0_VER(did0) ((did0>>28)&0x07)
44 int stellaris_register_commands(struct command_context_s *cmd_ctx);
45 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
46 int stellaris_erase(struct flash_bank_s *bank, int first, int last);
47 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
48 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
49 int stellaris_auto_probe(struct flash_bank_s *bank);
50 int stellaris_probe(struct flash_bank_s *bank);
51 int stellaris_erase_check(struct flash_bank_s *bank);
52 int stellaris_protect_check(struct flash_bank_s *bank);
53 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
55 int stellaris_read_part_info(struct flash_bank_s *bank);
56 u32 stellaris_get_flash_status(flash_bank_t *bank);
57 void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
58 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
60 int stellaris_read_part_info(struct flash_bank_s *bank);
62 flash_driver_t stellaris_flash =
65 .register_commands = stellaris_register_commands,
66 .flash_bank_command = stellaris_flash_bank_command,
67 .erase = stellaris_erase,
68 .protect = stellaris_protect,
69 .write = stellaris_write,
70 .probe = stellaris_probe,
71 .auto_probe = stellaris_auto_probe,
72 .erase_check = stellaris_erase_check,
73 .protect_check = stellaris_protect_check,
74 .info = stellaris_info
114 /*{0x33,"LM3S2616"},*/
233 char * StellarisClassname[5] =
242 /***************************************************************************
243 * openocd command interface *
244 ***************************************************************************/
246 /* flash_bank stellaris <base> <size> 0 0 <target#>
248 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
250 stellaris_flash_bank_t *stellaris_info;
254 LOG_WARNING("incomplete flash_bank stellaris configuration");
255 return ERROR_FLASH_BANK_INVALID;
258 stellaris_info = calloc(sizeof(stellaris_flash_bank_t),1);
260 bank->driver_priv = stellaris_info;
262 stellaris_info->target_name = "Unknown target";
264 /* part wasn't probed for info yet */
265 stellaris_info->did1 = 0;
267 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
271 int stellaris_register_commands(struct command_context_s *cmd_ctx)
274 command_t *stellaris_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, NULL);
275 register_command(cmd_ctx, stellaris_cmd, "gpnvm", stellaris_handle_gpnvm_command, COMMAND_EXEC,
276 "stellaris gpnvm <num> <bit> set|clear, set or clear stellaris gpnvm bit");
281 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
283 int printed, device_class;
284 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
286 stellaris_read_part_info(bank);
288 if (stellaris_info->did1 == 0)
290 printed = snprintf(buf, buf_size, "Cannot identify target as a Stellaris\n");
293 return ERROR_FLASH_OPERATION_FAILED;
296 if (DID0_VER(stellaris_info->did0)>0)
298 device_class = (stellaris_info->did0>>16)&0xFF;
304 printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
305 device_class, StellarisClassname[device_class], stellaris_info->target_name,
306 'A' + ((stellaris_info->did0>>8)&0xFF), (stellaris_info->did0)&0xFF);
310 printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
311 stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16)&0xFFFF))/4, (1+(stellaris_info->dc0&0xFFFF))*2);
315 printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info->mck_freq / 1000, stellaris_info->rcc);
319 if (stellaris_info->num_lockbits>0) {
320 printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info->pagesize, stellaris_info->num_lockbits, stellaris_info->lockbits,stellaris_info->num_pages/stellaris_info->num_lockbits);
327 /***************************************************************************
328 * chip identification and status *
329 ***************************************************************************/
331 u32 stellaris_get_flash_status(flash_bank_t *bank)
333 target_t *target = bank->target;
336 target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
341 /** Read clock configuration and set stellaris_info->usec_clocks*/
343 void stellaris_read_clock_info(flash_bank_t *bank)
345 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
346 target_t *target = bank->target;
347 u32 rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
348 unsigned long mainfreq;
350 target_read_u32(target, SCB_BASE|RCC, &rcc);
351 LOG_DEBUG("Stellaris RCC %x",rcc);
352 target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
353 LOG_DEBUG("Stellaris PLLCFG %x",pllcfg);
354 stellaris_info->rcc = rcc;
356 sysdiv = (rcc>>23)&0xF;
357 usesysdiv = (rcc>>22)&0x1;
358 bypass = (rcc>>11)&0x1;
359 oscsrc = (rcc>>4)&0x3;
360 /* xtal = (rcc>>6)&0xF; */
364 mainfreq = 6000000; /* Default xtal */
367 mainfreq = 22500000; /* Internal osc. 15 MHz +- 50% */
370 mainfreq = 5625000; /* Internal osc. / 4 */
373 LOG_WARNING("Invalid oscsrc (3) in rcc register");
377 default: /* NOTREACHED */
383 mainfreq = 200000000; /* PLL out frec */
386 stellaris_info->mck_freq = mainfreq/(1+sysdiv);
388 stellaris_info->mck_freq = mainfreq;
390 /* Forget old flash timing */
391 stellaris_set_flash_mode(bank,0);
394 /* Setup the timimg registers */
395 void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
397 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
398 target_t *target = bank->target;
400 u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
401 LOG_DEBUG("usecrl = %i",usecrl);
402 target_write_u32(target, SCB_BASE|USECRL , usecrl);
406 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
410 /* Stellaris waits for cmdbit to clear */
411 while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
413 LOG_DEBUG("status: 0x%x", status);
417 /* Flash errors are reflected in the FLASH_CRIS register */
422 /* Send one command to the flash controller */
423 int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
426 target_t *target = bank->target;
428 fmc = FMC_WRKEY | cmd;
429 target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
430 LOG_DEBUG("Flash command: 0x%x", fmc);
432 if (stellaris_wait_status_busy(bank, cmd, 100))
434 return ERROR_FLASH_OPERATION_FAILED;
440 /* Read device id register, main clock frequency register and fill in driver info structure */
441 int stellaris_read_part_info(struct flash_bank_s *bank)
443 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
444 target_t *target = bank->target;
445 u32 did0,did1, ver, fam, status;
448 /* Read and parse chip identification register */
449 target_read_u32(target, SCB_BASE|DID0, &did0);
450 target_read_u32(target, SCB_BASE|DID1, &did1);
451 target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
452 target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
453 LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1);
456 if((ver != 0) && (ver != 1))
458 LOG_WARNING("Unknown did0 version, cannot identify target");
459 return ERROR_FLASH_OPERATION_FAILED;
464 LOG_WARNING("Cannot identify target as a Stellaris");
465 return ERROR_FLASH_OPERATION_FAILED;
469 fam = (did1 >> 24) & 0xF;
470 if(((ver != 0) && (ver != 1)) || (fam != 0))
472 LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
475 for (i=0;StellarisParts[i].partno;i++)
477 if (StellarisParts[i].partno==((did1>>16)&0xFF))
481 stellaris_info->target_name = StellarisParts[i].partname;
483 stellaris_info->did0 = did0;
484 stellaris_info->did1 = did1;
486 stellaris_info->num_lockbits = 1+(stellaris_info->dc0&0xFFFF);
487 stellaris_info->num_pages = 2*(1+(stellaris_info->dc0&0xFFFF));
488 stellaris_info->pagesize = 1024;
489 bank->size = 1024*stellaris_info->num_pages;
490 stellaris_info->pages_in_lockregion = 2;
491 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
493 /* provide this for the benefit of the higher flash driver layers */
494 bank->num_sectors = stellaris_info->num_pages;
495 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
496 for (i = 0; i < bank->num_sectors; i++)
498 bank->sectors[i].offset = i*stellaris_info->pagesize;
499 bank->sectors[i].size = stellaris_info->pagesize;
500 bank->sectors[i].is_erased = -1;
501 bank->sectors[i].is_protected = -1;
504 /* Read main and master clock freqency register */
505 stellaris_read_clock_info(bank);
507 status = stellaris_get_flash_status(bank);
512 /***************************************************************************
514 ***************************************************************************/
516 int stellaris_erase_check(struct flash_bank_s *bank)
520 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
521 target_t *target = bank->target;
529 int stellaris_protect_check(struct flash_bank_s *bank)
533 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
535 if (bank->target->state != TARGET_HALTED)
537 return ERROR_TARGET_NOT_HALTED;
540 if (stellaris_info->did1 == 0)
542 stellaris_read_part_info(bank);
545 if (stellaris_info->did1 == 0)
547 LOG_WARNING("Cannot identify target as an AT91SAM");
548 return ERROR_FLASH_OPERATION_FAILED;
551 status = stellaris_get_flash_status(bank);
552 stellaris_info->lockbits = status >> 16;
557 int stellaris_erase(struct flash_bank_s *bank, int first, int last)
560 u32 flash_fmc, flash_cris;
561 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
562 target_t *target = bank->target;
564 if (bank->target->state != TARGET_HALTED)
566 return ERROR_TARGET_NOT_HALTED;
569 if (stellaris_info->did1 == 0)
571 stellaris_read_part_info(bank);
574 if (stellaris_info->did1 == 0)
576 LOG_WARNING("Cannot identify target as Stellaris");
577 return ERROR_FLASH_OPERATION_FAILED;
580 if ((first < 0) || (last < first) || (last >= stellaris_info->num_pages))
582 return ERROR_FLASH_SECTOR_INVALID;
585 /* Configure the flash controller timing */
586 stellaris_read_clock_info(bank);
587 stellaris_set_flash_mode(bank,0);
589 /* Clear and disable flash programming interrupts */
590 target_write_u32(target, FLASH_CIM, 0);
591 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
593 if ((first == 0) && (last == (stellaris_info->num_pages-1)))
595 target_write_u32(target, FLASH_FMA, 0);
596 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
597 /* Wait until erase complete */
600 target_read_u32(target, FLASH_FMC, &flash_fmc);
602 while(flash_fmc & FMC_MERASE);
604 /* if device has > 128k, then second erase cycle is needed */
605 if(stellaris_info->num_pages * stellaris_info->pagesize > 0x20000)
607 target_write_u32(target, FLASH_FMA, 0x20000);
608 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
609 /* Wait until erase complete */
612 target_read_u32(target, FLASH_FMC, &flash_fmc);
614 while(flash_fmc & FMC_MERASE);
620 for (banknr=first;banknr<=last;banknr++)
622 /* Address is first word in page */
623 target_write_u32(target, FLASH_FMA, banknr*stellaris_info->pagesize);
624 /* Write erase command */
625 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
626 /* Wait until erase complete */
629 target_read_u32(target, FLASH_FMC, &flash_fmc);
631 while(flash_fmc & FMC_ERASE);
633 /* Check acess violations */
634 target_read_u32(target, FLASH_CRIS, &flash_cris);
635 if(flash_cris & (AMASK))
637 LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
638 target_write_u32(target, FLASH_CRIS, 0);
639 return ERROR_FLASH_OPERATION_FAILED;
642 bank->sectors[banknr].is_erased = 1;
648 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
650 u32 fmppe, flash_fmc, flash_cris;
653 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
654 target_t *target = bank->target;
656 if (bank->target->state != TARGET_HALTED)
658 return ERROR_TARGET_NOT_HALTED;
661 if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits))
663 return ERROR_FLASH_SECTOR_INVALID;
666 if (stellaris_info->did1 == 0)
668 stellaris_read_part_info(bank);
671 if (stellaris_info->did1 == 0)
673 LOG_WARNING("Cannot identify target as an Stellaris MCU");
674 return ERROR_FLASH_OPERATION_FAILED;
677 /* Configure the flash controller timing */
678 stellaris_read_clock_info(bank);
679 stellaris_set_flash_mode(bank,0);
681 fmppe = stellaris_info->lockbits;
682 for (lockregion=first;lockregion<=last;lockregion++)
685 fmppe &= ~(1<<lockregion);
687 fmppe |= (1<<lockregion);
690 /* Clear and disable flash programming interrupts */
691 target_write_u32(target, FLASH_CIM, 0);
692 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
694 LOG_DEBUG("fmppe 0x%x",fmppe);
695 target_write_u32(target, SCB_BASE|FMPPE, fmppe);
697 target_write_u32(target, FLASH_FMA, 1);
698 /* Write commit command */
699 /* TODO safety check, sice this cannot be undone */
700 LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
701 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
702 /* Wait until erase complete */
705 target_read_u32(target, FLASH_FMC, &flash_fmc);
707 while(flash_fmc & FMC_COMT);
709 /* Check acess violations */
710 target_read_u32(target, FLASH_CRIS, &flash_cris);
711 if(flash_cris & (AMASK))
713 LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
714 target_write_u32(target, FLASH_CRIS, 0);
715 return ERROR_FLASH_OPERATION_FAILED;
718 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
723 u8 stellaris_write_code[] =
728 r1 = destination address
729 r2 = bytecount (in) - endaddr (work)
732 r3 = pFLASH_CTRL_BASE
738 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
739 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
740 0x01,0x25, /* movs r5, 1 */
741 0x00,0x26, /* movs r6, #0 */
743 0x19,0x60, /* str r1, [r3, #0] */
744 0x87,0x59, /* ldr r7, [r0, r6] */
745 0x5F,0x60, /* str r7, [r3, #4] */
746 0x9C,0x60, /* str r4, [r3, #8] */
748 0x9F,0x68, /* ldr r7, [r3, #8] */
749 0x2F,0x42, /* tst r7, r5 */
750 0xFC,0xD1, /* bne waitloop */
751 0x04,0x31, /* adds r1, r1, #4 */
752 0x04,0x36, /* adds r6, r6, #4 */
753 0x96,0x42, /* cmp r6, r2 */
754 0xF4,0xD1, /* bne mainloop */
756 0xFE,0xE7, /* b exit */
757 /* pFLASH_CTRL_BASE: */
758 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
760 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
763 int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
765 target_t *target = bank->target;
766 u32 buffer_size = 8192;
767 working_area_t *source;
768 working_area_t *write_algorithm;
769 u32 address = bank->base + offset;
770 reg_param_t reg_params[8];
771 armv7m_algorithm_t armv7m_info;
774 LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
775 bank, buffer, offset, wcount);
777 /* flash write code */
778 if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
780 LOG_WARNING("no working area available, can't do block memory writes");
781 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
784 target_write_buffer(target, write_algorithm->address, sizeof(stellaris_write_code), stellaris_write_code);
787 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
789 LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
790 target, buffer_size, source);
792 if (buffer_size <= 256)
794 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
796 target_free_working_area(target, write_algorithm);
798 LOG_WARNING("no large enough working area available, can't do block memory writes");
799 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
803 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
804 armv7m_info.core_mode = ARMV7M_MODE_ANY;
806 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
807 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
808 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
809 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
810 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
811 init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
812 init_reg_param(®_params[6], "r6", 32, PARAM_OUT);
813 init_reg_param(®_params[7], "r7", 32, PARAM_OUT);
817 u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
819 target_write_buffer(target, source->address, thisrun_count * 4, buffer);
821 buf_set_u32(reg_params[0].value, 0, 32, source->address);
822 buf_set_u32(reg_params[1].value, 0, 32, address);
823 buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
824 LOG_WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
825 LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
826 if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
828 LOG_ERROR("error executing stellaris flash write algorithm");
829 target_free_working_area(target, source);
830 destroy_reg_param(®_params[0]);
831 destroy_reg_param(®_params[1]);
832 destroy_reg_param(®_params[2]);
833 return ERROR_FLASH_OPERATION_FAILED;
836 buffer += thisrun_count * 4;
837 address += thisrun_count * 4;
838 wcount -= thisrun_count;
842 target_free_working_area(target, write_algorithm);
843 target_free_working_area(target, source);
845 destroy_reg_param(®_params[0]);
846 destroy_reg_param(®_params[1]);
847 destroy_reg_param(®_params[2]);
848 destroy_reg_param(®_params[3]);
849 destroy_reg_param(®_params[4]);
850 destroy_reg_param(®_params[5]);
851 destroy_reg_param(®_params[6]);
852 destroy_reg_param(®_params[7]);
857 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
859 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
860 target_t *target = bank->target;
861 u32 address = offset;
862 u32 flash_cris,flash_fmc;
865 if (bank->target->state != TARGET_HALTED)
867 return ERROR_TARGET_NOT_HALTED;
870 LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
871 bank, buffer, offset, count);
873 if (stellaris_info->did1 == 0)
875 stellaris_read_part_info(bank);
878 if (stellaris_info->did1 == 0)
880 LOG_WARNING("Cannot identify target as a Stellaris processor");
881 return ERROR_FLASH_OPERATION_FAILED;
884 if((offset & 3) || (count & 3))
886 LOG_WARNING("offset size must be word aligned");
887 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
890 if (offset + count > bank->size)
891 return ERROR_FLASH_DST_OUT_OF_BANK;
893 /* Configure the flash controller timing */
894 stellaris_read_clock_info(bank);
895 stellaris_set_flash_mode(bank,0);
898 /* Clear and disable flash programming interrupts */
899 target_write_u32(target, FLASH_CIM, 0);
900 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
902 /* multiple words to be programmed? */
905 /* try using a block write */
906 if ((retval = stellaris_write_block(bank, buffer, offset, count/4)) != ERROR_OK)
908 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
910 /* if block write failed (no sufficient working area),
911 * we use normal (slow) single dword accesses */
912 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
914 else if (retval == ERROR_FLASH_OPERATION_FAILED)
916 /* if an error occured, we examine the reason, and quit */
917 target_read_u32(target, FLASH_CRIS, &flash_cris);
919 LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
920 return ERROR_FLASH_OPERATION_FAILED;
926 address += count * 4;
933 if (!(address&0xff)) LOG_DEBUG("0x%x",address);
934 /* Program one word */
935 target_write_u32(target, FLASH_FMA, address);
936 target_write_buffer(target, FLASH_FMD, 4, buffer);
937 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
938 /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
939 /* Wait until write complete */
942 target_read_u32(target, FLASH_FMC, &flash_fmc);
944 while(flash_fmc & FMC_WRITE);
949 /* Check acess violations */
950 target_read_u32(target, FLASH_CRIS, &flash_cris);
951 if(flash_cris & (AMASK))
953 LOG_DEBUG("flash_cris 0x%x", flash_cris);
954 return ERROR_FLASH_OPERATION_FAILED;
959 int stellaris_probe(struct flash_bank_s *bank)
961 /* we can't probe on an stellaris
962 * if this is an stellaris, it has the configured flash
965 if (bank->target->state != TARGET_HALTED)
967 return ERROR_TARGET_NOT_HALTED;
970 /* stellaris_read_part_info() already takes care about error checking and reporting */
971 return stellaris_read_part_info(bank);
974 int stellaris_auto_probe(struct flash_bank_s *bank)
976 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
977 if (stellaris_info->did1)
979 return stellaris_probe(bank);