1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * STELLARIS is tested on LM3S811
23 ***************************************************************************/
28 #include "replacements.h"
30 #include "stellaris.h"
31 #include "cortex_m3.h"
36 #include "binarybuffer.h"
43 #define DID0_VER(did0) ((did0>>28)&0x07)
44 int stellaris_register_commands(struct command_context_s *cmd_ctx);
45 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
46 int stellaris_erase(struct flash_bank_s *bank, int first, int last);
47 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
48 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
49 int stellaris_auto_probe(struct flash_bank_s *bank);
50 int stellaris_probe(struct flash_bank_s *bank);
51 int stellaris_erase_check(struct flash_bank_s *bank);
52 int stellaris_protect_check(struct flash_bank_s *bank);
53 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
55 int stellaris_read_part_info(struct flash_bank_s *bank);
56 u32 stellaris_get_flash_status(flash_bank_t *bank);
57 void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
58 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
60 int stellaris_read_part_info(struct flash_bank_s *bank);
62 flash_driver_t stellaris_flash =
65 .register_commands = stellaris_register_commands,
66 .flash_bank_command = stellaris_flash_bank_command,
67 .erase = stellaris_erase,
68 .protect = stellaris_protect,
69 .write = stellaris_write,
70 .probe = stellaris_probe,
71 .auto_probe = stellaris_auto_probe,
72 .erase_check = stellaris_erase_check,
73 .protect_check = stellaris_protect_check,
74 .info = stellaris_info
203 char * StellarisClassname[2] =
209 /***************************************************************************
210 * openocd command interface *
211 ***************************************************************************/
213 /* flash_bank stellaris <base> <size> 0 0 <target#>
215 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
217 stellaris_flash_bank_t *stellaris_info;
221 LOG_WARNING("incomplete flash_bank stellaris configuration");
222 return ERROR_FLASH_BANK_INVALID;
225 stellaris_info = calloc(sizeof(stellaris_flash_bank_t),1);
227 bank->driver_priv = stellaris_info;
229 stellaris_info->target_name = "Unknown target";
231 /* part wasn't probed for info yet */
232 stellaris_info->did1 = 0;
234 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
238 int stellaris_register_commands(struct command_context_s *cmd_ctx)
241 command_t *stellaris_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, NULL);
242 register_command(cmd_ctx, stellaris_cmd, "gpnvm", stellaris_handle_gpnvm_command, COMMAND_EXEC,
243 "stellaris gpnvm <num> <bit> set|clear, set or clear stellaris gpnvm bit");
248 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
250 int printed, device_class;
251 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
253 stellaris_read_part_info(bank);
255 if (stellaris_info->did1 == 0)
257 printed = snprintf(buf, buf_size, "Cannot identify target as a Stellaris\n");
260 return ERROR_FLASH_OPERATION_FAILED;
263 if (DID0_VER(stellaris_info->did0)>0)
265 device_class = (stellaris_info->did0>>16)&0xFF;
271 printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
272 device_class, StellarisClassname[device_class], stellaris_info->target_name,
273 'A' + ((stellaris_info->did0>>8)&0xFF), (stellaris_info->did0)&0xFF);
277 printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
278 stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16)&0xFFFF))/4, (1+(stellaris_info->dc0&0xFFFF))*2);
282 printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info->mck_freq / 1000, stellaris_info->rcc);
286 if (stellaris_info->num_lockbits>0) {
287 printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info->pagesize, stellaris_info->num_lockbits, stellaris_info->lockbits,stellaris_info->num_pages/stellaris_info->num_lockbits);
294 /***************************************************************************
295 * chip identification and status *
296 ***************************************************************************/
298 u32 stellaris_get_flash_status(flash_bank_t *bank)
300 target_t *target = bank->target;
303 target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
308 /** Read clock configuration and set stellaris_info->usec_clocks*/
310 void stellaris_read_clock_info(flash_bank_t *bank)
312 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
313 target_t *target = bank->target;
314 u32 rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
315 unsigned long mainfreq;
317 target_read_u32(target, SCB_BASE|RCC, &rcc);
318 LOG_DEBUG("Stellaris RCC %x",rcc);
319 target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
320 LOG_DEBUG("Stellaris PLLCFG %x",pllcfg);
321 stellaris_info->rcc = rcc;
323 sysdiv = (rcc>>23)&0xF;
324 usesysdiv = (rcc>>22)&0x1;
325 bypass = (rcc>>11)&0x1;
326 oscsrc = (rcc>>4)&0x3;
327 /* xtal = (rcc>>6)&0xF; */
331 mainfreq = 6000000; /* Default xtal */
334 mainfreq = 22500000; /* Internal osc. 15 MHz +- 50% */
337 mainfreq = 5625000; /* Internal osc. / 4 */
340 LOG_WARNING("Invalid oscsrc (3) in rcc register");
344 default: /* NOTREACHED */
350 mainfreq = 200000000; /* PLL out frec */
353 stellaris_info->mck_freq = mainfreq/(1+sysdiv);
355 stellaris_info->mck_freq = mainfreq;
357 /* Forget old flash timing */
358 stellaris_set_flash_mode(bank,0);
361 /* Setup the timimg registers */
362 void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
364 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
365 target_t *target = bank->target;
367 u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
368 LOG_DEBUG("usecrl = %i",usecrl);
369 target_write_u32(target, SCB_BASE|USECRL , usecrl);
373 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
377 /* Stellaris waits for cmdbit to clear */
378 while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
380 LOG_DEBUG("status: 0x%x", status);
384 /* Flash errors are reflected in the FLASH_CRIS register */
389 /* Send one command to the flash controller */
390 int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
393 target_t *target = bank->target;
395 fmc = FMC_WRKEY | cmd;
396 target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
397 LOG_DEBUG("Flash command: 0x%x", fmc);
399 if (stellaris_wait_status_busy(bank, cmd, 100))
401 return ERROR_FLASH_OPERATION_FAILED;
407 /* Read device id register, main clock frequency register and fill in driver info structure */
408 int stellaris_read_part_info(struct flash_bank_s *bank)
410 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
411 target_t *target = bank->target;
412 u32 did0,did1, ver, fam, status;
415 /* Read and parse chip identification register */
416 target_read_u32(target, SCB_BASE|DID0, &did0);
417 target_read_u32(target, SCB_BASE|DID1, &did1);
418 target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
419 target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
420 LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1);
423 if((ver != 0) && (ver != 1))
425 LOG_WARNING("Unknown did0 version, cannot identify target");
426 return ERROR_FLASH_OPERATION_FAILED;
431 LOG_WARNING("Cannot identify target as a Stellaris");
432 return ERROR_FLASH_OPERATION_FAILED;
436 fam = (did1 >> 24) & 0xF;
437 if(((ver != 0) && (ver != 1)) || (fam != 0))
439 LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
442 for (i=0;StellarisParts[i].partno;i++)
444 if (StellarisParts[i].partno==((did1>>16)&0xFF))
448 stellaris_info->target_name = StellarisParts[i].partname;
450 stellaris_info->did0 = did0;
451 stellaris_info->did1 = did1;
453 stellaris_info->num_lockbits = 1+(stellaris_info->dc0&0xFFFF);
454 stellaris_info->num_pages = 2*(1+(stellaris_info->dc0&0xFFFF));
455 stellaris_info->pagesize = 1024;
456 bank->size = 1024*stellaris_info->num_pages;
457 stellaris_info->pages_in_lockregion = 2;
458 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
460 /* provide this for the benefit of the higher flash driver layers */
461 bank->num_sectors = stellaris_info->num_pages;
462 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
463 for (i = 0; i < bank->num_sectors; i++)
465 bank->sectors[i].offset = i*stellaris_info->pagesize;
466 bank->sectors[i].size = stellaris_info->pagesize;
467 bank->sectors[i].is_erased = -1;
468 bank->sectors[i].is_protected = -1;
471 /* Read main and master clock freqency register */
472 stellaris_read_clock_info(bank);
474 status = stellaris_get_flash_status(bank);
479 /***************************************************************************
481 ***************************************************************************/
483 int stellaris_erase_check(struct flash_bank_s *bank)
487 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
488 target_t *target = bank->target;
496 int stellaris_protect_check(struct flash_bank_s *bank)
500 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
502 if (bank->target->state != TARGET_HALTED)
504 return ERROR_TARGET_NOT_HALTED;
507 if (stellaris_info->did1 == 0)
509 stellaris_read_part_info(bank);
512 if (stellaris_info->did1 == 0)
514 LOG_WARNING("Cannot identify target as an AT91SAM");
515 return ERROR_FLASH_OPERATION_FAILED;
518 status = stellaris_get_flash_status(bank);
519 stellaris_info->lockbits = status >> 16;
524 int stellaris_erase(struct flash_bank_s *bank, int first, int last)
527 u32 flash_fmc, flash_cris;
528 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
529 target_t *target = bank->target;
531 if (bank->target->state != TARGET_HALTED)
533 return ERROR_TARGET_NOT_HALTED;
536 if (stellaris_info->did1 == 0)
538 stellaris_read_part_info(bank);
541 if (stellaris_info->did1 == 0)
543 LOG_WARNING("Cannot identify target as Stellaris");
544 return ERROR_FLASH_OPERATION_FAILED;
547 if ((first < 0) || (last < first) || (last >= stellaris_info->num_pages))
549 return ERROR_FLASH_SECTOR_INVALID;
552 /* Configure the flash controller timing */
553 stellaris_read_clock_info(bank);
554 stellaris_set_flash_mode(bank,0);
556 /* Clear and disable flash programming interrupts */
557 target_write_u32(target, FLASH_CIM, 0);
558 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
560 if ((first == 0) && (last == (stellaris_info->num_pages-1)))
562 target_write_u32(target, FLASH_FMA, 0);
563 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
564 /* Wait until erase complete */
567 target_read_u32(target, FLASH_FMC, &flash_fmc);
569 while(flash_fmc & FMC_MERASE);
571 /* if device has > 128k, then second erase cycle is needed */
572 if(stellaris_info->num_pages * stellaris_info->pagesize > 0x20000)
574 target_write_u32(target, FLASH_FMA, 0x20000);
575 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
576 /* Wait until erase complete */
579 target_read_u32(target, FLASH_FMC, &flash_fmc);
581 while(flash_fmc & FMC_MERASE);
587 for (banknr=first;banknr<=last;banknr++)
589 /* Address is first word in page */
590 target_write_u32(target, FLASH_FMA, banknr*stellaris_info->pagesize);
591 /* Write erase command */
592 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
593 /* Wait until erase complete */
596 target_read_u32(target, FLASH_FMC, &flash_fmc);
598 while(flash_fmc & FMC_ERASE);
600 /* Check acess violations */
601 target_read_u32(target, FLASH_CRIS, &flash_cris);
602 if(flash_cris & (AMASK))
604 LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
605 target_write_u32(target, FLASH_CRIS, 0);
606 return ERROR_FLASH_OPERATION_FAILED;
609 bank->sectors[banknr].is_erased = 1;
615 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
617 u32 fmppe, flash_fmc, flash_cris;
620 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
621 target_t *target = bank->target;
623 if (bank->target->state != TARGET_HALTED)
625 return ERROR_TARGET_NOT_HALTED;
628 if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits))
630 return ERROR_FLASH_SECTOR_INVALID;
633 if (stellaris_info->did1 == 0)
635 stellaris_read_part_info(bank);
638 if (stellaris_info->did1 == 0)
640 LOG_WARNING("Cannot identify target as an Stellaris MCU");
641 return ERROR_FLASH_OPERATION_FAILED;
644 /* Configure the flash controller timing */
645 stellaris_read_clock_info(bank);
646 stellaris_set_flash_mode(bank,0);
648 fmppe = stellaris_info->lockbits;
649 for (lockregion=first;lockregion<=last;lockregion++)
652 fmppe &= ~(1<<lockregion);
654 fmppe |= (1<<lockregion);
657 /* Clear and disable flash programming interrupts */
658 target_write_u32(target, FLASH_CIM, 0);
659 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
661 LOG_DEBUG("fmppe 0x%x",fmppe);
662 target_write_u32(target, SCB_BASE|FMPPE, fmppe);
664 target_write_u32(target, FLASH_FMA, 1);
665 /* Write commit command */
666 /* TODO safety check, sice this cannot be undone */
667 LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
668 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
669 /* Wait until erase complete */
672 target_read_u32(target, FLASH_FMC, &flash_fmc);
674 while(flash_fmc & FMC_COMT);
676 /* Check acess violations */
677 target_read_u32(target, FLASH_CRIS, &flash_cris);
678 if(flash_cris & (AMASK))
680 LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
681 target_write_u32(target, FLASH_CRIS, 0);
682 return ERROR_FLASH_OPERATION_FAILED;
685 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
690 u8 stellaris_write_code[] =
695 r1 = destination address
696 r2 = bytecount (in) - endaddr (work)
699 r3 = pFLASH_CTRL_BASE
705 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
706 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
707 0x01,0x25, /* movs r5, 1 */
708 0x00,0x26, /* movs r6, #0 */
710 0x19,0x60, /* str r1, [r3, #0] */
711 0x87,0x59, /* ldr r7, [r0, r6] */
712 0x5F,0x60, /* str r7, [r3, #4] */
713 0x9C,0x60, /* str r4, [r3, #8] */
715 0x9F,0x68, /* ldr r7, [r3, #8] */
716 0x2F,0x42, /* tst r7, r5 */
717 0xFC,0xD1, /* bne waitloop */
718 0x04,0x31, /* adds r1, r1, #4 */
719 0x04,0x36, /* adds r6, r6, #4 */
720 0x96,0x42, /* cmp r6, r2 */
721 0xF4,0xD1, /* bne mainloop */
723 0xFE,0xE7, /* b exit */
724 /* pFLASH_CTRL_BASE: */
725 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
727 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
730 int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
732 target_t *target = bank->target;
733 u32 buffer_size = 8192;
734 working_area_t *source;
735 working_area_t *write_algorithm;
736 u32 address = bank->base + offset;
737 reg_param_t reg_params[8];
738 armv7m_algorithm_t armv7m_info;
741 LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
742 bank, buffer, offset, wcount);
744 /* flash write code */
745 if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
747 LOG_WARNING("no working area available, can't do block memory writes");
748 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
751 target_write_buffer(target, write_algorithm->address, sizeof(stellaris_write_code), stellaris_write_code);
754 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
756 LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
757 target, buffer_size, source);
759 if (buffer_size <= 256)
761 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
763 target_free_working_area(target, write_algorithm);
765 LOG_WARNING("no large enough working area available, can't do block memory writes");
766 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
770 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
771 armv7m_info.core_mode = ARMV7M_MODE_ANY;
773 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
774 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
775 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
776 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
777 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
778 init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
779 init_reg_param(®_params[6], "r6", 32, PARAM_OUT);
780 init_reg_param(®_params[7], "r7", 32, PARAM_OUT);
784 u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
786 target_write_buffer(target, source->address, thisrun_count * 4, buffer);
788 buf_set_u32(reg_params[0].value, 0, 32, source->address);
789 buf_set_u32(reg_params[1].value, 0, 32, address);
790 buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
791 LOG_WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
792 LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
793 if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
795 LOG_ERROR("error executing stellaris flash write algorithm");
796 target_free_working_area(target, source);
797 destroy_reg_param(®_params[0]);
798 destroy_reg_param(®_params[1]);
799 destroy_reg_param(®_params[2]);
800 return ERROR_FLASH_OPERATION_FAILED;
803 buffer += thisrun_count * 4;
804 address += thisrun_count * 4;
805 wcount -= thisrun_count;
809 target_free_working_area(target, write_algorithm);
810 target_free_working_area(target, source);
812 destroy_reg_param(®_params[0]);
813 destroy_reg_param(®_params[1]);
814 destroy_reg_param(®_params[2]);
815 destroy_reg_param(®_params[3]);
816 destroy_reg_param(®_params[4]);
817 destroy_reg_param(®_params[5]);
818 destroy_reg_param(®_params[6]);
819 destroy_reg_param(®_params[7]);
824 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
826 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
827 target_t *target = bank->target;
828 u32 address = offset;
829 u32 flash_cris,flash_fmc;
832 if (bank->target->state != TARGET_HALTED)
834 return ERROR_TARGET_NOT_HALTED;
837 LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
838 bank, buffer, offset, count);
840 if (stellaris_info->did1 == 0)
842 stellaris_read_part_info(bank);
845 if (stellaris_info->did1 == 0)
847 LOG_WARNING("Cannot identify target as a Stellaris processor");
848 return ERROR_FLASH_OPERATION_FAILED;
851 if((offset & 3) || (count & 3))
853 LOG_WARNING("offset size must be word aligned");
854 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
857 if (offset + count > bank->size)
858 return ERROR_FLASH_DST_OUT_OF_BANK;
860 /* Configure the flash controller timing */
861 stellaris_read_clock_info(bank);
862 stellaris_set_flash_mode(bank,0);
865 /* Clear and disable flash programming interrupts */
866 target_write_u32(target, FLASH_CIM, 0);
867 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
869 /* multiple words to be programmed? */
872 /* try using a block write */
873 if ((retval = stellaris_write_block(bank, buffer, offset, count/4)) != ERROR_OK)
875 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
877 /* if block write failed (no sufficient working area),
878 * we use normal (slow) single dword accesses */
879 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
881 else if (retval == ERROR_FLASH_OPERATION_FAILED)
883 /* if an error occured, we examine the reason, and quit */
884 target_read_u32(target, FLASH_CRIS, &flash_cris);
886 LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
887 return ERROR_FLASH_OPERATION_FAILED;
893 address += count * 4;
900 if (!(address&0xff)) LOG_DEBUG("0x%x",address);
901 /* Program one word */
902 target_write_u32(target, FLASH_FMA, address);
903 target_write_buffer(target, FLASH_FMD, 4, buffer);
904 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
905 /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
906 /* Wait until write complete */
909 target_read_u32(target, FLASH_FMC, &flash_fmc);
911 while(flash_fmc & FMC_WRITE);
916 /* Check acess violations */
917 target_read_u32(target, FLASH_CRIS, &flash_cris);
918 if(flash_cris & (AMASK))
920 LOG_DEBUG("flash_cris 0x%x", flash_cris);
921 return ERROR_FLASH_OPERATION_FAILED;
926 int stellaris_probe(struct flash_bank_s *bank)
928 /* we can't probe on an stellaris
929 * if this is an stellaris, it has the configured flash
932 if (bank->target->state != TARGET_HALTED)
934 return ERROR_TARGET_NOT_HALTED;
937 /* stellaris_read_part_info() already takes care about error checking and reporting */
938 return stellaris_read_part_info(bank);
941 int stellaris_auto_probe(struct flash_bank_s *bank)
943 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
944 if (stellaris_info->did1)
946 return stellaris_probe(bank);