1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * STELLARIS is tested on LM3S811
23 ***************************************************************************/
28 #include "replacements.h"
30 #include "stellaris.h"
31 #include "cortex_m3.h"
36 #include "binarybuffer.h"
43 #define DID0_VER(did0) ((did0>>28)&0x07)
44 int stellaris_register_commands(struct command_context_s *cmd_ctx);
45 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
46 int stellaris_erase(struct flash_bank_s *bank, int first, int last);
47 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last);
48 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
49 int stellaris_auto_probe(struct flash_bank_s *bank);
50 int stellaris_probe(struct flash_bank_s *bank);
51 int stellaris_protect_check(struct flash_bank_s *bank);
52 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size);
54 int stellaris_read_part_info(struct flash_bank_s *bank);
55 u32 stellaris_get_flash_status(flash_bank_t *bank);
56 void stellaris_set_flash_mode(flash_bank_t *bank,int mode);
57 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
59 int stellaris_read_part_info(struct flash_bank_s *bank);
60 int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
61 int stellaris_mass_erase(struct flash_bank_s *bank);
63 flash_driver_t stellaris_flash =
66 .register_commands = stellaris_register_commands,
67 .flash_bank_command = stellaris_flash_bank_command,
68 .erase = stellaris_erase,
69 .protect = stellaris_protect,
70 .write = stellaris_write,
71 .probe = stellaris_probe,
72 .auto_probe = stellaris_auto_probe,
73 .erase_check = default_flash_mem_blank_check,
74 .protect_check = stellaris_protect_check,
75 .info = stellaris_info
115 /*{0x33,"LM3S2616"},*/
234 char * StellarisClassname[5] =
243 /***************************************************************************
244 * openocd command interface *
245 ***************************************************************************/
247 /* flash_bank stellaris <base> <size> 0 0 <target#>
249 int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
251 stellaris_flash_bank_t *stellaris_info;
255 LOG_WARNING("incomplete flash_bank stellaris configuration");
256 return ERROR_FLASH_BANK_INVALID;
259 stellaris_info = calloc(sizeof(stellaris_flash_bank_t), 1);
261 bank->driver_priv = stellaris_info;
263 stellaris_info->target_name = "Unknown target";
265 /* part wasn't probed for info yet */
266 stellaris_info->did1 = 0;
268 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
272 int stellaris_register_commands(struct command_context_s *cmd_ctx)
274 command_t *stm32x_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, "stellaris flash specific commands");
276 register_command(cmd_ctx, stm32x_cmd, "mass_erase", stellaris_handle_mass_erase_command, COMMAND_EXEC, "mass erase device");
280 int stellaris_info(struct flash_bank_s *bank, char *buf, int buf_size)
282 int printed, device_class;
283 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
285 stellaris_read_part_info(bank);
287 if (stellaris_info->did1 == 0)
289 printed = snprintf(buf, buf_size, "Cannot identify target as a Stellaris\n");
292 return ERROR_FLASH_OPERATION_FAILED;
295 if (DID0_VER(stellaris_info->did0) > 0)
297 device_class = (stellaris_info->did0>>16) & 0xFF;
303 printed = snprintf(buf, buf_size, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
304 device_class, StellarisClassname[device_class], stellaris_info->target_name,
305 'A' + ((stellaris_info->did0>>8) & 0xFF), (stellaris_info->did0) & 0xFF);
309 printed = snprintf(buf, buf_size, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
310 stellaris_info->did1, stellaris_info->did1, "ARMV7M", (1+((stellaris_info->dc0>>16) & 0xFFFF))/4, (1+(stellaris_info->dc0 & 0xFFFF))*2);
314 printed = snprintf(buf, buf_size, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info->mck_freq / 1000, stellaris_info->rcc);
318 if (stellaris_info->num_lockbits>0) {
319 printed = snprintf(buf, buf_size, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info->pagesize, stellaris_info->num_lockbits, stellaris_info->lockbits,stellaris_info->num_pages/stellaris_info->num_lockbits);
326 /***************************************************************************
327 * chip identification and status *
328 ***************************************************************************/
330 u32 stellaris_get_flash_status(flash_bank_t *bank)
332 target_t *target = bank->target;
335 target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
340 /** Read clock configuration and set stellaris_info->usec_clocks*/
342 void stellaris_read_clock_info(flash_bank_t *bank)
344 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
345 target_t *target = bank->target;
346 u32 rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
347 unsigned long mainfreq;
349 target_read_u32(target, SCB_BASE|RCC, &rcc);
350 LOG_DEBUG("Stellaris RCC %x", rcc);
351 target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
352 LOG_DEBUG("Stellaris PLLCFG %x", pllcfg);
353 stellaris_info->rcc = rcc;
355 sysdiv = (rcc>>23) & 0xF;
356 usesysdiv = (rcc>>22) & 0x1;
357 bypass = (rcc>>11) & 0x1;
358 oscsrc = (rcc>>4) & 0x3;
359 /* xtal = (rcc>>6)&0xF; */
363 mainfreq = 6000000; /* Default xtal */
366 mainfreq = 22500000; /* Internal osc. 15 MHz +- 50% */
369 mainfreq = 5625000; /* Internal osc. / 4 */
372 LOG_WARNING("Invalid oscsrc (3) in rcc register");
376 default: /* NOTREACHED */
382 mainfreq = 200000000; /* PLL out frec */
385 stellaris_info->mck_freq = mainfreq/(1+sysdiv);
387 stellaris_info->mck_freq = mainfreq;
389 /* Forget old flash timing */
390 stellaris_set_flash_mode(bank, 0);
393 /* Setup the timimg registers */
394 void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
396 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
397 target_t *target = bank->target;
399 u32 usecrl = (stellaris_info->mck_freq/1000000ul-1);
400 LOG_DEBUG("usecrl = %i",usecrl);
401 target_write_u32(target, SCB_BASE|USECRL, usecrl);
404 u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
408 /* Stellaris waits for cmdbit to clear */
409 while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
411 LOG_DEBUG("status: 0x%x", status);
415 /* Flash errors are reflected in the FLASH_CRIS register */
420 /* Send one command to the flash controller */
421 int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen)
424 target_t *target = bank->target;
426 fmc = FMC_WRKEY | cmd;
427 target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
428 LOG_DEBUG("Flash command: 0x%x", fmc);
430 if (stellaris_wait_status_busy(bank, cmd, 100))
432 return ERROR_FLASH_OPERATION_FAILED;
438 /* Read device id register, main clock frequency register and fill in driver info structure */
439 int stellaris_read_part_info(struct flash_bank_s *bank)
441 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
442 target_t *target = bank->target;
443 u32 did0, did1, ver, fam, status;
446 /* Read and parse chip identification register */
447 target_read_u32(target, SCB_BASE|DID0, &did0);
448 target_read_u32(target, SCB_BASE|DID1, &did1);
449 target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
450 target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
451 LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x", did0, did1, stellaris_info->dc0, stellaris_info->dc1);
454 if((ver != 0) && (ver != 1))
456 LOG_WARNING("Unknown did0 version, cannot identify target");
457 return ERROR_FLASH_OPERATION_FAILED;
462 LOG_WARNING("Cannot identify target as a Stellaris");
463 return ERROR_FLASH_OPERATION_FAILED;
467 fam = (did1 >> 24) & 0xF;
468 if(((ver != 0) && (ver != 1)) || (fam != 0))
470 LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
473 for (i = 0; StellarisParts[i].partno; i++)
475 if (StellarisParts[i].partno == ((did1 >> 16) & 0xFF))
479 stellaris_info->target_name = StellarisParts[i].partname;
481 stellaris_info->did0 = did0;
482 stellaris_info->did1 = did1;
484 stellaris_info->num_lockbits = 1 + (stellaris_info->dc0 & 0xFFFF);
485 stellaris_info->num_pages = 2 *(1+(stellaris_info->dc0 & 0xFFFF));
486 stellaris_info->pagesize = 1024;
487 bank->size = 1024 * stellaris_info->num_pages;
488 stellaris_info->pages_in_lockregion = 2;
489 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
491 /* provide this for the benefit of the higher flash driver layers */
492 bank->num_sectors = stellaris_info->num_pages;
493 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
494 for (i = 0; i < bank->num_sectors; i++)
496 bank->sectors[i].offset = i * stellaris_info->pagesize;
497 bank->sectors[i].size = stellaris_info->pagesize;
498 bank->sectors[i].is_erased = -1;
499 bank->sectors[i].is_protected = -1;
502 /* Read main and master clock freqency register */
503 stellaris_read_clock_info(bank);
505 status = stellaris_get_flash_status(bank);
510 /***************************************************************************
512 ***************************************************************************/
514 int stellaris_protect_check(struct flash_bank_s *bank)
518 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
520 if (bank->target->state != TARGET_HALTED)
522 return ERROR_TARGET_NOT_HALTED;
525 if (stellaris_info->did1 == 0)
527 stellaris_read_part_info(bank);
530 if (stellaris_info->did1 == 0)
532 LOG_WARNING("Cannot identify target as an AT91SAM");
533 return ERROR_FLASH_OPERATION_FAILED;
536 status = stellaris_get_flash_status(bank);
537 stellaris_info->lockbits = status >> 16;
542 int stellaris_erase(struct flash_bank_s *bank, int first, int last)
545 u32 flash_fmc, flash_cris;
546 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
547 target_t *target = bank->target;
549 if (bank->target->state != TARGET_HALTED)
551 return ERROR_TARGET_NOT_HALTED;
554 if (stellaris_info->did1 == 0)
556 stellaris_read_part_info(bank);
559 if (stellaris_info->did1 == 0)
561 LOG_WARNING("Cannot identify target as Stellaris");
562 return ERROR_FLASH_OPERATION_FAILED;
565 if ((first < 0) || (last < first) || (last >= stellaris_info->num_pages))
567 return ERROR_FLASH_SECTOR_INVALID;
570 if ((first == 0) && (last == (stellaris_info->num_pages-1)))
572 return stellaris_mass_erase(bank);
575 /* Configure the flash controller timing */
576 stellaris_read_clock_info(bank);
577 stellaris_set_flash_mode(bank,0);
579 /* Clear and disable flash programming interrupts */
580 target_write_u32(target, FLASH_CIM, 0);
581 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
583 for (banknr=first;banknr<=last;banknr++)
585 /* Address is first word in page */
586 target_write_u32(target, FLASH_FMA, banknr*stellaris_info->pagesize);
587 /* Write erase command */
588 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
589 /* Wait until erase complete */
592 target_read_u32(target, FLASH_FMC, &flash_fmc);
594 while(flash_fmc & FMC_ERASE);
596 /* Check acess violations */
597 target_read_u32(target, FLASH_CRIS, &flash_cris);
598 if(flash_cris & (AMASK))
600 LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris);
601 target_write_u32(target, FLASH_CRIS, 0);
602 return ERROR_FLASH_OPERATION_FAILED;
605 bank->sectors[banknr].is_erased = 1;
611 int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last)
613 u32 fmppe, flash_fmc, flash_cris;
616 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
617 target_t *target = bank->target;
619 if (bank->target->state != TARGET_HALTED)
621 return ERROR_TARGET_NOT_HALTED;
624 if ((first < 0) || (last < first) || (last >= stellaris_info->num_lockbits))
626 return ERROR_FLASH_SECTOR_INVALID;
629 if (stellaris_info->did1 == 0)
631 stellaris_read_part_info(bank);
634 if (stellaris_info->did1 == 0)
636 LOG_WARNING("Cannot identify target as an Stellaris MCU");
637 return ERROR_FLASH_OPERATION_FAILED;
640 /* Configure the flash controller timing */
641 stellaris_read_clock_info(bank);
642 stellaris_set_flash_mode(bank, 0);
644 fmppe = stellaris_info->lockbits;
645 for (lockregion = first; lockregion <= last; lockregion++)
648 fmppe &= ~(1<<lockregion);
650 fmppe |= (1<<lockregion);
653 /* Clear and disable flash programming interrupts */
654 target_write_u32(target, FLASH_CIM, 0);
655 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
657 LOG_DEBUG("fmppe 0x%x",fmppe);
658 target_write_u32(target, SCB_BASE|FMPPE, fmppe);
660 target_write_u32(target, FLASH_FMA, 1);
661 /* Write commit command */
662 /* TODO safety check, sice this cannot be undone */
663 LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
664 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
665 /* Wait until erase complete */
668 target_read_u32(target, FLASH_FMC, &flash_fmc);
670 while(flash_fmc & FMC_COMT);
672 /* Check acess violations */
673 target_read_u32(target, FLASH_CRIS, &flash_cris);
674 if(flash_cris & (AMASK))
676 LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris);
677 target_write_u32(target, FLASH_CRIS, 0);
678 return ERROR_FLASH_OPERATION_FAILED;
681 target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
686 u8 stellaris_write_code[] =
691 r1 = destination address
692 r2 = bytecount (in) - endaddr (work)
695 r3 = pFLASH_CTRL_BASE
701 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
702 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
703 0x01,0x25, /* movs r5, 1 */
704 0x00,0x26, /* movs r6, #0 */
706 0x19,0x60, /* str r1, [r3, #0] */
707 0x87,0x59, /* ldr r7, [r0, r6] */
708 0x5F,0x60, /* str r7, [r3, #4] */
709 0x9C,0x60, /* str r4, [r3, #8] */
711 0x9F,0x68, /* ldr r7, [r3, #8] */
712 0x2F,0x42, /* tst r7, r5 */
713 0xFC,0xD1, /* bne waitloop */
714 0x04,0x31, /* adds r1, r1, #4 */
715 0x04,0x36, /* adds r6, r6, #4 */
716 0x96,0x42, /* cmp r6, r2 */
717 0xF4,0xD1, /* bne mainloop */
719 0xFE,0xE7, /* b exit */
720 /* pFLASH_CTRL_BASE: */
721 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
723 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
726 int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 wcount)
728 target_t *target = bank->target;
729 u32 buffer_size = 8192;
730 working_area_t *source;
731 working_area_t *write_algorithm;
732 u32 address = bank->base + offset;
733 reg_param_t reg_params[8];
734 armv7m_algorithm_t armv7m_info;
737 LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)",
738 bank, buffer, offset, wcount);
740 /* flash write code */
741 if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK)
743 LOG_WARNING("no working area available, can't do block memory writes");
744 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
747 target_write_buffer(target, write_algorithm->address, sizeof(stellaris_write_code), stellaris_write_code);
750 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
752 LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)",
753 target, buffer_size, source);
755 if (buffer_size <= 256)
757 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
759 target_free_working_area(target, write_algorithm);
761 LOG_WARNING("no large enough working area available, can't do block memory writes");
762 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
766 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
767 armv7m_info.core_mode = ARMV7M_MODE_ANY;
769 init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
770 init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
771 init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
772 init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
773 init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
774 init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
775 init_reg_param(®_params[6], "r6", 32, PARAM_OUT);
776 init_reg_param(®_params[7], "r7", 32, PARAM_OUT);
780 u32 thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
782 target_write_buffer(target, source->address, thisrun_count * 4, buffer);
784 buf_set_u32(reg_params[0].value, 0, 32, source->address);
785 buf_set_u32(reg_params[1].value, 0, 32, address);
786 buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count);
787 LOG_WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
788 LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount);
789 if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK)
791 LOG_ERROR("error executing stellaris flash write algorithm");
792 target_free_working_area(target, source);
793 destroy_reg_param(®_params[0]);
794 destroy_reg_param(®_params[1]);
795 destroy_reg_param(®_params[2]);
796 return ERROR_FLASH_OPERATION_FAILED;
799 buffer += thisrun_count * 4;
800 address += thisrun_count * 4;
801 wcount -= thisrun_count;
804 target_free_working_area(target, write_algorithm);
805 target_free_working_area(target, source);
807 destroy_reg_param(®_params[0]);
808 destroy_reg_param(®_params[1]);
809 destroy_reg_param(®_params[2]);
810 destroy_reg_param(®_params[3]);
811 destroy_reg_param(®_params[4]);
812 destroy_reg_param(®_params[5]);
813 destroy_reg_param(®_params[6]);
814 destroy_reg_param(®_params[7]);
819 int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
821 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
822 target_t *target = bank->target;
823 u32 address = offset;
824 u32 flash_cris,flash_fmc;
827 if (bank->target->state != TARGET_HALTED)
829 return ERROR_TARGET_NOT_HALTED;
832 LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)",
833 bank, buffer, offset, count);
835 if (stellaris_info->did1 == 0)
837 stellaris_read_part_info(bank);
840 if (stellaris_info->did1 == 0)
842 LOG_WARNING("Cannot identify target as a Stellaris processor");
843 return ERROR_FLASH_OPERATION_FAILED;
846 if((offset & 3) || (count & 3))
848 LOG_WARNING("offset size must be word aligned");
849 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
852 if (offset + count > bank->size)
853 return ERROR_FLASH_DST_OUT_OF_BANK;
855 /* Configure the flash controller timing */
856 stellaris_read_clock_info(bank);
857 stellaris_set_flash_mode(bank, 0);
860 /* Clear and disable flash programming interrupts */
861 target_write_u32(target, FLASH_CIM, 0);
862 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
864 /* multiple words to be programmed? */
867 /* try using a block write */
868 if ((retval = stellaris_write_block(bank, buffer, offset, count/4)) != ERROR_OK)
870 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
872 /* if block write failed (no sufficient working area),
873 * we use normal (slow) single dword accesses */
874 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
876 else if (retval == ERROR_FLASH_OPERATION_FAILED)
878 /* if an error occured, we examine the reason, and quit */
879 target_read_u32(target, FLASH_CRIS, &flash_cris);
881 LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris);
882 return ERROR_FLASH_OPERATION_FAILED;
888 address += count * 4;
895 if (!(address & 0xff)) LOG_DEBUG("0x%x", address);
896 /* Program one word */
897 target_write_u32(target, FLASH_FMA, address);
898 target_write_buffer(target, FLASH_FMD, 4, buffer);
899 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
900 /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
901 /* Wait until write complete */
904 target_read_u32(target, FLASH_FMC, &flash_fmc);
906 while(flash_fmc & FMC_WRITE);
911 /* Check acess violations */
912 target_read_u32(target, FLASH_CRIS, &flash_cris);
913 if (flash_cris & (AMASK))
915 LOG_DEBUG("flash_cris 0x%x", flash_cris);
916 return ERROR_FLASH_OPERATION_FAILED;
921 int stellaris_probe(struct flash_bank_s *bank)
923 /* we can't probe on an stellaris
924 * if this is an stellaris, it has the configured flash
927 if (bank->target->state != TARGET_HALTED)
929 return ERROR_TARGET_NOT_HALTED;
932 /* stellaris_read_part_info() already takes care about error checking and reporting */
933 return stellaris_read_part_info(bank);
936 int stellaris_auto_probe(struct flash_bank_s *bank)
938 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
939 if (stellaris_info->did1)
941 return stellaris_probe(bank);
944 int stellaris_mass_erase(struct flash_bank_s *bank)
946 target_t *target = NULL;
947 stellaris_flash_bank_t *stellaris_info = NULL;
950 stellaris_info = bank->driver_priv;
951 target = bank->target;
953 if (target->state != TARGET_HALTED)
955 return ERROR_TARGET_NOT_HALTED;
958 if (stellaris_info->did1 == 0)
960 stellaris_read_part_info(bank);
963 if (stellaris_info->did1 == 0)
965 LOG_WARNING("Cannot identify target as Stellaris");
966 return ERROR_FLASH_OPERATION_FAILED;
969 /* Configure the flash controller timing */
970 stellaris_read_clock_info(bank);
971 stellaris_set_flash_mode(bank, 0);
973 /* Clear and disable flash programming interrupts */
974 target_write_u32(target, FLASH_CIM, 0);
975 target_write_u32(target, FLASH_MISC, PMISC|AMISC);
977 target_write_u32(target, FLASH_FMA, 0);
978 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
979 /* Wait until erase complete */
982 target_read_u32(target, FLASH_FMC, &flash_fmc);
984 while(flash_fmc & FMC_MERASE);
986 /* if device has > 128k, then second erase cycle is needed
987 * this is only valid for older devices, but will not hurt */
988 if(stellaris_info->num_pages * stellaris_info->pagesize > 0x20000)
990 target_write_u32(target, FLASH_FMA, 0x20000);
991 target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
992 /* Wait until erase complete */
995 target_read_u32(target, FLASH_FMC, &flash_fmc);
997 while(flash_fmc & FMC_MERASE);
1003 int stellaris_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
1010 command_print(cmd_ctx, "stellaris mass_erase <bank>");
1014 bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
1017 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
1021 stellaris_mass_erase(bank);
1023 /* set all sectors as erased */
1024 for (i = 0; i < bank->num_sectors; i++)
1026 bank->sectors[i].is_erased = 1;
1029 command_print(cmd_ctx, "stellaris mass erase complete");