1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 typedef struct stm32x_options_s
36 typedef struct stm32x_flash_bank_s
38 stm32x_options_t option_bytes;
39 working_area_t *write_algorithm;
42 } stm32x_flash_bank_t;
44 /* stm32x register locations */
46 #define STM32_FLASH_ACR 0x40022000
47 #define STM32_FLASH_KEYR 0x40022004
48 #define STM32_FLASH_OPTKEYR 0x40022008
49 #define STM32_FLASH_SR 0x4002200C
50 #define STM32_FLASH_CR 0x40022010
51 #define STM32_FLASH_AR 0x40022014
52 #define STM32_FLASH_OBR 0x4002201C
53 #define STM32_FLASH_WRPR 0x40022020
55 /* option byte location */
57 #define STM32_OB_RDP 0x1FFFF800
58 #define STM32_OB_USER 0x1FFFF802
59 #define STM32_OB_DATA0 0x1FFFF804
60 #define STM32_OB_DATA1 0x1FFFF806
61 #define STM32_OB_WRP0 0x1FFFF808
62 #define STM32_OB_WRP1 0x1FFFF80A
63 #define STM32_OB_WRP2 0x1FFFF80C
64 #define STM32_OB_WRP3 0x1FFFF80E
66 /* FLASH_CR register bits */
68 #define FLASH_PG (1<<0)
69 #define FLASH_PER (1<<1)
70 #define FLASH_MER (1<<2)
71 #define FLASH_OPTPG (1<<4)
72 #define FLASH_OPTER (1<<5)
73 #define FLASH_STRT (1<<6)
74 #define FLASH_LOCK (1<<7)
75 #define FLASH_OPTWRE (1<<9)
77 /* FLASH_SR regsiter bits */
79 #define FLASH_BSY (1<<0)
80 #define FLASH_PGERR (1<<2)
81 #define FLASH_WRPRTERR (1<<4)
82 #define FLASH_EOP (1<<5)
84 /* STM32_FLASH_OBR bit definitions (reading) */
89 #define OPT_RDRSTSTOP 3
90 #define OPT_RDRSTSTDBY 4
92 /* register unlock keys */
94 #define KEY1 0x45670123
95 #define KEY2 0xCDEF89AB
97 typedef struct stm32x_mem_layout_s {
100 } stm32x_mem_layout_t;
102 #endif /* STM32X_H */