1 /***************************************************************************
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2 * (c) Copyright 2007, 2008 by Christopher Kilgour *
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3 * techie |_at_| whiterocker |_dot_| com *
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5 * This program is free software; you can redistribute it and/or modify *
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6 * it under the terms of the GNU General Public License as published by *
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7 * the Free Software Foundation; either version 2 of the License, or *
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8 * (at your option) any later version. *
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10 * This program is distributed in the hope that it will be useful, *
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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13 * GNU General Public License for more details. *
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15 * You should have received a copy of the GNU General Public License *
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16 * along with this program; if not, write to the *
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17 * Free Software Foundation, Inc., *
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18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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19 ***************************************************************************/
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21 #ifdef HAVE_CONFIG_H
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31 tms470_register_commands( struct command_context_s *cmd_ctx );
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34 tms470_flash_bank_command( struct command_context_s *cmd_ctx,
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38 struct flash_bank_s *bank );
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41 tms470_erase( struct flash_bank_s *bank,
\r
46 tms470_protect( struct flash_bank_s *bank,
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52 tms470_write( struct flash_bank_s *bank,
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58 tms470_probe( struct flash_bank_s *bank );
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61 tms470_erase_check( struct flash_bank_s *bank );
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64 tms470_protect_check( struct flash_bank_s *bank );
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67 tms470_info( struct flash_bank_s *bank,
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71 flash_driver_t tms470_flash =
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74 .register_commands = tms470_register_commands,
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75 .flash_bank_command = tms470_flash_bank_command,
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76 .erase = tms470_erase,
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77 .protect = tms470_protect,
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78 .write = tms470_write,
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79 .probe = tms470_probe,
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80 .erase_check = tms470_erase_check,
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81 .protect_check = tms470_protect_check,
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85 /* ----------------------------------------------------------------------
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86 Internal Support, Helpers
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87 ---------------------------------------------------------------------- */
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89 const flash_sector_t TMS470R1A256_SECTORS[] =
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91 { 0x00000000, 0x00002000, -1, -1 },
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92 { 0x00002000, 0x00002000, -1, -1 },
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93 { 0x00004000, 0x00002000, -1, -1 },
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94 { 0x00006000, 0x00002000, -1, -1 },
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95 { 0x00008000, 0x00008000, -1, -1 },
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96 { 0x00010000, 0x00008000, -1, -1 },
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97 { 0x00018000, 0x00008000, -1, -1 },
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98 { 0x00020000, 0x00008000, -1, -1 },
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99 { 0x00028000, 0x00008000, -1, -1 },
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100 { 0x00030000, 0x00008000, -1, -1 },
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101 { 0x00038000, 0x00002000, -1, -1 },
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102 { 0x0003A000, 0x00002000, -1, -1 },
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103 { 0x0003C000, 0x00002000, -1, -1 },
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104 { 0x0003E000, 0x00002000, -1, -1 },
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107 #define TMS470R1A256_NUM_SECTORS \
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108 (sizeof(TMS470R1A256_SECTORS)/sizeof(TMS470R1A256_SECTORS[0]))
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110 const flash_sector_t TMS470R1A288_BANK0_SECTORS[] =
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112 { 0x00000000, 0x00002000, -1, -1 },
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113 { 0x00002000, 0x00002000, -1, -1 },
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114 { 0x00004000, 0x00002000, -1, -1 },
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115 { 0x00006000, 0x00002000, -1, -1 },
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118 #define TMS470R1A288_BANK0_NUM_SECTORS \
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119 (sizeof(TMS470R1A288_BANK0_SECTORS)/sizeof(TMS470R1A288_BANK0_SECTORS[0]))
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121 const flash_sector_t TMS470R1A288_BANK1_SECTORS[] =
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123 { 0x00040000, 0x00010000, -1, -1 },
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124 { 0x00050000, 0x00010000, -1, -1 },
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125 { 0x00060000, 0x00010000, -1, -1 },
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126 { 0x00070000, 0x00010000, -1, -1 },
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129 #define TMS470R1A288_BANK1_NUM_SECTORS \
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130 (sizeof(TMS470R1A288_BANK1_SECTORS)/sizeof(TMS470R1A288_BANK1_SECTORS[0]))
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132 /* ---------------------------------------------------------------------- */
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135 tms470_read_part_info( struct flash_bank_s *bank )
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137 tms470_flash_bank_t *tms470_info = bank->driver_priv;
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138 target_t *target = bank->target;
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139 u32 device_ident_reg;
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140 u32 silicon_version;
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141 u32 technology_family;
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146 if (target->state != TARGET_HALTED)
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148 WARNING( "Cannot communicate... target not halted." );
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149 return ERROR_TARGET_NOT_HALTED;
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152 /* read and parse the device identification register */
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153 target_read_u32( target, 0xFFFFFFF0, &device_ident_reg );
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155 INFO( "device_ident_reg=0x%08x", device_ident_reg );
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157 if ((device_ident_reg & 7) == 0)
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159 WARNING( "Cannot identify target as a TMS470 family." );
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160 return ERROR_FLASH_OPERATION_FAILED;
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163 silicon_version = (device_ident_reg >> 12) & 0xF;
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164 technology_family = (device_ident_reg >> 11) & 1;
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165 rom_flash = (device_ident_reg >> 10) & 1;
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166 part_number = (device_ident_reg >> 3) & 0x7f;
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169 * If the part number is known, determine if the flash bank is valid
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170 * based on the base address being within the known flash bank
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171 * ranges. Then fixup/complete the remaining fields of the flash
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174 switch( part_number )
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177 part_name = "TMS470R1A256";
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179 if (bank->base >= 0x00040000)
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181 ERROR( "No %s flash bank contains base address 0x%08x.",
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182 part_name, bank->base );
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183 return ERROR_FLASH_OPERATION_FAILED;
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185 tms470_info->ordinal = 0;
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186 bank->base = 0x00000000;
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187 bank->size = 256*1024;
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188 bank->num_sectors = TMS470R1A256_NUM_SECTORS;
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189 bank->sectors = malloc( sizeof( TMS470R1A256_SECTORS ) );
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190 if (!bank->sectors)
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192 return ERROR_FLASH_OPERATION_FAILED;
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194 (void) memcpy( bank->sectors,
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195 TMS470R1A256_SECTORS,
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196 sizeof( TMS470R1A256_SECTORS ) );
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200 part_name = "TMS470R1A288";
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202 if ((bank->base >= 0x00000000) && (bank->base < 0x00008000))
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204 tms470_info->ordinal = 0;
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205 bank->base = 0x00000000;
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206 bank->size = 32*1024;
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207 bank->num_sectors = TMS470R1A288_BANK0_NUM_SECTORS;
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208 bank->sectors = malloc( sizeof( TMS470R1A288_BANK0_SECTORS ) );
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209 if (!bank->sectors)
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211 return ERROR_FLASH_OPERATION_FAILED;
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213 (void) memcpy( bank->sectors,
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214 TMS470R1A288_BANK0_SECTORS,
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215 sizeof( TMS470R1A288_BANK0_SECTORS ) );
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217 else if ((bank->base >= 0x00040000) && (bank->base < 0x00080000))
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219 tms470_info->ordinal = 1;
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220 bank->base = 0x00040000;
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221 bank->size = 256*1024;
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222 bank->num_sectors = TMS470R1A288_BANK1_NUM_SECTORS;
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223 bank->sectors = malloc( sizeof( TMS470R1A288_BANK1_SECTORS ) );
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224 if (!bank->sectors)
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226 return ERROR_FLASH_OPERATION_FAILED;
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228 (void) memcpy( bank->sectors,
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229 TMS470R1A288_BANK1_SECTORS,
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230 sizeof( TMS470R1A288_BANK1_SECTORS ) );
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234 ERROR( "No %s flash bank contains base address 0x%08x.",
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235 part_name, bank->base );
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236 return ERROR_FLASH_OPERATION_FAILED;
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241 WARNING( "Could not identify part 0x%02x as a member of the TMS470 family.",
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243 return ERROR_FLASH_OPERATION_FAILED;
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246 /* turn off memory selects */
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247 target_write_u32( target, 0xFFFFFFE4, 0x00000000 );
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248 target_write_u32( target, 0xFFFFFFE0, 0x00000000 );
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250 bank->chip_width = 32;
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251 bank->bus_width = 32;
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253 INFO( "Identified %s, ver=%d, core=%s, nvmem=%s.",
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256 (technology_family ? "1.8v" : "3.3v"),
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257 (rom_flash ? "rom" : "flash") );
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259 tms470_info->device_ident_reg = device_ident_reg;
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260 tms470_info->silicon_version = silicon_version;
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261 tms470_info->technology_family = technology_family;
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262 tms470_info->rom_flash = rom_flash;
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263 tms470_info->part_number = part_number;
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264 tms470_info->part_name = part_name;
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267 * Disable reset on address access violation.
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269 target_write_u32( target, 0xFFFFFFE0, 0x00004007 );
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274 /* ---------------------------------------------------------------------- */
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280 tms470_handle_flash_keyset_command( struct command_context_s * cmd_ctx,
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287 command_print( cmd_ctx, "tms470 flash_keyset <key0> <key1> <key2> <key3>" );
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288 return ERROR_INVALID_ARGUMENTS;
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290 else if (argc == 4)
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294 for( i=0; i<4; i++ )
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296 int start = (0 == strncmp( args[i], "0x", 2 )) ? 2 : 0;
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297 if (1 != sscanf( &args[i][start], "%x", &flashKeys[i] ))
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299 command_print( cmd_ctx, "could not process flash key %s", args[i] );
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300 ERROR( "could not process flash key %s", args[i] );
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301 return ERROR_INVALID_ARGUMENTS;
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307 else if (argc != 0)
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309 command_print( cmd_ctx, "tms470 flash_keyset <key0> <key1> <key2> <key3>" );
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310 return ERROR_INVALID_ARGUMENTS;
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315 command_print( cmd_ctx, "using flash keys 0x%08x, 0x%08x, 0x%08x, 0x%08x",
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316 flashKeys[0], flashKeys[1], flashKeys[2], flashKeys[3] );
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320 command_print( cmd_ctx, "flash keys not set" );
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326 const u32 FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF,
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327 0xFFFFFFFF, 0xFFFFFFFF, };
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329 const u32 FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000,
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330 0x00000000, 0x00000000, };
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332 const u32 FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff,
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333 0xf0fff0ff, 0xf0fff0ff };
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335 const u32 FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff,
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336 0x0000ffff, 0x0000ffff };
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338 /* ---------------------------------------------------------------------- */
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343 tms470_handle_osc_megahertz_command( struct command_context_s * cmd_ctx,
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350 command_print( cmd_ctx, "tms470 osc_megahertz <MHz>" );
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351 return ERROR_INVALID_ARGUMENTS;
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353 else if (argc == 1)
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355 sscanf( args[0], "%d", &oscMHz );
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360 ERROR( "osc_megahertz must be positive and non-zero!" );
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361 command_print( cmd_ctx, "osc_megahertz must be positive and non-zero!" );
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363 return ERROR_INVALID_ARGUMENTS;
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366 command_print( cmd_ctx, "osc_megahertz=%d", oscMHz );
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371 /* ---------------------------------------------------------------------- */
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376 tms470_handle_plldis_command( struct command_context_s * cmd_ctx,
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383 command_print( cmd_ctx, "tms470 plldis <0|1>" );
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384 return ERROR_INVALID_ARGUMENTS;
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386 else if (argc == 1)
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388 sscanf( args[0], "%d", &plldis );
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389 plldis = plldis ? 1 : 0;
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392 command_print( cmd_ctx, "plldis=%d", plldis );
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397 /* ---------------------------------------------------------------------- */
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400 tms470_check_flash_unlocked( target_t * target )
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404 target_read_u32( target, 0xFFE89C08, &fmbbusy );
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405 INFO( "tms470 fmbbusy=0x%08x -> %s",
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407 fmbbusy & 0x8000 ? "unlocked" : "LOCKED" );
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408 return fmbbusy & 0x8000 ? ERROR_OK : ERROR_FLASH_OPERATION_FAILED;
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411 /* ---------------------------------------------------------------------- */
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414 tms470_try_flash_keys( target_t * target,
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415 const u32 * key_set )
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417 u32 glbctrl, fmmstat;
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418 int retval = ERROR_FLASH_OPERATION_FAILED;
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420 /* set GLBCTRL.4 */
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421 target_read_u32( target, 0xFFFFFFDC, &glbctrl );
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422 target_write_u32( target, 0xFFFFFFDC, glbctrl | 0x10 );
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424 /* only perform the key match when 3VSTAT is clear */
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425 target_read_u32( target, 0xFFE8BC0C, &fmmstat );
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426 if (!(fmmstat & 0x08))
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429 u32 fmmac2, fmbptr, fmbac2, fmbbusy, orig_fmregopt;
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431 target_write_u32( target, 0xFFE8BC04, fmmstat & ~0x07 );
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433 /* wait for pump ready */
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436 target_read_u32( target, 0xFFE8A814, &fmbptr );
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439 while( !(fmbptr & 0x0200) );
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441 /* force max wait states */
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442 target_read_u32( target, 0xFFE88004, &fmbac2 );
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443 target_write_u32( target, 0xFFE88004, fmbac2 | 0xff );
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445 /* save current access mode, force normal read mode */
\r
446 target_read_u32( target, 0xFFE89C00, &orig_fmregopt );
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447 target_write_u32( target, 0xFFE89C00, 0x00 );
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449 for( i=0; i<4; i++ )
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453 /* There is no point displaying the value of tmp, it is
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454 * filtered by the chip. The purpose of this read is to
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455 * prime the unlocking logic rather than read out the value.
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457 target_read_u32( target, 0x00001FF0+4*i, &tmp );
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459 INFO( "tms470 writing fmpkey=0x%08x", key_set[i] );
\r
460 target_write_u32( target, 0xFFE89C0C, key_set[i] );
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463 if (ERROR_OK == tms470_check_flash_unlocked( target ))
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466 * There seems to be a side-effect of reading the FMPKEY
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467 * register in that it re-enables the protection. So we
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470 for( i=0; i<4; i++ )
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473 target_read_u32( target, 0x00001FF0+4*i, &tmp );
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474 target_write_u32( target, 0xFFE89C0C, key_set[i] );
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479 /* restore settings */
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480 target_write_u32( target, 0xFFE89C00, orig_fmregopt );
\r
481 target_write_u32( target, 0xFFE88004, fmbac2 );
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484 /* clear config bit */
\r
485 target_write_u32( target, 0xFFFFFFDC, glbctrl );
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490 /* ---------------------------------------------------------------------- */
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493 tms470_unlock_flash( struct flash_bank_s * bank )
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495 tms470_flash_bank_t * tms470_info = bank->driver_priv;
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496 target_t * target = bank->target;
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497 const u32 * p_key_sets[5];
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498 unsigned i, key_set_count;
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502 p_key_sets[0] = flashKeys;
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503 p_key_sets[1] = FLASH_KEYS_ALL_ONES;
\r
504 p_key_sets[2] = FLASH_KEYS_ALL_ZEROS;
\r
505 p_key_sets[3] = FLASH_KEYS_MIX1;
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506 p_key_sets[4] = FLASH_KEYS_MIX2;
\r
511 p_key_sets[0] = FLASH_KEYS_ALL_ONES;
\r
512 p_key_sets[1] = FLASH_KEYS_ALL_ZEROS;
\r
513 p_key_sets[2] = FLASH_KEYS_MIX1;
\r
514 p_key_sets[3] = FLASH_KEYS_MIX2;
\r
517 for( i=0; i<key_set_count; i++ )
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519 if (tms470_try_flash_keys( target, p_key_sets[i] ) == ERROR_OK)
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521 INFO( "tms470 flash is unlocked" );
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526 WARNING( "tms470 could not unlock flash memory protection level 2" );
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527 return ERROR_FLASH_OPERATION_FAILED;
\r
530 /* ---------------------------------------------------------------------- */
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533 tms470_flash_initialize_internal_state_machine( struct flash_bank_s * bank )
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535 u32 fmmac2, fmmac1, fmmaxep, k, delay, glbctrl, sysclk;
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536 target_t *target = bank->target;
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537 tms470_flash_bank_t * tms470_info = bank->driver_priv;
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538 int result = ERROR_OK;
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541 * Select the desired bank to be programmed by writing BANK[2:0] of
\r
544 target_read_u32( target, 0xFFE8BC04, &fmmac2 );
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546 fmmac2 |= (tms470_info->ordinal & 7);
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547 target_write_u32( target, 0xFFE8BC04, fmmac2 );
\r
548 DEBUG( "set fmmac2=0x%04x", fmmac2 );
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551 * Disable level 1 sector protection by setting bit 15 of FMMAC1.
\r
553 target_read_u32( target, 0xFFE8BC00, &fmmac1 );
\r
555 target_write_u32( target, 0xFFE8BC00, fmmac1 );
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556 DEBUG( "set fmmac1=0x%04x", fmmac1 );
\r
561 target_write_u32( target, 0xFFE8BC10, 0x2fc0 );
\r
562 DEBUG( "set fmtcreg=0x2fc0" );
\r
567 target_write_u32( target, 0xFFE8A07C, 50 );
\r
568 DEBUG( "set fmmaxpp=50" );
\r
571 * MAXCP=0xf000+2000
\r
573 target_write_u32( target, 0xFFE8A084, 0xf000+2000 );
\r
574 DEBUG( "set fmmaxcp=0x%04x", 0xf000+2000 );
\r
579 target_read_u32( target, 0xFFE8A080, &fmmaxep );
\r
580 if (fmmaxep == 0xf000)
\r
582 fmmaxep = 0xf000+4095;
\r
583 target_write_u32( target, 0xFFE8A80C, 0x9964 );
\r
584 DEBUG( "set fmptr3=0x9964" );
\r
588 fmmaxep = 0xa000+4095;
\r
589 target_write_u32( target, 0xFFE8A80C, 0x9b64 );
\r
590 DEBUG( "set fmptr3=0x9b64" );
\r
592 target_write_u32( target, 0xFFE8A080, fmmaxep );
\r
593 DEBUG( "set fmmaxep=0x%04x", fmmaxep );
\r
598 target_write_u32( target, 0xFFE8A810, 0xa000 );
\r
599 DEBUG( "set fmptr4=0xa000" );
\r
602 * FMPESETUP, delay parameter selected based on clock frequency.
\r
604 * According to the TI App Note SPNU257 and flashing code, delay is
\r
605 * int((sysclk(MHz) + 1) / 2), with a minimum of 5. The system
\r
606 * clock is usually derived from the ZPLL module, and selected by
\r
607 * the plldis global.
\r
609 target_read_u32( target, 0xFFFFFFDC, &glbctrl );
\r
610 sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8 ) * oscMHz / (1 + (glbctrl & 7));
\r
611 delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5;
\r
612 target_write_u32( target, 0xFFE8A018, (delay<<4)|(delay<<8) );
\r
613 DEBUG( "set fmpsetup=0x%04x", (delay<<4)|(delay<<8) );
\r
616 * FMPVEVACCESS, based on delay.
\r
618 k = delay|(delay<<8);
\r
619 target_write_u32( target, 0xFFE8A05C, k );
\r
620 DEBUG( "set fmpvevaccess=0x%04x", k );
\r
623 * FMPCHOLD, FMPVEVHOLD, FMPVEVSETUP, based on delay.
\r
626 target_write_u32( target, 0xFFE8A034, k );
\r
627 DEBUG( "set fmpchold=0x%04x", k );
\r
628 target_write_u32( target, 0xFFE8A040, k );
\r
629 DEBUG( "set fmpvevhold=0x%04x", k );
\r
630 target_write_u32( target, 0xFFE8A024, k );
\r
631 DEBUG( "set fmpvevsetup=0x%04x", k );
\r
634 * FMCVACCESS, based on delay.
\r
637 target_write_u32( target, 0xFFE8A060, k );
\r
638 DEBUG( "set fmcvaccess=0x%04x", k );
\r
641 * FMCSETUP, based on delay.
\r
643 k = 0x3000 | delay*20;
\r
644 target_write_u32( target, 0xFFE8A020, k );
\r
645 DEBUG( "set fmcsetup=0x%04x", k );
\r
648 * FMEHOLD, based on delay.
\r
650 k = (delay*20) << 2;
\r
651 target_write_u32( target, 0xFFE8A038, k );
\r
652 DEBUG( "set fmehold=0x%04x", k );
\r
655 * PWIDTH, CWIDTH, EWIDTH, based on delay.
\r
657 target_write_u32( target, 0xFFE8A050, delay*8 );
\r
658 DEBUG( "set fmpwidth=0x%04x", delay*8 );
\r
659 target_write_u32( target, 0xFFE8A058, delay*1000 );
\r
660 DEBUG( "set fmcwidth=0x%04x", delay*1000 );
\r
661 target_write_u32( target, 0xFFE8A054, delay*5400 );
\r
662 DEBUG( "set fmewidth=0x%04x", delay*5400 );
\r
668 /* ---------------------------------------------------------------------- */
\r
671 tms470_flash_status( struct flash_bank_s * bank )
\r
673 target_t *target = bank->target;
\r
674 int result = ERROR_OK;
\r
677 target_read_u32( target, 0xFFE8BC0C, &fmmstat );
\r
678 DEBUG( "set fmmstat=0x%04x", fmmstat );
\r
680 if (fmmstat & 0x0080)
\r
682 WARNING( "tms470 flash command: erase still active after busy clear." );
\r
683 result = ERROR_FLASH_OPERATION_FAILED;
\r
686 if (fmmstat & 0x0040)
\r
688 WARNING( "tms470 flash command: program still active after busy clear." );
\r
689 result = ERROR_FLASH_OPERATION_FAILED;
\r
692 if (fmmstat & 0x0020)
\r
694 WARNING( "tms470 flash command: invalid data command." );
\r
695 result = ERROR_FLASH_OPERATION_FAILED;
\r
698 if (fmmstat & 0x0010)
\r
700 WARNING( "tms470 flash command: program, erase or validate sector failed." );
\r
701 result = ERROR_FLASH_OPERATION_FAILED;
\r
704 if (fmmstat & 0x0008)
\r
706 WARNING( "tms470 flash command: voltage instability detected." );
\r
707 result = ERROR_FLASH_OPERATION_FAILED;
\r
710 if (fmmstat & 0x0006)
\r
712 WARNING( "tms470 flash command: command suspend detected." );
\r
713 result = ERROR_FLASH_OPERATION_FAILED;
\r
716 if (fmmstat & 0x0001)
\r
718 WARNING( "tms470 flash command: sector was locked." );
\r
719 result = ERROR_FLASH_OPERATION_FAILED;
\r
725 /* ---------------------------------------------------------------------- */
\r
728 tms470_erase_sector( struct flash_bank_s * bank,
\r
731 u32 glbctrl, orig_fmregopt, fmbsea, fmbseb, fmmstat;
\r
732 target_t *target = bank->target;
\r
733 u32 flashAddr = bank->base + bank->sectors[sector].offset;
\r
734 int result = ERROR_OK;
\r
737 * Set the bit GLBCTRL4 of the GLBCTRL register (in the System
\r
738 * module) to enable writing to the flash registers }.
\r
740 target_read_u32( target, 0xFFFFFFDC, &glbctrl );
\r
741 target_write_u32( target, 0xFFFFFFDC, glbctrl | 0x10 );
\r
742 DEBUG( "set glbctrl=0x%08x", glbctrl | 0x10 );
\r
744 /* Force normal read mode. */
\r
745 target_read_u32( target, 0xFFE89C00, &orig_fmregopt );
\r
746 target_write_u32( target, 0xFFE89C00, 0 );
\r
747 DEBUG( "set fmregopt=0x%08x", 0 );
\r
749 (void) tms470_flash_initialize_internal_state_machine( bank );
\r
752 * Select one or more bits in FMBSEA or FMBSEB to disable Level 1
\r
753 * protection for the particular sector to be erased/written.
\r
757 target_read_u32( target, 0xFFE88008, &fmbsea );
\r
758 target_write_u32( target, 0xFFE88008, fmbsea | (1<<sector) );
\r
759 DEBUG( "set fmbsea=0x%04x", fmbsea | (1<<sector) );
\r
763 target_read_u32( target, 0xFFE8800C, &fmbseb );
\r
764 target_write_u32( target, 0xFFE8800C, fmbseb | (1<<(sector-16)) );
\r
765 DEBUG( "set fmbseb=0x%04x", fmbseb | (1<<(sector-16)) );
\r
767 bank->sectors[sector].is_protected = 0;
\r
770 * clear status regiser, sent erase command, kickoff erase
\r
772 target_write_u16( target, flashAddr, 0x0040 );
\r
773 DEBUG( "write *(u16 *)0x%08x=0x0040", flashAddr );
\r
774 target_write_u16( target, flashAddr, 0x0020 );
\r
775 DEBUG( "write *(u16 *)0x%08x=0x0020", flashAddr );
\r
776 target_write_u16( target, flashAddr, 0xffff );
\r
777 DEBUG( "write *(u16 *)0x%08x=0xffff", flashAddr );
\r
780 * Monitor FMMSTAT, busy until clear, then check and other flags for
\r
781 * ultimate result of the operation.
\r
785 target_read_u32( target, 0xFFE8BC0C, &fmmstat );
\r
786 if (fmmstat & 0x0100)
\r
791 while( fmmstat & 0x0100 );
\r
793 result = tms470_flash_status( bank );
\r
797 target_write_u32( target, 0xFFE88008, fmbsea );
\r
798 DEBUG( "set fmbsea=0x%04x", fmbsea );
\r
799 bank->sectors[sector].is_protected =
\r
800 fmbsea & (1<<sector) ? 0 : 1;
\r
804 target_write_u32( target, 0xFFE8800C, fmbseb );
\r
805 DEBUG( "set fmbseb=0x%04x", fmbseb );
\r
806 bank->sectors[sector].is_protected =
\r
807 fmbseb & (1<<(sector-16)) ? 0 : 1;
\r
809 target_write_u32( target, 0xFFE89C00, orig_fmregopt );
\r
810 DEBUG( "set fmregopt=0x%08x", orig_fmregopt );
\r
811 target_write_u32( target, 0xFFFFFFDC, glbctrl );
\r
812 DEBUG( "set glbctrl=0x%08x", glbctrl );
\r
814 if (result == ERROR_OK)
\r
816 bank->sectors[sector].is_erased = 1;
\r
822 /* ----------------------------------------------------------------------
\r
823 Implementation of Flash Driver Interfaces
\r
824 ---------------------------------------------------------------------- */
\r
827 tms470_register_commands( struct command_context_s *cmd_ctx )
\r
829 command_t *tms470_cmd = register_command( cmd_ctx,
\r
834 "applies to TI tms470 family" );
\r
836 register_command( cmd_ctx,
\r
839 tms470_handle_flash_keyset_command,
\r
841 "tms470 flash_keyset <key0> <key1> <key2> <key3>" );
\r
843 register_command( cmd_ctx,
\r
846 tms470_handle_osc_megahertz_command,
\r
848 "tms470 osc_megahertz <MHz>" );
\r
850 register_command( cmd_ctx,
\r
853 tms470_handle_plldis_command,
\r
855 "tms470 plldis <0/1>" );
\r
860 /* ---------------------------------------------------------------------- */
\r
863 tms470_erase( struct flash_bank_s * bank,
\r
867 tms470_flash_bank_t *tms470_info = bank->driver_priv;
\r
868 target_t *target = bank->target;
\r
869 int sector, result = ERROR_OK;
\r
871 if (!tms470_info->device_ident_reg)
\r
873 tms470_read_part_info( bank );
\r
876 if ((first < 0) ||
\r
877 (first >= bank->num_sectors) ||
\r
879 (last >= bank->num_sectors) ||
\r
882 ERROR( "Sector range %d to %d invalid.", first, last );
\r
883 return ERROR_FLASH_SECTOR_INVALID;
\r
886 result = tms470_unlock_flash( bank );
\r
887 if (result != ERROR_OK)
\r
892 for( sector=first; sector<=last; sector++ )
\r
894 INFO( "Erasing tms470 bank %d sector %d...",
\r
895 tms470_info->ordinal, sector );
\r
897 result = tms470_erase_sector( bank, sector );
\r
899 if (result != ERROR_OK)
\r
901 ERROR( "tms470 could not erase flash sector." );
\r
906 INFO( "sector erased successfully." );
\r
913 /* ---------------------------------------------------------------------- */
\r
916 tms470_protect( struct flash_bank_s * bank,
\r
921 tms470_flash_bank_t *tms470_info = bank->driver_priv;
\r
922 target_t *target = bank->target;
\r
923 u32 fmmac2, fmbsea, fmbseb;
\r
926 if (!tms470_info->device_ident_reg)
\r
928 tms470_read_part_info( bank );
\r
931 if ((first < 0) ||
\r
932 (first >= bank->num_sectors) ||
\r
934 (last >= bank->num_sectors) ||
\r
937 ERROR( "Sector range %d to %d invalid.", first, last );
\r
938 return ERROR_FLASH_SECTOR_INVALID;
\r
941 /* enable the appropriate bank */
\r
942 target_read_u32( target, 0xFFE8BC04, &fmmac2 );
\r
943 target_write_u32( target, 0xFFE8BC04,
\r
944 (fmmac2 & ~7) | tms470_info->ordinal );
\r
946 /* get the original sector proection flags for this bank */
\r
947 target_read_u32( target, 0xFFE88008, &fmbsea );
\r
948 target_read_u32( target, 0xFFE8800C, &fmbseb );
\r
950 for( sector=0; sector<bank->num_sectors; sector++ )
\r
954 fmbsea = set ? fmbsea & ~(1<<sector) :
\r
955 fmbsea | (1<<sector);
\r
956 bank->sectors[sector].is_protected = set ? 1 : 0;
\r
960 fmbseb = set ? fmbseb & ~(1<<(sector-16)) :
\r
961 fmbseb | (1<<(sector-16));
\r
962 bank->sectors[sector].is_protected = set ? 1 : 0;
\r
966 /* update the protection bits */
\r
967 target_write_u32( target, 0xFFE88008, fmbsea );
\r
968 target_write_u32( target, 0xFFE8800C, fmbseb );
\r
973 /* ---------------------------------------------------------------------- */
\r
976 tms470_write( struct flash_bank_s * bank,
\r
981 target_t *target = bank->target;
\r
982 tms470_flash_bank_t *tms470_info = bank->driver_priv;
\r
983 u32 glbctrl, fmbac2, orig_fmregopt, fmbsea, fmbseb, fmmaxpp, fmmstat;
\r
984 int i, result = ERROR_OK;
\r
986 if (!tms470_info->device_ident_reg)
\r
988 tms470_read_part_info( bank );
\r
991 INFO( "Writing %d bytes starting at 0x%08x",
\r
992 count, bank->base + offset );
\r
994 /* set GLBCTRL.4 */
\r
995 target_read_u32( target, 0xFFFFFFDC, &glbctrl );
\r
996 target_write_u32( target, 0xFFFFFFDC, glbctrl | 0x10 );
\r
998 (void) tms470_flash_initialize_internal_state_machine( bank );
\r
1000 /* force max wait states */
\r
1001 target_read_u32( target, 0xFFE88004, &fmbac2 );
\r
1002 target_write_u32( target, 0xFFE88004, fmbac2 | 0xff );
\r
1004 /* save current access mode, force normal read mode */
\r
1005 target_read_u32( target, 0xFFE89C00, &orig_fmregopt );
\r
1006 target_write_u32( target, 0xFFE89C00, 0x00 );
\r
1009 * Disable Level 1 protection for all sectors to be erased/written.
\r
1011 target_read_u32( target, 0xFFE88008, &fmbsea );
\r
1012 target_write_u32( target, 0xFFE88008, 0xffff );
\r
1013 target_read_u32( target, 0xFFE8800C, &fmbseb );
\r
1014 target_write_u32( target, 0xFFE8800C, 0xffff );
\r
1017 target_read_u32( target, 0xFFE8A07C, &fmmaxpp );
\r
1019 for( i=0; i<count; i+=2 )
\r
1021 u32 addr = bank->base + offset + i;
\r
1022 u16 word = (((u16) buffer[i]) << 8) | (u16) buffer[i+1];
\r
1024 if (word != 0xffff)
\r
1026 INFO( "writing 0x%04x at 0x%08x", word, addr );
\r
1028 /* clear status register */
\r
1029 target_write_u16( target, addr, 0x0040 );
\r
1030 /* program flash command */
\r
1031 target_write_u16( target, addr, 0x0010 );
\r
1032 /* burn the 16-bit word (big-endian) */
\r
1033 target_write_u16( target, addr, word );
\r
1036 * Monitor FMMSTAT, busy until clear, then check and other flags
\r
1037 * for ultimate result of the operation.
\r
1041 target_read_u32( target, 0xFFE8BC0C, &fmmstat );
\r
1042 if (fmmstat & 0x0100)
\r
1047 while( fmmstat & 0x0100 );
\r
1049 if (fmmstat & 0x3ff)
\r
1051 ERROR( "fmstat=0x%04x", fmmstat );
\r
1052 ERROR( "Could not program word 0x%04x at address 0x%08x.",
\r
1054 result = ERROR_FLASH_OPERATION_FAILED;
\r
1060 INFO( "skipping 0xffff at 0x%08x", addr );
\r
1065 target_write_u32( target, 0xFFE88008, fmbsea );
\r
1066 target_write_u32( target, 0xFFE8800C, fmbseb );
\r
1067 target_write_u32( target, 0xFFE88004, fmbac2 );
\r
1068 target_write_u32( target, 0xFFE89C00, orig_fmregopt );
\r
1069 target_write_u32( target, 0xFFFFFFDC, glbctrl );
\r
1074 /* ---------------------------------------------------------------------- */
\r
1077 tms470_probe( struct flash_bank_s * bank )
\r
1079 tms470_flash_bank_t * tms470_info = bank->driver_priv;
\r
1081 if (!tms470_info->device_ident_reg)
\r
1083 tms470_read_part_info( bank );
\r
1089 /* ---------------------------------------------------------------------- */
\r
1092 tms470_erase_check( struct flash_bank_s * bank )
\r
1094 target_t *target = bank->target;
\r
1095 tms470_flash_bank_t * tms470_info = bank->driver_priv;
\r
1096 int sector, result = ERROR_OK;
\r
1097 u32 fmmac2, fmbac2, glbctrl, orig_fmregopt;
\r
1098 static u8 buffer[64*1024];
\r
1100 if (!tms470_info->device_ident_reg)
\r
1102 tms470_read_part_info( bank );
\r
1105 /* set GLBCTRL.4 */
\r
1106 target_read_u32( target, 0xFFFFFFDC, &glbctrl );
\r
1107 target_write_u32( target, 0xFFFFFFDC, glbctrl | 0x10 );
\r
1109 /* save current access mode, force normal read mode */
\r
1110 target_read_u32( target, 0xFFE89C00, &orig_fmregopt );
\r
1111 target_write_u32( target, 0xFFE89C00, 0x00 );
\r
1113 /* enable the appropriate bank */
\r
1114 target_read_u32( target, 0xFFE8BC04, &fmmac2 );
\r
1115 target_write_u32( target, 0xFFE8BC04,
\r
1116 (fmmac2 & ~7) | tms470_info->ordinal );
\r
1119 target_write_u32( target, 0xFFE8BC10, 0x2fc0 );
\r
1121 /* clear TEZ in fmbrdy */
\r
1122 target_write_u32( target, 0xFFE88010, 0x0b );
\r
1124 /* save current wait states, force max */
\r
1125 target_read_u32( target, 0xFFE88004, &fmbac2 );
\r
1126 target_write_u32( target, 0xFFE88004, fmbac2 | 0xff );
\r
1129 * The TI primitives inspect the flash memory by reading one 32-bit
\r
1130 * word at a time. Here we read an entire sector and inspect it in
\r
1131 * an attempt to reduce the JTAG overhead.
\r
1133 for( sector=0; sector<bank->num_sectors; sector++ )
\r
1135 if (bank->sectors[sector].is_erased != 1)
\r
1137 u32 i, addr = bank->base + bank->sectors[sector].offset;
\r
1139 INFO( "checking flash bank %d sector %d",
\r
1140 tms470_info->ordinal,
\r
1143 target_read_buffer( target,
\r
1145 bank->sectors[sector].size,
\r
1148 bank->sectors[sector].is_erased = 1;
\r
1149 for( i=0; i<bank->sectors[sector].size; i++ )
\r
1151 if (buffer[i] != 0xff)
\r
1153 WARNING( "tms470 bank %d, sector %d, not erased.",
\r
1154 tms470_info->ordinal,
\r
1156 WARNING( "at location 0x%08x: flash data is 0x%02x.",
\r
1160 bank->sectors[sector].is_erased = 0;
\r
1165 if (bank->sectors[sector].is_erased != 1)
\r
1167 result = ERROR_FLASH_SECTOR_NOT_ERASED;
\r
1172 INFO( "sector erased" );
\r
1176 /* reset TEZ, wait states, read mode, GLBCTRL.4 */
\r
1177 target_write_u32( target, 0xFFE88010, 0x0f );
\r
1178 target_write_u32( target, 0xFFE88004, fmbac2 );
\r
1179 target_write_u32( target, 0xFFE89C00, orig_fmregopt );
\r
1180 target_write_u32( target, 0xFFFFFFDC, glbctrl );
\r
1185 /* ---------------------------------------------------------------------- */
\r
1188 tms470_protect_check( struct flash_bank_s * bank )
\r
1190 target_t *target = bank->target;
\r
1191 tms470_flash_bank_t * tms470_info = bank->driver_priv;
\r
1192 int sector, result = ERROR_OK;
\r
1193 u32 fmmac2, fmbsea, fmbseb;
\r
1195 if (!tms470_info->device_ident_reg)
\r
1197 tms470_read_part_info( bank );
\r
1200 /* enable the appropriate bank */
\r
1201 target_read_u32( target, 0xFFE8BC04, &fmmac2 );
\r
1202 target_write_u32( target, 0xFFE8BC04,
\r
1203 (fmmac2 & ~7) | tms470_info->ordinal );
\r
1205 target_read_u32( target, 0xFFE88008, &fmbsea );
\r
1206 target_read_u32( target, 0xFFE8800C, &fmbseb );
\r
1208 for( sector=0; sector<bank->num_sectors; sector++ )
\r
1214 protected = fmbsea & (1<<sector) ? 0 : 1;
\r
1215 bank->sectors[sector].is_protected = protected;
\r
1219 protected = fmbseb & (1<<(sector-16)) ? 0 : 1;
\r
1220 bank->sectors[sector].is_protected = protected;
\r
1223 DEBUG( "bank %d sector %d is %s",
\r
1224 tms470_info->ordinal,
\r
1226 protected ? "protected" : "not protected" );
\r
1232 /* ---------------------------------------------------------------------- */
\r
1235 tms470_info( struct flash_bank_s * bank,
\r
1240 tms470_flash_bank_t * tms470_info = bank->driver_priv;
\r
1242 if (!tms470_info->device_ident_reg)
\r
1244 tms470_read_part_info( bank );
\r
1247 if (!tms470_info->device_ident_reg)
\r
1249 (void) snprintf(buf, buf_size, "Cannot identify target as a TMS470\n");
\r
1250 return ERROR_FLASH_OPERATION_FAILED;
\r
1253 used += snprintf( buf, buf_size,
\r
1254 "\ntms470 information: Chip is %s\n",
\r
1255 tms470_info->part_name );
\r
1259 used += snprintf( buf, buf_size,
\r
1260 "Flash protection level 2 is %s\n",
\r
1261 tms470_check_flash_unlocked( bank->target ) == ERROR_OK ? "disabled" : "enabled" );
\r
1268 /* ---------------------------------------------------------------------- */
\r
1271 * flash bank tms470 <base> <size> <chip_width> <bus_width> <target>
\r
1276 tms470_flash_bank_command( struct command_context_s *cmd_ctx,
\r
1280 struct flash_bank_s *bank )
\r
1282 bank->driver_priv = malloc( sizeof( tms470_flash_bank_t ) );
\r
1284 if (!bank->driver_priv)
\r
1286 return ERROR_FLASH_OPERATION_FAILED;
\r
1289 (void) memset( bank->driver_priv, 0, sizeof( tms470_flash_bank_t ) );
\r