1 /***************************************************************************
2 * Copyright (C) 2013 by Paul Fertser, fercerpav@gmail.com *
4 * Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
5 * Based on at91rm9200.c (c) Anders Larsen *
6 * and RPi GPIO examples by Gert van Loo & Dom *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
20 ***************************************************************************/
26 #include <jtag/interface.h>
31 uint32_t bcm2835_peri_base = 0x20000000;
32 #define BCM2835_GPIO_BASE (bcm2835_peri_base + 0x200000) /* GPIO controller */
34 #define BCM2835_PADS_GPIO_0_27 (bcm2835_peri_base + 0x100000)
35 #define BCM2835_PADS_GPIO_0_27_OFFSET (0x2c / 4)
37 /* GPIO setup macros */
38 #define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
39 #define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while (0)
40 #define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as necessary */ \
42 *(pio_base+((g)/10)) |= ((m)<<(((g)%10)*3)); } while (0)
43 #define OUT_GPIO(g) SET_MODE_GPIO(g, 1)
45 #define GPIO_SET (*(pio_base+7)) /* sets bits which are 1, ignores bits which are 0 */
46 #define GPIO_CLR (*(pio_base+10)) /* clears bits which are 1, ignores bits which are 0 */
47 #define GPIO_LEV (*(pio_base+13)) /* current level of the pin */
49 static int dev_mem_fd;
50 static volatile uint32_t *pio_base;
52 static bb_value_t bcm2835gpio_read(void);
53 static int bcm2835gpio_write(int tck, int tms, int tdi);
54 static int bcm2835gpio_reset(int trst, int srst);
56 static int bcm2835_swdio_read(void);
57 static void bcm2835_swdio_drive(bool is_output);
59 static int bcm2835gpio_init(void);
60 static int bcm2835gpio_quit(void);
62 static struct bitbang_interface bcm2835gpio_bitbang = {
63 .read = bcm2835gpio_read,
64 .write = bcm2835gpio_write,
65 .reset = bcm2835gpio_reset,
66 .swdio_read = bcm2835_swdio_read,
67 .swdio_drive = bcm2835_swdio_drive,
71 /* GPIO numbers for each signal. Negative values are invalid */
72 static int tck_gpio = -1;
73 static int tck_gpio_mode;
74 static int tms_gpio = -1;
75 static int tms_gpio_mode;
76 static int tdi_gpio = -1;
77 static int tdi_gpio_mode;
78 static int tdo_gpio = -1;
79 static int tdo_gpio_mode;
80 static int trst_gpio = -1;
81 static int trst_gpio_mode;
82 static int srst_gpio = -1;
83 static int srst_gpio_mode;
84 static int swclk_gpio = -1;
85 static int swclk_gpio_mode;
86 static int swdio_gpio = -1;
87 static int swdio_gpio_mode;
89 /* Transition delay coefficients */
90 static int speed_coeff = 113714;
91 static int speed_offset = 28;
92 static unsigned int jtag_delay;
94 static bb_value_t bcm2835gpio_read(void)
96 return (GPIO_LEV & 1<<tdo_gpio) ? BB_HIGH : BB_LOW;
99 static int bcm2835gpio_write(int tck, int tms, int tdi)
101 uint32_t set = tck<<tck_gpio | tms<<tms_gpio | tdi<<tdi_gpio;
102 uint32_t clear = !tck<<tck_gpio | !tms<<tms_gpio | !tdi<<tdi_gpio;
107 for (unsigned int i = 0; i < jtag_delay; i++)
113 static int bcm2835gpio_swd_write(int tck, int tms, int tdi)
115 uint32_t set = tck<<swclk_gpio | tdi<<swdio_gpio;
116 uint32_t clear = !tck<<swclk_gpio | !tdi<<swdio_gpio;
121 for (unsigned int i = 0; i < jtag_delay; i++)
127 /* (1) assert or (0) deassert reset lines */
128 static int bcm2835gpio_reset(int trst, int srst)
134 set |= !trst<<trst_gpio;
135 clear |= trst<<trst_gpio;
139 set |= !srst<<srst_gpio;
140 clear |= srst<<srst_gpio;
149 static void bcm2835_swdio_drive(bool is_output)
152 OUT_GPIO(swdio_gpio);
154 INP_GPIO(swdio_gpio);
157 static int bcm2835_swdio_read(void)
159 return !!(GPIO_LEV & 1 << swdio_gpio);
162 static int bcm2835gpio_khz(int khz, int *jtag_speed)
165 LOG_DEBUG("RCLK not supported");
168 *jtag_speed = speed_coeff/khz - speed_offset;
174 static int bcm2835gpio_speed_div(int speed, int *khz)
176 *khz = speed_coeff/(speed + speed_offset);
180 static int bcm2835gpio_speed(int speed)
186 static int is_gpio_valid(int gpio)
188 return gpio >= 0 && gpio <= 53;
191 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionums)
194 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
195 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio);
196 COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio);
197 COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio);
198 } else if (CMD_ARGC != 0) {
199 return ERROR_COMMAND_SYNTAX_ERROR;
202 command_print(CMD_CTX,
203 "BCM2835 GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
204 tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
209 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tck)
212 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
214 command_print(CMD_CTX, "BCM2835 GPIO config: tck = %d", tck_gpio);
218 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tms)
221 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tms_gpio);
223 command_print(CMD_CTX, "BCM2835 GPIO config: tms = %d", tms_gpio);
227 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdo)
230 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdo_gpio);
232 command_print(CMD_CTX, "BCM2835 GPIO config: tdo = %d", tdo_gpio);
236 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdi)
239 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdi_gpio);
241 command_print(CMD_CTX, "BCM2835 GPIO config: tdi = %d", tdi_gpio);
245 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_srst)
248 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], srst_gpio);
250 command_print(CMD_CTX, "BCM2835 GPIO config: srst = %d", srst_gpio);
254 COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_trst)
257 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], trst_gpio);
259 command_print(CMD_CTX, "BCM2835 GPIO config: trst = %d", trst_gpio);
263 COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionums)
266 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
267 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
268 } else if (CMD_ARGC != 0) {
269 return ERROR_COMMAND_SYNTAX_ERROR;
272 command_print(CMD_CTX,
273 "BCM2835 GPIO nums: swclk = %d, swdio = %d",
274 swclk_gpio, swdio_gpio);
279 COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swclk)
282 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
284 command_print(CMD_CTX, "BCM2835 num: swclk = %d", swclk_gpio);
288 COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio)
291 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
293 command_print(CMD_CTX, "BCM2835 num: swdio = %d", swdio_gpio);
297 COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs)
300 COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], speed_coeff);
301 COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], speed_offset);
306 COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base)
309 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], bcm2835_peri_base);
313 static const struct command_registration bcm2835gpio_command_handlers[] = {
315 .name = "bcm2835gpio_jtag_nums",
316 .handler = &bcm2835gpio_handle_jtag_gpionums,
317 .mode = COMMAND_CONFIG,
318 .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)",
319 .usage = "(tck tms tdi tdo)* ",
322 .name = "bcm2835gpio_tck_num",
323 .handler = &bcm2835gpio_handle_jtag_gpionum_tck,
324 .mode = COMMAND_CONFIG,
325 .help = "gpio number for tck.",
328 .name = "bcm2835gpio_tms_num",
329 .handler = &bcm2835gpio_handle_jtag_gpionum_tms,
330 .mode = COMMAND_CONFIG,
331 .help = "gpio number for tms.",
334 .name = "bcm2835gpio_tdo_num",
335 .handler = &bcm2835gpio_handle_jtag_gpionum_tdo,
336 .mode = COMMAND_CONFIG,
337 .help = "gpio number for tdo.",
340 .name = "bcm2835gpio_tdi_num",
341 .handler = &bcm2835gpio_handle_jtag_gpionum_tdi,
342 .mode = COMMAND_CONFIG,
343 .help = "gpio number for tdi.",
346 .name = "bcm2835gpio_swd_nums",
347 .handler = &bcm2835gpio_handle_swd_gpionums,
348 .mode = COMMAND_CONFIG,
349 .help = "gpio numbers for swclk, swdio. (in that order)",
350 .usage = "(swclk swdio)* ",
353 .name = "bcm2835gpio_swclk_num",
354 .handler = &bcm2835gpio_handle_swd_gpionum_swclk,
355 .mode = COMMAND_CONFIG,
356 .help = "gpio number for swclk.",
359 .name = "bcm2835gpio_swdio_num",
360 .handler = &bcm2835gpio_handle_swd_gpionum_swdio,
361 .mode = COMMAND_CONFIG,
362 .help = "gpio number for swdio.",
365 .name = "bcm2835gpio_srst_num",
366 .handler = &bcm2835gpio_handle_jtag_gpionum_srst,
367 .mode = COMMAND_CONFIG,
368 .help = "gpio number for srst.",
371 .name = "bcm2835gpio_trst_num",
372 .handler = &bcm2835gpio_handle_jtag_gpionum_trst,
373 .mode = COMMAND_CONFIG,
374 .help = "gpio number for trst.",
377 .name = "bcm2835gpio_speed_coeffs",
378 .handler = &bcm2835gpio_handle_speed_coeffs,
379 .mode = COMMAND_CONFIG,
380 .help = "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
383 .name = "bcm2835gpio_peripheral_base",
384 .handler = &bcm2835gpio_handle_peripheral_base,
385 .mode = COMMAND_CONFIG,
386 .help = "peripheral base to access GPIOs (RPi1 0x20000000, RPi2 0x3F000000).",
389 COMMAND_REGISTRATION_DONE
392 static const char * const bcm2835_transports[] = { "jtag", "swd", NULL };
394 struct jtag_interface bcm2835gpio_interface = {
395 .name = "bcm2835gpio",
396 .supported = DEBUG_CAP_TMS_SEQ,
397 .execute_queue = bitbang_execute_queue,
398 .transports = bcm2835_transports,
400 .speed = bcm2835gpio_speed,
401 .khz = bcm2835gpio_khz,
402 .speed_div = bcm2835gpio_speed_div,
403 .commands = bcm2835gpio_command_handlers,
404 .init = bcm2835gpio_init,
405 .quit = bcm2835gpio_quit,
408 static bool bcm2835gpio_jtag_mode_possible(void)
410 if (!is_gpio_valid(tck_gpio))
412 if (!is_gpio_valid(tms_gpio))
414 if (!is_gpio_valid(tdi_gpio))
416 if (!is_gpio_valid(tdo_gpio))
421 static bool bcm2835gpio_swd_mode_possible(void)
423 if (!is_gpio_valid(swclk_gpio))
425 if (!is_gpio_valid(swdio_gpio))
430 static int bcm2835gpio_init(void)
432 bitbang_interface = &bcm2835gpio_bitbang;
434 LOG_INFO("BCM2835 GPIO JTAG/SWD bitbang driver");
436 if (bcm2835gpio_jtag_mode_possible()) {
437 if (bcm2835gpio_swd_mode_possible())
438 LOG_INFO("JTAG and SWD modes enabled");
440 LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)");
441 } else if (bcm2835gpio_swd_mode_possible()) {
442 LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)");
444 LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode");
445 return ERROR_JTAG_INIT_FAILED;
448 dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
449 if (dev_mem_fd < 0) {
451 return ERROR_JTAG_INIT_FAILED;
454 pio_base = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
455 MAP_SHARED, dev_mem_fd, BCM2835_GPIO_BASE);
457 if (pio_base == MAP_FAILED) {
460 return ERROR_JTAG_INIT_FAILED;
463 static volatile uint32_t *pads_base;
464 pads_base = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
465 MAP_SHARED, dev_mem_fd, BCM2835_PADS_GPIO_0_27);
467 if (pads_base == MAP_FAILED) {
470 return ERROR_JTAG_INIT_FAILED;
473 /* set 4mA drive strength, slew rate limited, hysteresis on */
474 pads_base[BCM2835_PADS_GPIO_0_27_OFFSET] = 0x5a000008 + 1;
476 tdo_gpio_mode = MODE_GPIO(tdo_gpio);
477 tdi_gpio_mode = MODE_GPIO(tdi_gpio);
478 tck_gpio_mode = MODE_GPIO(tck_gpio);
479 tms_gpio_mode = MODE_GPIO(tms_gpio);
480 swclk_gpio_mode = MODE_GPIO(swclk_gpio);
481 swdio_gpio_mode = MODE_GPIO(swdio_gpio);
483 * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
484 * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
488 GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio | 1<<swdio_gpio | 1<<swclk_gpio;
489 GPIO_SET = 1<<tms_gpio;
494 OUT_GPIO(swclk_gpio);
495 OUT_GPIO(swdio_gpio);
496 if (trst_gpio != -1) {
497 trst_gpio_mode = MODE_GPIO(trst_gpio);
498 GPIO_SET = 1 << trst_gpio;
501 if (srst_gpio != -1) {
502 srst_gpio_mode = MODE_GPIO(srst_gpio);
503 GPIO_SET = 1 << srst_gpio;
507 LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d "
508 "tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode,
509 tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode);
512 bcm2835gpio_bitbang.write = bcm2835gpio_swd_write;
513 bitbang_switch_to_swd();
519 static int bcm2835gpio_quit(void)
521 SET_MODE_GPIO(tdo_gpio, tdo_gpio_mode);
522 SET_MODE_GPIO(tdi_gpio, tdi_gpio_mode);
523 SET_MODE_GPIO(tck_gpio, tck_gpio_mode);
524 SET_MODE_GPIO(tms_gpio, tms_gpio_mode);
525 SET_MODE_GPIO(swclk_gpio, swclk_gpio_mode);
526 SET_MODE_GPIO(swdio_gpio, swdio_gpio_mode);
528 SET_MODE_GPIO(trst_gpio, trst_gpio_mode);
530 SET_MODE_GPIO(srst_gpio, srst_gpio_mode);