1 Some outstanding issues w.r.t. non-ARM32 targets
2 ================================================
3 This file describes outstanding issues w.r.t.
6 Ideas & patches welcome!
13 The flash drivers contain ARM32 code that is used
14 to execute code on the target.
16 This needs to be handled in some CPU independent
19 The ocl and ecos flash drivers compile the flash
20 driver code to run on the target on the developer
23 The ocl and ecos flash drivers should be unified
24 and instructions should be written on how to
25 compile the target flash drivers. Perhaps
30 eCos has CFI driver that could probably be compiled
31 for all targets. The trick is to figure out a
32 way to make the compiled flash drivers work
33 on all target memory maps + sort out all the
38 Currently OpenOCD only supports 32 bit targets.
40 Adding 64 bit support would be nice but there
41 hasn't been any call for it in the openocd development
46 target.h is relatively CPU agnostic and
47 the intention is to move in the direction of less
48 instruction set specific.
50 Non-CPU targets are also supported, but there isn't
51 a lot of activity on it in the mailing list currently.
52 An example is FPGA programming support via JTAG,
53 but also flash chips can be programmed directly
56 non-JTAG physical layer
57 -----------------------
58 JTAG is not the only physical protocol used to talk to
61 OpenOCD does not today have targets that use non-JTAG.
63 The actual physical layer is a relatively modest part
64 of the total OpenOCD system.
69 there exists open source implementations of powerpc
70 target manipulation, but there hasn't been a lot
71 of activity in the mailing list.
75 Currently OpenOCD has a MIPS target defined. This is the
76 first non-ARM example of a CPU target