1 Some outstanding issues w.r.t. non-ARM32 targets
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2 ================================================
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3 This file describes outstanding issues w.r.t.
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6 Ideas & patches welcome!
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13 The flash drivers contain ARM32 code that is used
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14 to execute code on the target.
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16 This needs to be handled in some CPU independent
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19 The ocl and ecos flash drivers compile the flash
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20 driver code to run on the target on the developer
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23 The ocl and ecos flash drivers should be unified
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24 and instructions should be written on how to
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25 compile the target flash drivers. Perhaps
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30 eCos has CFI driver that could probably be compiled
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31 for all targets. The trick is to figure out a
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32 way to make the compiled flash drivers work
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33 on all target memory maps + sort out all the
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38 Currently OpenOCD only supports 32 bit targets.
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40 Adding 64 bit support would be nice but there
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41 hasn't been any call for it in the openocd development
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46 target.h is relatively CPU agnostic and
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47 the intention is to move in the direction of less
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48 instruction set specific.
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50 Non-CPU targets are also supported, but there isn't
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51 a lot of activity on it in the mailing list currently.
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52 An example is FPGA programming support via JTAG,
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53 but also flash chips can be programmed directly
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56 non-JTAG physical layer
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57 -----------------------
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58 JTAG is not the only physical protocol used to talk to
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61 OpenOCD does not today have targets that use non-JTAG.
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63 The actual physical layer is a relatively modest part
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64 of the total OpenOCD system.
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69 there exists open source implementations of powerpc
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70 target manipulation, but there hasn't been a lot
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71 of activity in the mailing list.
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75 Currently OpenOCD has a MIPS target defined. This is the
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76 first non-ARM example of a CPU target