]> git.sur5r.net Git - cc65/blob - src/sim65/chips/ram.c
Working
[cc65] / src / sim65 / chips / ram.c
1 /*****************************************************************************/
2 /*                                                                           */
3 /*                                   ram.c                                   */
4 /*                                                                           */
5 /*                  RAM plugin for the sim65 6502 simulator                  */
6 /*                                                                           */
7 /*                                                                           */
8 /*                                                                           */
9 /* (C) 2002      Ullrich von Bassewitz                                       */
10 /*               Wacholderweg 14                                             */
11 /*               D-70597 Stuttgart                                           */
12 /* EMail:        uz@musoftware.de                                            */
13 /*                                                                           */
14 /*                                                                           */
15 /* This software is provided 'as-is', without any expressed or implied       */
16 /* warranty.  In no event will the authors be held liable for any damages    */
17 /* arising from the use of this software.                                    */
18 /*                                                                           */
19 /* Permission is granted to anyone to use this software for any purpose,     */
20 /* including commercial applications, and to alter it and redistribute it    */
21 /* freely, subject to the following restrictions:                            */
22 /*                                                                           */
23 /* 1. The origin of this software must not be misrepresented; you must not   */
24 /*    claim that you wrote the original software. If you use this software   */
25 /*    in a product, an acknowledgment in the product documentation would be  */
26 /*    appreciated but is not required.                                       */
27 /* 2. Altered source versions must be plainly marked as such, and must not   */
28 /*    be misrepresented as being the original software.                      */
29 /* 3. This notice may not be removed or altered from any source              */
30 /*    distribution.                                                          */
31 /*                                                                           */
32 /*****************************************************************************/
33
34
35
36 #include <stdlib.h>
37 #include <string.h>
38
39 /* sim65 */
40 #include "chipif.h"
41
42
43
44 /*****************************************************************************/
45 /*                                   Forwards                                */
46 /*****************************************************************************/
47
48
49
50 int InitChip (const struct SimData* Data);
51 /* Initialize the chip, return an error code */
52
53 static void* InitInstance (unsigned Addr, unsigned Range);
54 /* Initialize a new chip instance */
55
56 static void WriteCtrl (void* Data, unsigned Offs, unsigned char Val);
57 /* Write control data */
58
59 static void Write (void* Data, unsigned Offs, unsigned char Val);
60 /* Write user data */
61
62 static unsigned char ReadCtrl (void* Data, unsigned Offs);
63 /* Read control data */
64
65 static unsigned char Read (void* Data, unsigned Offs);
66 /* Read user data */
67
68
69
70 /*****************************************************************************/
71 /*                                     Data                                  */
72 /*****************************************************************************/
73
74
75
76 /* Control data passed to the main program */
77 static const struct ChipData RAMData[1] = {
78     {
79         "RAM",                  /* Name of the chip */
80         CHIPDATA_VER_MAJOR,     /* Version information */
81         CHIPDATA_VER_MINOR,
82
83         /* -- Exported functions -- */
84         InitChip,
85         InitInstance,
86         WriteCtrl,
87         Write,
88         ReadCtrl,
89         Read
90     }
91 };
92
93 /* The SimData pointer we get when InitChip is called */
94 static const SimData* Sim;
95
96 /* Possible RAM attributes */
97 #define ATTR_INITIALIZED        0x01    /* RAM cell is intialized */
98 #define ATTR_WPROT              0x02    /* RAM cell is write protected */
99
100 /* Data for one RAM instance */
101 typedef struct InstanceData InstanceData;
102 struct InstanceData {
103     unsigned            BaseAddr;       /* Base address */
104     unsigned            Range;          /* Memory range */
105     unsigned char*      MemAttr;        /* Memory attributes */
106     unsigned char*      Mem;            /* The memory itself */
107 };
108
109
110
111 /*****************************************************************************/
112 /*                               Exported function                           */
113 /*****************************************************************************/
114
115
116
117 int GetChipData (const ChipData** Data, unsigned* Count)
118 {
119     /* Pass the control structure to the caller */
120     *Data = RAMData;
121     *Count = sizeof (Data) / sizeof (Data[0]);
122
123     /* Call was successful */
124     return 0;
125 }
126
127
128
129 /*****************************************************************************/
130 /*                                     Code                                  */
131 /*****************************************************************************/
132
133
134
135 int InitChip (const struct SimData* Data)
136 /* Initialize the chip, return an error code */
137 {
138     /* Remember the pointer */
139     Sim = Data;
140
141     /* Always successful */
142     return 0;
143 }
144
145
146
147 static void* InitInstance (unsigned Addr, unsigned Range)
148 /* Initialize a new chip instance */
149 {
150     /* Allocate a new instance structure */
151     InstanceData* D = Sim->Malloc (sizeof (InstanceData));
152
153     /* Initialize the structure, allocate RAM and attribute memory */
154     D->BaseAddr = Addr;
155     D->Range    = Range;
156     D->MemAttr  = Sim->Malloc (Range * sizeof (D->MemAttr[0]));
157     D->Mem      = Sim->Malloc (Range * sizeof (D->Mem[0]));
158
159     /* Clear the RAM and attribute memory */
160     memset (D->MemAttr, 0, Range * sizeof (D->MemAttr[0]));
161     memset (D->Mem, 0, Range * sizeof (D->Mem[0]));
162
163     /* Done, return the instance data */
164     return D;
165 }
166
167
168
169 static void WriteCtrl (void* Data, unsigned Offs, unsigned char Val)
170 /* Write control data */
171 {
172     /* Cast the data pointer */
173     InstanceData* D = (InstanceData*) Data;
174
175     /* Do the write and remember the cell as initialized */
176     D->Mem[Offs] = Val;
177     D->MemAttr[Offs] |= ATTR_INITIALIZED;
178 }
179
180
181
182 static void Write (void* Data, unsigned Offs, unsigned char Val)
183 /* Write user data */
184 {
185     /* Cast the data pointer */
186     InstanceData* D = (InstanceData*) Data;
187
188     /* Check for a write to a write protected cell */
189     if (D->MemAttr[Offs] & ATTR_WPROT) {
190         Sim->Warning ("Writing to write protected memory at $%04X", D->BaseAddr+Offs);
191     }
192
193     /* Do the write and remember the cell as initialized */
194     D->Mem[Offs] = Val;
195     D->MemAttr[Offs] |= ATTR_INITIALIZED;
196 }
197
198
199
200 static unsigned char ReadCtrl (void* Data, unsigned Offs)
201 /* Read control data */
202 {
203     /* Cast the data pointer */
204     InstanceData* D = (InstanceData*) Data;
205
206     /* Read the cell and return the value */
207     return D->Mem[Offs];
208 }
209
210
211
212 static unsigned char Read (void* Data, unsigned Offs)
213 /* Read user data */
214 {
215     /* Cast the data pointer */
216     InstanceData* D = (InstanceData*) Data;
217
218     /* Check for a read from an uninitialized cell */
219     if ((D->MemAttr[Offs] & ATTR_INITIALIZED) == 0) {
220         /* We're reading a memory cell that was never written to */
221         Sim->Warning ("Reading from uninitialized memory at $%04X", D->BaseAddr+Offs);
222     }
223
224     /* Read the cell and return the value */
225     return D->Mem[Offs];
226 }
227
228
229
230