2 * Copyright (C) 2009 by David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the
16 * Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 * This is the interface to the Debug Programmers Model for ARMv6 and
26 * ARMv7 processors. ARMv6 processors (such as ARM11xx implementations)
27 * introduced a model which became part of the ARMv7-AR architecture
28 * which is most familiar through the Cortex-A series parts. While
29 * specific details differ (like how to write the instruction register),
30 * the high level models easily support shared code because those
31 * registers are compatible.
35 * This wraps an implementation of DPM primitives. Each interface
36 * provider supplies a structure like this, which is the glue between
37 * upper level code and the lower level hardware access.
39 * It is a PRELIMINARY AND INCOMPLETE set of primitives, starting with
40 * support for CPU register access.
48 /** Invoke before a series of instruction operations */
49 int (*prepare)(struct arm_dpm *);
51 /** Invoke after a series of instruction operations */
52 int (*finish)(struct arm_dpm *);
56 /** Runs one instruction, writing data to DCC before execution. */
57 int (*instr_write_data_dcc)(struct arm_dpm *,
58 uint32_t opcode, uint32_t data);
60 /** Runs one instruction, writing data to R0 before execution. */
61 int (*instr_write_data_r0)(struct arm_dpm *,
62 uint32_t opcode, uint32_t data);
64 /** Optional core-specific operation invoked after CPSR writes. */
65 int (*instr_cpsr_sync)(struct arm_dpm *dpm);
69 /** Runs one instruction, reading data from dcc after execution. */
70 int (*instr_read_data_dcc)(struct arm_dpm *,
71 uint32_t opcode, uint32_t *data);
73 /** Runs one instruction, reading data from r0 after execution. */
74 int (*instr_read_data_r0)(struct arm_dpm *,
75 uint32_t opcode, uint32_t *data);
77 // FIXME -- add breakpoint support
79 // FIXME -- add watchpoint support (including context-sensitive ones)
81 // FIXME -- read/write DCSR methods and symbols
84 int arm_dpm_setup(struct arm_dpm *dpm);
85 int arm_dpm_reinitialize(struct arm_dpm *dpm);
87 int arm_dpm_read_current_registers(struct arm_dpm *);
88 int arm_dpm_write_dirty_registers(struct arm_dpm *);
90 #endif /* __ARM_DPM_H */