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[openocd] / src / target / armv7m.h
1 /***************************************************************************
2  *   Copyright (C) 2005 by Dominic Rath                                    *
3  *   Dominic.Rath@gmx.de                                                   *
4  *                                                                         *
5  *   Copyright (C) 2006 by Magnus Lundin                                   *
6  *   lundin@mlu.mine.nu                                                    *
7  *                                                                         *
8  *   Copyright (C) 2008 by Spencer Oliver                                  *
9  *   spen@spen-soft.co.uk                                                  *
10  *                                                                         *
11  *   This program is free software; you can redistribute it and/or modify  *
12  *   it under the terms of the GNU General Public License as published by  *
13  *   the Free Software Foundation; either version 2 of the License, or     *
14  *   (at your option) any later version.                                   *
15  *                                                                         *
16  *   This program is distributed in the hope that it will be useful,       *
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
19  *   GNU General Public License for more details.                          *
20  *                                                                         *
21  *   You should have received a copy of the GNU General Public License     *
22  *   along with this program; if not, write to the                         *
23  *   Free Software Foundation, Inc.,                                       *
24  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
25  ***************************************************************************/
26 #ifndef ARMV7M_COMMON_H
27 #define ARMV7M_COMMON_H
28
29 #include "arm_adi_v5.h"
30 #include "arm.h"
31
32 /* define for enabling armv7 gdb workarounds */
33 #if 1
34 #define ARMV7_GDB_HACKS
35 #endif
36
37 #ifdef ARMV7_GDB_HACKS
38 extern uint8_t armv7m_gdb_dummy_cpsr_value[];
39 extern struct reg armv7m_gdb_dummy_cpsr_reg;
40 #endif
41
42
43 enum armv7m_mode
44 {
45         ARMV7M_MODE_THREAD = 0,
46         ARMV7M_MODE_USER_THREAD = 1,
47         ARMV7M_MODE_HANDLER = 2,
48         ARMV7M_MODE_ANY = -1
49 };
50
51 extern char *armv7m_mode_strings[];
52 extern const int armv7m_psp_reg_map[];
53 extern const int armv7m_msp_reg_map[];
54
55 enum armv7m_regtype
56 {
57         ARMV7M_REGISTER_CORE_GP,
58         ARMV7M_REGISTER_CORE_SP,
59         ARMV7M_REGISTER_MEMMAP
60 };
61
62 char *armv7m_exception_string(int number);
63
64 /* offsets into armv7m core register cache */
65 enum
66 {
67         /* for convenience, the first set of indices match
68          * the Cortex-M3 DCRSR selectors
69          */
70         ARMV7M_R0,
71         ARMV7M_R1,
72         ARMV7M_R2,
73         ARMV7M_R3,
74
75         ARMV7M_R4,
76         ARMV7M_R5,
77         ARMV7M_R6,
78         ARMV7M_R7,
79
80         ARMV7M_R8,
81         ARMV7M_R9,
82         ARMV7M_R10,
83         ARMV7M_R11,
84
85         ARMV7M_R12,
86         ARMV7M_R13,
87         ARMV7M_R14,
88         ARMV7M_PC = 15,
89
90         ARMV7M_xPSR = 16,
91         ARMV7M_MSP,
92         ARMV7M_PSP,
93
94         /* this next set of indices is arbitrary */
95         ARMV7M_PRIMASK,
96         ARMV7M_BASEPRI,
97         ARMV7M_FAULTMASK,
98         ARMV7M_CONTROL,
99 };
100
101 #define ARMV7M_COMMON_MAGIC 0x2A452A45
102
103 struct armv7m_common
104 {
105         struct arm      arm;
106
107         int common_magic;
108         struct reg_cache *core_cache;
109         enum armv7m_mode core_mode;
110         int exception_number;
111         struct adiv5_dap dap;
112
113         uint32_t demcr;
114
115         /* Direct processor core register read and writes */
116         int (*load_core_reg_u32)(struct target *target,
117                 enum armv7m_regtype type, uint32_t num, uint32_t *value);
118         int (*store_core_reg_u32)(struct target *target,
119                 enum armv7m_regtype type, uint32_t num, uint32_t value);
120
121         /* register cache to processor synchronization */
122         int (*read_core_reg)(struct target *target, unsigned num);
123         int (*write_core_reg)(struct target *target, unsigned num);
124
125         int (*examine_debug_reason)(struct target *target);
126         int (*post_debug_entry)(struct target *target);
127
128         void (*pre_restore_context)(struct target *target);
129 };
130
131 static inline struct armv7m_common *
132 target_to_armv7m(struct target *target)
133 {
134         return container_of(target->arch_info, struct armv7m_common, arm);
135 }
136
137 static inline bool is_armv7m(struct armv7m_common *armv7m)
138 {
139         return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
140 }
141
142 struct armv7m_algorithm
143 {
144         int common_magic;
145
146         enum armv7m_mode core_mode;
147
148         uint32_t context[ARMV7M_CONTROL + 1]; //ARMV7M_NUM_REGS
149 };
150
151 struct armv7m_core_reg
152 {
153         uint32_t num;
154         enum armv7m_regtype type;
155         struct target *target;
156         struct armv7m_common *armv7m_common;
157 };
158
159 struct reg_cache *armv7m_build_reg_cache(struct target *target);
160 enum armv7m_mode armv7m_number_to_mode(int number);
161 int armv7m_mode_to_number(enum armv7m_mode mode);
162
163 int armv7m_arch_state(struct target *target);
164 int armv7m_get_gdb_reg_list(struct target *target,
165                 struct reg **reg_list[], int *reg_list_size);
166
167 int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
168
169 int armv7m_run_algorithm(struct target *target,
170                 int num_mem_params, struct mem_param *mem_params,
171                 int num_reg_params, struct reg_param *reg_params,
172                 uint32_t entry_point, uint32_t exit_point,
173                 int timeout_ms, void *arch_info);
174
175 int armv7m_start_algorithm(struct target *target,
176                 int num_mem_params, struct mem_param *mem_params,
177                 int num_reg_params, struct reg_param *reg_params,
178                 uint32_t entry_point, uint32_t exit_point,
179                 void *arch_info);
180
181 int armv7m_wait_algorithm(struct target *target,
182                 int num_mem_params, struct mem_param *mem_params,
183                 int num_reg_params, struct reg_param *reg_params,
184                 uint32_t exit_point, int timeout_ms,
185                 void *arch_info);
186
187 int armv7m_invalidate_core_regs(struct target *target);
188
189 int armv7m_restore_context(struct target *target);
190
191 int armv7m_checksum_memory(struct target *target,
192                 uint32_t address, uint32_t count, uint32_t* checksum);
193 int armv7m_blank_check_memory(struct target *target,
194                 uint32_t address, uint32_t count, uint32_t* blank);
195
196 int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
197
198 extern const struct command_registration armv7m_command_handlers[];
199
200 #endif /* ARMV7M_H */