git.sur5r.net Git - openocd/blob - src/target/etb.h

   1 /***************************************************************************
   2  *   Copyright (C) 2007 by Dominic Rath                                    *
   3  *   Dominic.Rath@gmx.de                                                   *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20 #ifndef ETB_H
  21 #define ETB_H
  22
  23 #include "command.h"
  24 #include "target.h"
  25 #include "register.h"
  26 #include "arm_jtag.h"
  27
  28 #include "etb.h"
  29 #include "etm.h"
  30
  31 /* ETB registers */
  32 enum
  33 {
  34         ETB_ID = 0x00,
  35         ETB_RAM_DEPTH = 0x01,
  36         ETB_RAM_WIDTH = 0x02,
  37         ETB_STATUS = 0x03,
  38         ETB_RAM_DATA = 0x04,
  39         ETB_RAM_READ_POINTER = 0x05,
  40         ETB_RAM_WRITE_POINTER = 0x06,
  41         ETB_TRIGGER_COUNTER = 0x07,
  42         ETB_CTRL = 0x08,
  43 };
  44
  45 typedef struct etb_s
  46 {
  47         etm_context_t *etm_ctx;
  48         jtag_tap_t *tap;
  49         int cur_scan_chain;
  50         reg_cache_t *reg_cache;
  51
  52         /* ETB parameters */
  53         int ram_depth;
  54         int ram_width;
  55 } etb_t;
  56
  57 typedef struct etb_reg_s
  58 {
  59         int addr;
  60         etb_t *etb;
  61 } etb_reg_t;
  62
  63 extern etm_capture_driver_t etb_capture_driver;
  64
  65 extern reg_cache_t* etb_build_reg_cache(etb_t *etb);
  66 extern int etb_read_reg(reg_t *reg);
  67 extern int etb_write_reg(reg_t *reg, u32 value);
  68 extern int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
  69 extern int etb_store_reg(reg_t *reg);
  70 extern int etb_set_reg(reg_t *reg, u32 value);
  71 extern int etb_set_reg_w_exec(reg_t *reg, u8 *buf);
  72
  73 extern int etb_register_commands(struct command_context_s *cmd_ctx);
  74
  75 #endif /* ETB_H */