1 mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
2 mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
4 mww 0xfffffc20 0x00004001 # CKGR_MOR : enable the main oscillator
6 mww 0xfffffc30 0x00000001 # PMC_MCKR : switch to main oscillator
8 mww 0xfffffc28 0x2060bf09 # CKGR_PLLAR: Set PLLA Register for 198,656MHz
10 mww 0xfffffc30 0x00000101 # PMC_MCKR : Select prescaler
12 mww 0xfffffc30 0x00000102 # PMC_MCKR : Clock from PLLA is selected
15 jtag_speed 0 # Increase JTAG Speed to 6 MHz
16 arm7_9 dcc_downloads enable # Enable faster DCC downloads
18 mww 0xffffec00 0x01020102 # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
19 mww 0xffffec04 0x09070806 # SMC_PULSE0
20 mww 0xffffec08 0x000d000b # SMC_CYCLE0
21 mww 0xffffec0c 0x00001003 # SMC_MODE0
23 flash probe 0 # Identify flash bank 0
25 mww 0xfffff870 0xffff0000 # PIO_ASR : Select peripheral function for D15..D31
26 mww 0xfffff804 0xffff0000 # PIO_PDR : Disable PIO function for D15..D31
28 mww 0xffffef1c 0x2 # EBI_CSA : Assign EBI Chip Select 1 to SDRAM
30 #mww 0xffffea08 0x85227259 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S561632H-UC75 : 4M x 16Bit x 4 Banks)
31 mww 0xffffea08 0x85227254 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S641632H-UC75 : 1M x 16Bit x 4 Banks)
33 mww 0xffffea00 0x1 # SDRAMC_MR : issue a NOP command
35 mww 0xffffea00 0x2 # SDRAMC_MR : issue an 'All Banks Precharge' command
37 mww 0xffffea00 0x4 # SDRAMC_MR : issue 8 x 'Auto-Refresh' Command
53 mww 0xffffea00 0x3 # SDRAMC_MR : issue a 'Load Mode Register' command
55 mww 0xffffea00 0x0 # SDRAMC_MR : normal mode
57 mww 0xffffea04 0x5d2 # SDRAMC_TR : Set refresh timer count to 15us