git.sur5r.net Git - openocd/blob - src/target/nds32_disassembler.c

   1 /***************************************************************************
   2  *   Copyright (C) 2013 Andes Technology                                   *
   3  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20
  21 #ifdef HAVE_CONFIG_H
  22 #include "config.h"
  23 #endif
  24
  25 #include <helper/log.h>
  26 #include <target/target.h>
  27 #include "nds32_disassembler.h"
  28
  29 static const int enable4_bits[] = {0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4};
  30
  31 int nds32_read_opcode(struct nds32 *nds32, uint32_t address, uint32_t *value)
  32 {
  33         struct target *target = nds32->target;
  34         uint8_t value_buf[4];
  35
  36         if (!target_was_examined(target)) {
  37                 LOG_ERROR("Target not examined yet");
  38                 return ERROR_FAIL;
  39         }
  40
  41         int retval = target_read_buffer(target, address, 4, value_buf);
  42
  43         if (retval == ERROR_OK) {
  44                 /* instructions are always big-endian */
  45                 *value = be_to_h_u32(value_buf);
  46
  47                 LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx32 "",
  48                                 address,
  49                                 *value);
  50         } else {
  51                 *value = 0x0;
  52                 LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
  53                                 address);
  54         }
  55
  56         return retval;
  57 }
  58
  59 static int nds32_parse_type_0(uint32_t opcode, int32_t *imm)
  60 {
  61         *imm = opcode & 0x1FFFFFF;
  62
  63         return ERROR_OK;
  64 }
  65
  66 static int nds32_parse_type_1(uint32_t opcode, uint8_t *rt, int32_t *imm)
  67 {
  68         *rt = (opcode >> 20) & 0x1F;
  69         *imm = opcode & 0xFFFFF;
  70
  71         return ERROR_OK;
  72 }
  73
  74 static int nds32_parse_type_2(uint32_t opcode, uint8_t *rt, uint8_t *ra, int32_t *imm)
  75 {
  76         *rt = (opcode >> 20) & 0x1F;
  77         *ra = (opcode >> 15) & 0x1F;
  78         *imm = opcode & 0x7FFF;
  79
  80         return ERROR_OK;
  81 }
  82
  83 static int nds32_parse_type_3(uint32_t opcode, uint8_t *rt, uint8_t *ra,
  84                 uint8_t *rb, int32_t *imm)
  85 {
  86         *rt = (opcode >> 20) & 0x1F;
  87         *ra = (opcode >> 15) & 0x1F;
  88         *rb = (opcode >> 10) & 0x1F;
  89         *imm = opcode & 0x3FF;
  90
  91         return ERROR_OK;
  92 }
  93
  94 static int nds32_parse_type_4(uint32_t opcode, uint8_t *rt, uint8_t *ra,
  95                 uint8_t *rb, uint8_t *rd, uint8_t *sub_opc)
  96 {
  97         *rt = (opcode >> 20) & 0x1F;
  98         *ra = (opcode >> 15) & 0x1F;
  99         *rb = (opcode >> 10) & 0x1F;
 100         *rd = (opcode >> 5) & 0x1F;
 101         *sub_opc = opcode & 0x1F;
 102
 103         return ERROR_OK;
 104 }
 105
 106 /* LBI, LHI, LWI, LBI.bi, LHI.bi, LWI.bi */
 107 static int nds32_parse_group_0_insn(struct nds32 *nds32, uint32_t opcode,
 108                 uint32_t address,
 109                 struct nds32_instruction *instruction)
 110 {
 111         uint8_t opc_6;
 112
 113         opc_6 = instruction->info.opc_6;
 114
 115         switch (opc_6 & 0x7) {
 116                 case 0: /* LBI */
 117                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 118                                         &(instruction->info.ra), &(instruction->info.imm));
 119                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
 120                         instruction->type = NDS32_INSN_LOAD_STORE;
 121                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 122                                         &(instruction->access_start));
 123                         instruction->access_start += instruction->info.imm;
 124                         instruction->access_end = instruction->access_start + 1;
 125                         snprintf(instruction->text,
 126                                         128,
 127                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 128                                         "\tLBI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 129                                         address,
 130                                         opcode, instruction->info.rt, instruction->info.ra,
 131                                         instruction->info.imm);
 132                         break;
 133                 case 1: /* LHI */
 134                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 135                                         &(instruction->info.ra), &(instruction->info.imm));
 136                         instruction->info.imm = (instruction->info.imm << 17) >> 16; /* sign-extend */
 137                         instruction->type = NDS32_INSN_LOAD_STORE;
 138                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 139                                         &(instruction->access_start));
 140                         instruction->access_start += instruction->info.imm;
 141                         instruction->access_end = instruction->access_start + 2;
 142                         snprintf(instruction->text,
 143                                         128,
 144                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 145                                         "\tLHI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 146                                         address,
 147                                         opcode, instruction->info.rt, instruction->info.ra,
 148                                         instruction->info.imm);
 149                         break;
 150                 case 2: /* LWI */
 151                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 152                                         &(instruction->info.ra), &(instruction->info.imm));
 153                         instruction->info.imm = (instruction->info.imm << 17) >> 15; /* sign-extend */
 154                         instruction->type = NDS32_INSN_LOAD_STORE;
 155                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 156                                         &(instruction->access_start));
 157                         instruction->access_start += instruction->info.imm;
 158                         instruction->access_end = instruction->access_start + 4;
 159                         snprintf(instruction->text,
 160                                         128,
 161                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 162                                         "\tLWI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 163                                         address,
 164                                         opcode, instruction->info.rt, instruction->info.ra,
 165                                         instruction->info.imm);
 166                         break;
 167                 case 4: /* LBI.bi */
 168                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 169                                         &(instruction->info.ra), &(instruction->info.imm));
 170                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
 171                         instruction->type = NDS32_INSN_LOAD_STORE;
 172                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 173                                         &(instruction->access_start));
 174                         instruction->access_end = instruction->access_start + 1;
 175                         snprintf(instruction->text,
 176                                         128,
 177                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 178                                         "\tLBI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 179                                         address,
 180                                         opcode, instruction->info.rt, instruction->info.ra,
 181                                         instruction->info.imm);
 182                         break;
 183                 case 5: /* LHI.bi */
 184                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 185                                         &(instruction->info.ra), &(instruction->info.imm));
 186                         instruction->info.imm = (instruction->info.imm << 17) >> 16; /* sign-extend */
 187                         instruction->type = NDS32_INSN_LOAD_STORE;
 188                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 189                                         &(instruction->access_start));
 190                         instruction->access_end = instruction->access_start + 2;
 191                         snprintf(instruction->text,
 192                                         128,
 193                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 194                                         "\tLHI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 195                                         address,
 196                                         opcode, instruction->info.rt, instruction->info.ra,
 197                                         instruction->info.imm);
 198                         break;
 199                 case 6: /* LWI.bi */
 200                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 201                                         &(instruction->info.ra), &(instruction->info.imm));
 202                         instruction->info.imm = (instruction->info.imm << 17) >> 15; /* sign-extend */
 203                         instruction->type = NDS32_INSN_LOAD_STORE;
 204                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 205                                         &(instruction->access_start));
 206                         instruction->access_end = instruction->access_start + 4;
 207                         snprintf(instruction->text,
 208                                         128,
 209                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 210                                         "\tLWI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32 "",
 211                                         address,
 212                                         opcode, instruction->info.rt, instruction->info.ra,
 213                                         instruction->info.imm);
 214                         break;
 215                 default:
 216                         snprintf(instruction->text,
 217                                         128,
 218                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
 219                                         address,
 220                                         opcode);
 221                         return ERROR_FAIL;
 222         }
 223
 224         return ERROR_OK;
 225 }
 226
 227 static int nds32_parse_group_1_insn(struct nds32 *nds32, uint32_t opcode,
 228                 uint32_t address, struct nds32_instruction *instruction)
 229 {
 230         uint8_t opc_6;
 231
 232         opc_6 = instruction->info.opc_6;
 233
 234         switch (opc_6 & 0x7) {
 235                 case 0: /* SBI */
 236                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 237                                         &(instruction->info.ra), &(instruction->info.imm));
 238                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
 239                         instruction->type = NDS32_INSN_LOAD_STORE;
 240                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 241                                         &(instruction->access_start));
 242                         instruction->access_start += instruction->info.imm;
 243                         instruction->access_end = instruction->access_start + 1;
 244                         snprintf(instruction->text,
 245                                         128,
 246                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 247                                         "\tSBI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 248                                         address,
 249                                         opcode, instruction->info.rt, instruction->info.ra,
 250                                         instruction->info.imm);
 251                         break;
 252                 case 1: /* SHI */
 253                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 254                                         &(instruction->info.ra), &(instruction->info.imm));
 255                         instruction->info.imm = (instruction->info.imm << 17) >> 16; /* sign-extend */
 256                         instruction->type = NDS32_INSN_LOAD_STORE;
 257                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 258                                         &(instruction->access_start));
 259                         instruction->access_start += instruction->info.imm;
 260                         instruction->access_end = instruction->access_start + 2;
 261                         snprintf(instruction->text,
 262                                         128,
 263                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 264                                         "\tSHI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 265                                         address,
 266                                         opcode, instruction->info.rt, instruction->info.ra,
 267                                         instruction->info.imm);
 268                         break;
 269                 case 2: /* SWI */
 270                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 271                                         &(instruction->info.ra), &(instruction->info.imm));
 272                         instruction->info.imm = (instruction->info.imm << 17) >> 15; /* sign-extend */
 273                         instruction->type = NDS32_INSN_LOAD_STORE;
 274                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 275                                         &(instruction->access_start));
 276                         instruction->access_start += instruction->info.imm;
 277                         instruction->access_end = instruction->access_start + 4;
 278                         snprintf(instruction->text,
 279                                         128,
 280                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 281                                         "\tSWI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 282                                         address,
 283                                         opcode, instruction->info.rt, instruction->info.ra,
 284                                         instruction->info.imm);
 285                         break;
 286                 case 4: /* SBI.bi */
 287                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 288                                         &(instruction->info.ra), &(instruction->info.imm));
 289                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
 290                         instruction->type = NDS32_INSN_LOAD_STORE;
 291                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 292                                         &(instruction->access_start));
 293                         instruction->access_end = instruction->access_start + 1;
 294                         snprintf(instruction->text,
 295                                         128,
 296                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 297                                         "\tSBI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 298                                         address,
 299                                         opcode, instruction->info.rt, instruction->info.ra,
 300                                         instruction->info.imm);
 301                         break;
 302                 case 5: /* SHI.bi */
 303                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 304                                         &(instruction->info.ra), &(instruction->info.imm));
 305                         instruction->info.imm = (instruction->info.imm << 17) >> 16; /* sign-extend */
 306                         instruction->type = NDS32_INSN_LOAD_STORE;
 307                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 308                                         &(instruction->access_start));
 309                         instruction->access_end = instruction->access_start + 2;
 310                         snprintf(instruction->text,
 311                                         128,
 312                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 313                                         "\tSHI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 314                                         address,
 315                                         opcode, instruction->info.rt, instruction->info.ra,
 316                                         instruction->info.imm);
 317                         break;
 318                 case 6: /* SWI.bi */
 319                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 320                                         &(instruction->info.ra), &(instruction->info.imm));
 321                         instruction->info.imm = (instruction->info.imm << 17) >> 15; /* sign-extend */
 322                         instruction->type = NDS32_INSN_LOAD_STORE;
 323                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 324                                         &(instruction->access_start));
 325                         instruction->access_end = instruction->access_start + 4;
 326                         snprintf(instruction->text,
 327                                         128,
 328                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 329                                         "\tSWI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 330                                         address,
 331                                         opcode, instruction->info.rt, instruction->info.ra,
 332                                         instruction->info.imm);
 333                         break;
 334                 default:
 335                         snprintf(instruction->text,
 336                                         128,
 337                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
 338                                         address,
 339                                         opcode);
 340                         return ERROR_FAIL;
 341         }
 342
 343         return ERROR_OK;
 344 }
 345
 346 static int nds32_parse_group_2_insn(struct nds32 *nds32, uint32_t opcode,
 347                 uint32_t address, struct nds32_instruction *instruction)
 348 {
 349         uint8_t opc_6;
 350
 351         opc_6 = instruction->info.opc_6;
 352
 353         switch (opc_6 & 0x7) {
 354                 case 0: /* LBSI */
 355                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 356                                         &(instruction->info.ra), &(instruction->info.imm));
 357                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
 358                         instruction->type = NDS32_INSN_LOAD_STORE;
 359                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 360                                         &(instruction->access_start));
 361                         instruction->access_start += instruction->info.imm;
 362                         instruction->access_end = instruction->access_start + 1;
 363                         snprintf(instruction->text,
 364                                         128,
 365                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 366                                         "\tLBSI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 367                                         address,
 368                                         opcode, instruction->info.rt, instruction->info.ra,
 369                                         instruction->info.imm);
 370                         break;
 371                 case 1: /* LHSI */
 372                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 373                                         &(instruction->info.ra), &(instruction->info.imm));
 374                         instruction->info.imm = (instruction->info.imm << 17) >> 16; /* sign-extend */
 375                         instruction->type = NDS32_INSN_LOAD_STORE;
 376                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 377                                         &(instruction->access_start));
 378                         instruction->access_start += instruction->info.imm;
 379                         instruction->access_end = instruction->access_start + 2;
 380                         snprintf(instruction->text,
 381                                         128,
 382                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 383                                         "\tLHSI\t$r%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 384                                         address,
 385                                         opcode, instruction->info.rt, instruction->info.ra,
 386                                         instruction->info.imm);
 387                         break;
 388                 case 3: { /* DPREFI */
 389                                 uint8_t sub_type;
 390                                 nds32_parse_type_2(opcode, &sub_type, &(instruction->info.ra),
 391                                                 &(instruction->info.imm));
 392                                 instruction->info.sub_opc = sub_type & 0xF;
 393                                 instruction->type = NDS32_INSN_MISC;
 394                                 if (sub_type & 0x10) { /* DPREFI.d */
 395                                         /* sign-extend */
 396                                         instruction->info.imm = (instruction->info.imm << 17) >> 14;
 397                                         snprintf(instruction->text,
 398                                                         128,
 399                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 400                                                         "\tDPREFI.d\t%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 401                                                         address,
 402                                                         opcode, instruction->info.sub_opc,
 403                                                         instruction->info.ra, instruction->info.imm);
 404                                 } else { /* DPREFI.w */
 405                                         /* sign-extend */
 406                                         instruction->info.imm = (instruction->info.imm << 17) >> 15;
 407                                         snprintf(instruction->text,
 408                                                         128,
 409                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 410                                                         "\tDPREFI.w\t%" PRIu8 ",[$r%" PRIu8 "+#%" PRId32 "]",
 411                                                         address,
 412                                                         opcode, instruction->info.sub_opc,
 413                                                         instruction->info.ra, instruction->info.imm);
 414                                 }
 415                         }
 416                         break;
 417                 case 4: /* LBSI.bi */
 418                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 419                                         &(instruction->info.ra), &(instruction->info.imm));
 420                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
 421                         instruction->type = NDS32_INSN_LOAD_STORE;
 422                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 423                                         &(instruction->access_start));
 424                         instruction->access_end = instruction->access_start + 1;
 425                         snprintf(instruction->text,
 426                                         128,
 427                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 428                                         "\tLBSI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 429                                         address,
 430                                         opcode, instruction->info.rt, instruction->info.ra,
 431                                         instruction->info.imm);
 432                         break;
 433                 case 5: /* LHSI.bi */
 434                         nds32_parse_type_2(opcode, &(instruction->info.rt),
 435                                         &(instruction->info.ra), &(instruction->info.imm));
 436                         instruction->info.imm = (instruction->info.imm << 17) >> 16; /* sign-extend */
 437                         instruction->type = NDS32_INSN_LOAD_STORE;
 438                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 439                                         &(instruction->access_start));
 440                         instruction->access_end = instruction->access_start + 2;
 441                         snprintf(instruction->text,
 442                                         128,
 443                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 444                                         "\tLHSI.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
 445                                         address,
 446                                         opcode, instruction->info.rt, instruction->info.ra,
 447                                         instruction->info.imm);
 448                         break;
 449                 case 6: /* LBGP */
 450                         nds32_parse_type_1(opcode, &(instruction->info.rt), &(instruction->info.imm));
 451                         instruction->type = NDS32_INSN_LOAD_STORE;
 452                         if ((instruction->info.imm >> 19) & 0x1) { /* LBSI.gp */
 453                                 instruction->info.imm = (instruction->info.imm << 13) >> 13;
 454                                 nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
 455                                 instruction->access_start += instruction->info.imm;
 456                                 instruction->access_end = instruction->access_start + 1;
 457                                 snprintf(instruction->text,
 458                                                 128,
 459                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 460                                                 "\tLBSI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
 461                                                 address,
 462                                                 opcode, instruction->info.rt, instruction->info.imm);
 463                         } else { /* LBI.gp */
 464                                 instruction->info.imm = (instruction->info.imm << 13) >> 13;
 465                                 nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
 466                                 instruction->access_start += instruction->info.imm;
 467                                 instruction->access_end = instruction->access_start + 1;
 468                                 snprintf(instruction->text,
 469                                                 128,
 470                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 471                                                 "\tLBI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
 472                                                 address,
 473                                                 opcode, instruction->info.rt, instruction->info.imm);
 474                         }
 475                         break;
 476                 default:
 477                         snprintf(instruction->text,
 478                                         128,
 479                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
 480                                         address,
 481                                         opcode);
 482                         return ERROR_FAIL;
 483         }
 484
 485         return ERROR_OK;
 486 }
 487
 488 static int nds32_parse_mem(struct nds32 *nds32, uint32_t opcode, uint32_t address,
 489                 struct nds32_instruction *instruction)
 490 {
 491         uint32_t sub_opcode = opcode & 0x3F;
 492         uint32_t val_ra, val_rb;
 493         switch (sub_opcode >> 3) {
 494                 case 0:
 495                         switch (sub_opcode & 0x7) {
 496                                 case 0: /* LB */
 497                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 498                                                         &(instruction->info.ra), \
 499                                                         &(instruction->info.rb), &(instruction->info.imm));
 500                                         instruction->type = NDS32_INSN_LOAD_STORE;
 501                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 502                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 503                                         instruction->access_start = val_ra +
 504                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 505                                         instruction->access_end = instruction->access_start + 1;
 506                                         snprintf(instruction->text,
 507                                                         128,
 508                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 509                                                         "\tLB\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 510                                                         address,
 511                                                         opcode, instruction->info.rt, instruction->info.ra,
 512                                                         instruction->info.rb,
 513                                                         (instruction->info.imm >> 8) & 0x3);
 514                                         break;
 515                                 case 1: /* LH */
 516                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 517                                                         &(instruction->info.ra),
 518                                                         &(instruction->info.rb), &(instruction->info.imm));
 519                                         instruction->type = NDS32_INSN_LOAD_STORE;
 520                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 521                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 522                                         instruction->access_start = val_ra +
 523                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 524                                         instruction->access_end = instruction->access_start + 2;
 525                                         snprintf(instruction->text,
 526                                                         128,
 527                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 528                                                         "\tLH\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 529                                                         address,
 530                                                         opcode, instruction->info.rt, instruction->info.ra,
 531                                                         instruction->info.rb,
 532                                                         (instruction->info.imm >> 8) & 0x3);
 533                                         break;
 534                                 case 2: /* LW */
 535                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 536                                                         &(instruction->info.ra),
 537                                                         &(instruction->info.rb), &(instruction->info.imm));
 538                                         instruction->type = NDS32_INSN_LOAD_STORE;
 539                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 540                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 541                                         instruction->access_start = val_ra +
 542                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 543                                         instruction->access_end = instruction->access_start + 4;
 544                                         snprintf(instruction->text,
 545                                                         128,
 546                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 547                                                         "\tLW\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 548                                                         address,
 549                                                         opcode, instruction->info.rt, instruction->info.ra,
 550                                                         instruction->info.rb,
 551                                                         (instruction->info.imm >> 8) & 0x3);
 552                                         break;
 553                                 case 4: /* LB.bi */
 554                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 555                                                         &(instruction->info.ra),
 556                                                         &(instruction->info.rb), &(instruction->info.imm));
 557                                         instruction->type = NDS32_INSN_LOAD_STORE;
 558                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 559                                                         &(instruction->access_start));
 560                                         instruction->access_end = instruction->access_start + 1;
 561                                         snprintf(instruction->text,
 562                                                         128,
 563                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 564                                                         "\tLB.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 565                                                         address,
 566                                                         opcode, instruction->info.rt,
 567                                                         instruction->info.ra, instruction->info.rb,
 568                                                         (instruction->info.imm >> 8) & 0x3);
 569                                         break;
 570                                 case 5: /* LH.bi */
 571                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 572                                                         &(instruction->info.ra),
 573                                                         &(instruction->info.rb), &(instruction->info.imm));
 574                                         instruction->type = NDS32_INSN_LOAD_STORE;
 575                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 576                                                         &(instruction->access_start));
 577                                         instruction->access_end = instruction->access_start + 2;
 578                                         snprintf(instruction->text,
 579                                                         128,
 580                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 581                                                         "\tLH.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 582                                                         address,
 583                                                         opcode, instruction->info.rt, instruction->info.ra,
 584                                                         instruction->info.rb,
 585                                                         (instruction->info.imm >> 8) & 0x3);
 586                                         break;
 587                                 case 6: /* LW.bi */
 588                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 589                                                         &(instruction->info.ra),
 590                                                         &(instruction->info.rb), &(instruction->info.imm));
 591                                         instruction->type = NDS32_INSN_LOAD_STORE;
 592                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 593                                                         &(instruction->access_start));
 594                                         instruction->access_end = instruction->access_start + 4;
 595                                         snprintf(instruction->text,
 596                                                         128,
 597                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 598                                                         "\tLW.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 599                                                         address,
 600                                                         opcode, instruction->info.rt, instruction->info.ra,
 601                                                         instruction->info.rb,
 602                                                         (instruction->info.imm >> 8) & 0x3);
 603                                         break;
 604                         }
 605                         break;
 606                 case 1:
 607                         switch (sub_opcode & 0x7) {
 608                                 case 0: /* SB */
 609                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 610                                                         &(instruction->info.ra),
 611                                                         &(instruction->info.rb), &(instruction->info.imm));
 612                                         instruction->type = NDS32_INSN_LOAD_STORE;
 613                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 614                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 615                                         instruction->access_start = val_ra +
 616                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 617                                         instruction->access_end = instruction->access_start + 1;
 618                                         snprintf(instruction->text,
 619                                                         128,
 620                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 621                                                         "\tSB\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 622                                                         address,
 623                                                         opcode, instruction->info.rt,
 624                                                         instruction->info.ra, instruction->info.rb,
 625                                                         (instruction->info.imm >> 8) & 0x3);
 626                                         break;
 627                                 case 1: /* SH */
 628                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 629                                                         &(instruction->info.ra),
 630                                                         &(instruction->info.rb), &(instruction->info.imm));
 631                                         instruction->type = NDS32_INSN_LOAD_STORE;
 632                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 633                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 634                                         instruction->access_start = val_ra +
 635                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 636                                         instruction->access_end = instruction->access_start + 2;
 637                                         snprintf(instruction->text,
 638                                                         128,
 639                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 640                                                         "\tSH\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 641                                                         address,
 642                                                         opcode, instruction->info.rt, instruction->info.ra,
 643                                                         instruction->info.rb,
 644                                                         (instruction->info.imm >> 8) & 0x3);
 645                                         break;
 646                                 case 2: /* SW */
 647                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 648                                                         &(instruction->info.ra),
 649                                                         &(instruction->info.rb), &(instruction->info.imm));
 650                                         instruction->type = NDS32_INSN_LOAD_STORE;
 651                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 652                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 653                                         instruction->access_start = val_ra +
 654                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 655                                         instruction->access_end = instruction->access_start + 4;
 656                                         snprintf(instruction->text,
 657                                                         128,
 658                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 659                                                         "\tSW\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 660                                                         address,
 661                                                         opcode, instruction->info.rt,
 662                                                         instruction->info.ra, instruction->info.rb,
 663                                                         (instruction->info.imm >> 8) & 0x3);
 664                                         break;
 665                                 case 4: /* SB.bi */
 666                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 667                                                         &(instruction->info.ra),
 668                                                         &(instruction->info.rb), &(instruction->info.imm));
 669                                         instruction->type = NDS32_INSN_LOAD_STORE;
 670                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 671                                                         &(instruction->access_start));
 672                                         instruction->access_end = instruction->access_start + 1;
 673                                         snprintf(instruction->text,
 674                                                         128,
 675                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 676                                                         "\tSB.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 677                                                         address,
 678                                                         opcode, instruction->info.rt, instruction->info.ra,
 679                                                         instruction->info.rb,
 680                                                         (instruction->info.imm >> 8) & 0x3);
 681                                         break;
 682                                 case 5: /* SH.bi */
 683                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 684                                                         &(instruction->info.ra),
 685                                                         &(instruction->info.rb), &(instruction->info.imm));
 686                                         instruction->type = NDS32_INSN_LOAD_STORE;
 687                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 688                                                         &(instruction->access_start));
 689                                         instruction->access_end = instruction->access_start + 2;
 690                                         snprintf(instruction->text,
 691                                                         128,
 692                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 693                                                         "\tSH.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 694                                                         address,
 695                                                         opcode, instruction->info.rt, instruction->info.ra,
 696                                                         instruction->info.rb,
 697                                                         (instruction->info.imm >> 8) & 0x3);
 698                                         break;
 699                                 case 6: /* SW.bi */
 700                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 701                                                         &(instruction->info.ra),
 702                                                         &(instruction->info.rb), &(instruction->info.imm));
 703                                         instruction->type = NDS32_INSN_LOAD_STORE;
 704                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 705                                                         &(instruction->access_start));
 706                                         instruction->access_end = instruction->access_start + 4;
 707                                         snprintf(instruction->text,
 708                                                         128,
 709                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 710                                                         "\tSW.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 711                                                         address,
 712                                                         opcode, instruction->info.rt, instruction->info.ra,
 713                                                         instruction->info.rb,
 714                                                         (instruction->info.imm >> 8) & 0x3);
 715                                         break;
 716                         }
 717                         break;
 718                 case 2:
 719                         switch (sub_opcode & 0x7) {
 720                                 case 0: /* LBS */
 721                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 722                                                         &(instruction->info.ra),
 723                                                         &(instruction->info.rb), &(instruction->info.imm));
 724                                         instruction->type = NDS32_INSN_LOAD_STORE;
 725                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 726                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 727                                         instruction->access_start = val_ra +
 728                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 729                                         instruction->access_end = instruction->access_start + 1;
 730                                         snprintf(instruction->text,
 731                                                         128,
 732                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 733                                                         "\tLBS\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 734                                                         address,
 735                                                         opcode, instruction->info.rt,
 736                                                         instruction->info.ra, instruction->info.rb,
 737                                                         (instruction->info.imm >> 8) & 0x3);
 738                                         break;
 739                                 case 1: /* LHS */
 740                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 741                                                         &(instruction->info.ra),
 742                                                         &(instruction->info.rb), &(instruction->info.imm));
 743                                         instruction->type = NDS32_INSN_LOAD_STORE;
 744                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 745                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 746                                         instruction->access_start = val_ra +
 747                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 748                                         instruction->access_end = instruction->access_start + 2;
 749                                         snprintf(instruction->text,
 750                                                         128,
 751                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 752                                                         "\tLHS\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 753                                                         address,
 754                                                         opcode, instruction->info.rt, instruction->info.ra,
 755                                                         instruction->info.rb,
 756                                                         (instruction->info.imm >> 8) & 0x3);
 757                                         break;
 758                                 case 3: /* DPREF */
 759                                         nds32_parse_type_3(opcode, &(instruction->info.sub_opc),
 760                                                         &(instruction->info.ra),
 761                                                         &(instruction->info.rb), &(instruction->info.imm));
 762                                         instruction->type = NDS32_INSN_MISC;
 763                                         snprintf(instruction->text,
 764                                                         128,
 765                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 766                                                         "\tDPREF\t#%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<#%" PRId32 ")]",
 767                                                         address,
 768                                                         opcode, instruction->info.sub_opc,
 769                                                         instruction->info.ra, instruction->info.rb,
 770                                                         (instruction->info.imm >> 8) & 0x3);
 771                                         break;
 772                                 case 4: /* LBS.bi */
 773                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 774                                                         &(instruction->info.ra),
 775                                                         &(instruction->info.rb), &(instruction->info.imm));
 776                                         instruction->type = NDS32_INSN_LOAD_STORE;
 777                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 778                                                         &(instruction->access_start));
 779                                         instruction->access_end = instruction->access_start + 1;
 780                                         snprintf(instruction->text,
 781                                                         128,
 782                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 783                                                         "\tLBS.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 784                                                         address,
 785                                                         opcode, instruction->info.rt, instruction->info.ra,
 786                                                         instruction->info.rb,
 787                                                         (instruction->info.imm >> 8) & 0x3);
 788                                         break;
 789                                 case 5: /* LHS.bi */
 790                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 791                                                         &(instruction->info.ra),
 792                                                         &(instruction->info.rb), &(instruction->info.imm));
 793                                         instruction->type = NDS32_INSN_LOAD_STORE;
 794                                         nds32_get_mapped_reg(nds32, instruction->info.ra,
 795                                                         &(instruction->access_start));
 796                                         instruction->access_end = instruction->access_start + 2;
 797                                         snprintf(instruction->text,
 798                                                         128,
 799                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 800                                                         "\tLHS.bi\t$r%" PRIu8 ",[$r%" PRIu8 "],($r%" PRIu8 "<<%" PRId32 ")",
 801                                                         address,
 802                                                         opcode, instruction->info.rt, instruction->info.ra,
 803                                                         instruction->info.rb,
 804                                                         (instruction->info.imm >> 8) & 0x3);
 805                                         break;
 806                         }
 807                         break;
 808                 case 3:
 809                         switch (sub_opcode & 0x7) {
 810                                 case 0: /* LLW */
 811                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 812                                                         &(instruction->info.ra),
 813                                                         &(instruction->info.rb), &(instruction->info.imm));
 814                                         instruction->type = NDS32_INSN_LOAD_STORE;
 815                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 816                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 817                                         instruction->access_start = val_ra +
 818                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 819                                         instruction->access_end = instruction->access_start + 4;
 820                                         snprintf(instruction->text,
 821                                                         128,
 822                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 823                                                         "\tLLW\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 824                                                         address,
 825                                                         opcode, instruction->info.rt, instruction->info.ra,
 826                                                         instruction->info.rb,
 827                                                         (instruction->info.imm >> 8) & 0x3);
 828                                         break;
 829                                 case 1: /* SCW */
 830                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 831                                                         &(instruction->info.ra),
 832                                                         &(instruction->info.rb), &(instruction->info.imm));
 833                                         instruction->type = NDS32_INSN_LOAD_STORE;
 834                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 835                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 836                                         instruction->access_start = val_ra +
 837                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 838                                         instruction->access_end = instruction->access_start + 4;
 839                                         snprintf(instruction->text,
 840                                                         128,
 841                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 842                                                         "\tSCW\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 843                                                         address,
 844                                                         opcode, instruction->info.rt, instruction->info.ra,
 845                                                         instruction->info.rb,
 846                                                         (instruction->info.imm >> 8) & 0x3);
 847                                         break;
 848                         }
 849                         break;
 850                 case 4:
 851                         switch (sub_opcode & 0x7) {
 852                                 case 0: /* LBUP */
 853                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 854                                                         &(instruction->info.ra),
 855                                                         &(instruction->info.rb), &(instruction->info.imm));
 856                                         instruction->type = NDS32_INSN_LOAD_STORE;
 857                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 858                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 859                                         instruction->access_start = val_ra +
 860                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 861                                         instruction->access_end = instruction->access_start + 1;
 862                                         snprintf(instruction->text,
 863                                                         128,
 864                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 865                                                         "\tLBUP\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 866                                                         address,
 867                                                         opcode, instruction->info.rt, instruction->info.ra,
 868                                                         instruction->info.rb,
 869                                                         (instruction->info.imm >> 8) & 0x3);
 870                                         break;
 871                                 case 2: /* LWUP */
 872                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 873                                                         &(instruction->info.ra),
 874                                                         &(instruction->info.rb), &(instruction->info.imm));
 875                                         instruction->type = NDS32_INSN_LOAD_STORE;
 876                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 877                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 878                                         instruction->access_start = val_ra +
 879                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 880                                         instruction->access_end = instruction->access_start + 4;
 881                                         snprintf(instruction->text,
 882                                                         128,
 883                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 884                                                         "\tLWUP\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 885                                                         address,
 886                                                         opcode, instruction->info.rt, instruction->info.ra,
 887                                                         instruction->info.rb,
 888                                                         (instruction->info.imm >> 8) & 0x3);
 889                                         break;
 890                         }
 891                         break;
 892                 case 5:
 893                         switch (sub_opcode & 0x7) {
 894                                 case 0: /* SBUP */
 895                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 896                                                         &(instruction->info.ra),
 897                                                         &(instruction->info.rb), &(instruction->info.imm));
 898                                         instruction->type = NDS32_INSN_LOAD_STORE;
 899                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 900                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 901                                         instruction->access_start = val_ra +
 902                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 903                                         instruction->access_end = instruction->access_start + 1;
 904                                         snprintf(instruction->text,
 905                                                         128,
 906                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 907                                                         "\tSBUP\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 908                                                         address,
 909                                                         opcode, instruction->info.rt, instruction->info.ra,
 910                                                         instruction->info.rb,
 911                                                         (instruction->info.imm >> 8) & 0x3);
 912                                         break;
 913                                 case 2: /* SWUP */
 914                                         nds32_parse_type_3(opcode, &(instruction->info.rt),
 915                                                         &(instruction->info.ra),
 916                                                         &(instruction->info.rb), &(instruction->info.imm));
 917                                         instruction->type = NDS32_INSN_LOAD_STORE;
 918                                         nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
 919                                         nds32_get_mapped_reg(nds32, instruction->info.rb, &val_rb);
 920                                         instruction->access_start = val_ra +
 921                                                 (val_rb << ((instruction->info.imm >> 8) & 0x3));
 922                                         instruction->access_end = instruction->access_start + 4;
 923                                         snprintf(instruction->text,
 924                                                         128,
 925                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
 926                                                         "\tSWUP\t$r%" PRIu8 ",[$r%" PRIu8 "+($r%" PRIu8 "<<%" PRId32 ")]",
 927                                                         address,
 928                                                         opcode, instruction->info.rt, instruction->info.ra,
 929                                                         instruction->info.rb,
 930                                                         (instruction->info.imm >> 8) & 0x3);
 931                                         break;
 932                         }
 933                         break;
 934                 default:
 935                         snprintf(instruction->text,
 936                                         128,
 937                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
 938                                         address,
 939                                         opcode);
 940                         return ERROR_FAIL;
 941         }
 942
 943         return ERROR_OK;
 944 }
 945
 946 static int nds32_calculate_lsmw_access_range(struct nds32 *nds32,
 947                 struct nds32_instruction *instruction)
 948 {
 949         uint8_t ba;
 950         uint8_t id;
 951         uint8_t enable4;
 952
 953         enable4 = (instruction->info.imm >> 6) & 0xF;
 954         ba = (instruction->info.imm >> 4) & 0x1;
 955         id = (instruction->info.imm >> 3) & 0x1;
 956
 957         if (ba) {
 958                 nds32_get_mapped_reg(nds32, instruction->info.ra, &(instruction->access_start));
 959                 if (id) { /* decrease */
 960                         /* access_end is the (last_element+1), so no need to minus 4 */
 961                         /* instruction->access_end -= 4; */
 962                         instruction->access_end = instruction->access_start;
 963                 } else { /* increase */
 964                         instruction->access_start += 4;
 965                 }
 966         } else {
 967                 nds32_get_mapped_reg(nds32, instruction->info.ra, &(instruction->access_start));
 968                 instruction->access_end = instruction->access_start - 4;
 969         }
 970
 971         if (id) { /* decrease */
 972                 instruction->access_start = instruction->access_end -
 973                         4 * (instruction->info.rd - instruction->info.rb + 1);
 974                 instruction->access_start -= (4 * enable4_bits[enable4]);
 975         } else { /* increase */
 976                 instruction->access_end = instruction->access_start +
 977                         4 * (instruction->info.rd - instruction->info.rb + 1);
 978                 instruction->access_end += (4 * enable4_bits[enable4]);
 979         }
 980
 981         return ERROR_OK;
 982 }
 983
 984 static int nds32_parse_lsmw(struct nds32 *nds32, uint32_t opcode, uint32_t address,
 985                 struct nds32_instruction *instruction)
 986 {
 987         if (opcode & 0x20) { /* SMW, SMWA, SMWZB */
 988                 switch (opcode & 0x3) {
 989                         /* TODO */
 990                         case 0: /* SMW */
 991                                 /* use rd as re */
 992                                 nds32_parse_type_3(opcode, &(instruction->info.rb),
 993                                                 &(instruction->info.ra),
 994                                                 &(instruction->info.rd), &(instruction->info.imm));
 995                                 instruction->type = NDS32_INSN_LOAD_STORE;
 996                                 nds32_calculate_lsmw_access_range(nds32, instruction);
 997                                 snprintf(instruction->text,
 998                                                 128,
 999                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1000                                                 "\tSMW\t$r%" PRIu8 ",[$r%" PRIu8 "],$r%" PRIu8 ",%" PRId32,
1001                                                 address,
1002                                                 opcode, instruction->info.rb, instruction->info.ra,
1003                                                 instruction->info.rd,
1004                                                 (instruction->info.imm >> 6) & 0xF);
1005                                 break;
1006                         case 1: /* SMWA */
1007                                 nds32_parse_type_3(opcode, &(instruction->info.rb),
1008                                                 &(instruction->info.ra),
1009                                                 &(instruction->info.rd), &(instruction->info.imm));
1010                                 instruction->type = NDS32_INSN_LOAD_STORE;
1011                                 nds32_calculate_lsmw_access_range(nds32, instruction);
1012                                 snprintf(instruction->text,
1013                                                 128,
1014                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1015                                                 "\tSMWA\t$r%" PRIu8 ",[$r%" PRIu8 "],$r%" PRIu8 ",%" PRId32,
1016                                                 address,
1017                                                 opcode, instruction->info.rb, instruction->info.ra,
1018                                                 instruction->info.rd,
1019                                                 (instruction->info.imm >> 6) & 0xF);
1020                                 break;
1021                         case 2: /* SMWZB */
1022                                 nds32_parse_type_3(opcode, &(instruction->info.rb),
1023                                                 &(instruction->info.ra),
1024                                                 &(instruction->info.rd), &(instruction->info.imm));
1025                                 instruction->type = NDS32_INSN_LOAD_STORE;
1026                                 /* TODO: calculate access_start/access_end */
1027                                 snprintf(instruction->text,
1028                                                 128,
1029                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1030                                                 "\tSMWZB\t$r%" PRIu8 ",[$r%" PRIu8 "],$r%" PRIu8 ",%" PRId32,
1031                                                 address,
1032                                                 opcode, instruction->info.rb, instruction->info.ra,
1033                                                 instruction->info.rd,
1034                                                 (instruction->info.imm >> 6) & 0xF);
1035                                 break;
1036                         default:
1037                                 snprintf(instruction->text,
1038                                                 128,
1039                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
1040                                                 address,
1041                                                 opcode);
1042                                 return ERROR_FAIL;
1043                 }
1044         } else { /* LMW, LMWA, LMWZB */
1045                 switch (opcode & 0x3) {
1046                         case 0: /* LMW */
1047                                 nds32_parse_type_3(opcode, &(instruction->info.rb),
1048                                                 &(instruction->info.ra),
1049                                                 &(instruction->info.rd), &(instruction->info.imm));
1050                                 instruction->type = NDS32_INSN_LOAD_STORE;
1051                                 nds32_calculate_lsmw_access_range(nds32, instruction);
1052                                 snprintf(instruction->text,
1053                                                 128,
1054                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1055                                                 "\tLMW\t$r%" PRIu8 ",[$r%" PRIu8 "],$r%" PRIu8 ",%" PRId32,
1056                                                 address,
1057                                                 opcode, instruction->info.rb, instruction->info.ra,
1058                                                 instruction->info.rd,
1059                                                 (instruction->info.imm >> 6) & 0xF);
1060                                 break;
1061                         case 1: /* LMWA */
1062                                 nds32_parse_type_3(opcode, &(instruction->info.rb),
1063                                                 &(instruction->info.ra),
1064                                                 &(instruction->info.rd), &(instruction->info.imm));
1065                                 instruction->type = NDS32_INSN_LOAD_STORE;
1066                                 nds32_calculate_lsmw_access_range(nds32, instruction);
1067                                 snprintf(instruction->text,
1068                                                 128,
1069                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1070                                                 "\tLMWA\t$r%" PRIu8 ",[$r%" PRIu8 "],$r%" PRIu8 ",%" PRId32,
1071                                                 address,
1072                                                 opcode, instruction->info.rb, instruction->info.ra,
1073                                                 instruction->info.rd,
1074                                                 (instruction->info.imm >> 6) & 0xF);
1075                                 break;
1076                         case 2: /* LMWZB */
1077                                 nds32_parse_type_3(opcode, &(instruction->info.rb),
1078                                                 &(instruction->info.ra),
1079                                                 &(instruction->info.rd), &(instruction->info.imm));
1080                                 instruction->type = NDS32_INSN_LOAD_STORE;
1081                                 /* TODO: calculate access_start/access_end */
1082                                 snprintf(instruction->text,
1083                                                 128,
1084                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1085                                                 "\tLMWZB\t$r%" PRIu8 ",[$r%" PRIu8 "],$r%" PRIu8 ",%" PRId32,
1086                                                 address,
1087                                                 opcode, instruction->info.rb, instruction->info.ra,
1088                                                 instruction->info.rd,
1089                                                 (instruction->info.imm >> 6) & 0xF);
1090                                 break;
1091                         default:
1092                                 snprintf(instruction->text,
1093                                                 128,
1094                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
1095                                                 address,
1096                                                 opcode);
1097                                 return ERROR_FAIL;
1098                 }
1099         }
1100
1101         return ERROR_OK;
1102 }
1103
1104 static int nds32_parse_hwgp(struct nds32 *nds32, uint32_t opcode, uint32_t address,
1105                 struct nds32_instruction *instruction)
1106 {
1107         switch ((opcode >> 18) & 0x3) {
1108                 case 0: /* LHI.gp */
1109                         nds32_parse_type_1(opcode, &(instruction->info.rt), &(instruction->info.imm));
1110                         instruction->info.imm = (instruction->info.imm << 14) >> 13; /* sign-extend */
1111                         instruction->type = NDS32_INSN_LOAD_STORE;
1112                         nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
1113                         instruction->access_start += instruction->info.imm;
1114                         instruction->access_end = instruction->access_start + 2;
1115                         snprintf(instruction->text,
1116                                         128,
1117                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1118                                         "\tLHI.gp\t$r%" PRIu8 ",[#%" PRId32"]",
1119                                         address,
1120                                         opcode, instruction->info.rt, instruction->info.imm);
1121                         break;
1122                 case 1: /* LHSI.gp */
1123                         nds32_parse_type_1(opcode, &(instruction->info.rt), &(instruction->info.imm));
1124                         instruction->info.imm = (instruction->info.imm << 14) >> 13; /* sign-extend */
1125                         instruction->type = NDS32_INSN_LOAD_STORE;
1126                         nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
1127                         instruction->access_start += instruction->info.imm;
1128                         instruction->access_end = instruction->access_start + 2;
1129                         snprintf(instruction->text,
1130                                         128,
1131                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1132                                         "\tLHSI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
1133                                         address,
1134                                         opcode, instruction->info.rt, instruction->info.imm);
1135                         break;
1136                 case 2: /* SHI.gp */
1137                         nds32_parse_type_1(opcode, &(instruction->info.rt), &(instruction->info.imm));
1138                         instruction->info.imm = (instruction->info.imm << 14) >> 13; /* sign-extend */
1139                         instruction->type = NDS32_INSN_LOAD_STORE;
1140                         nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
1141                         instruction->access_start += instruction->info.imm;
1142                         instruction->access_end = instruction->access_start + 2;
1143                         snprintf(instruction->text,
1144                                         128,
1145                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1146                                         "\tSHI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
1147                                         address,
1148                                         opcode, instruction->info.rt, instruction->info.imm);
1149                         break;
1150                 case 3:
1151                         instruction->type = NDS32_INSN_LOAD_STORE;
1152                         if ((opcode >> 17) & 0x1) { /* SWI.gp */
1153                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
1154                                                 &(instruction->info.imm));
1155                                 /* sign-extend */
1156                                 instruction->info.imm = (instruction->info.imm << 15) >> 13;
1157                                 nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
1158                                 instruction->access_start += instruction->info.imm;
1159                                 instruction->access_end = instruction->access_start + 4;
1160                                 snprintf(instruction->text,
1161                                                 128,
1162                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1163                                                 "\tSWI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
1164                                                 address,
1165                                                 opcode, instruction->info.rt, instruction->info.imm);
1166                         } else { /* LWI.gp */
1167                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
1168                                                 &(instruction->info.imm));
1169                                 /* sign-extend */
1170                                 instruction->info.imm = (instruction->info.imm << 15) >> 13;
1171                                 nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
1172                                 instruction->access_start += instruction->info.imm;
1173                                 instruction->access_end = instruction->access_start + 4;
1174                                 snprintf(instruction->text,
1175                                                 128,
1176                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1177                                                 "\tLWI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
1178                                                 address,
1179                                                 opcode, instruction->info.rt, instruction->info.imm);
1180                         }
1181
1182                         break;
1183                 default:
1184                         snprintf(instruction->text,
1185                                         128,
1186                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
1187                                         address,
1188                                         opcode);
1189                         return ERROR_FAIL;
1190         }
1191
1192         return ERROR_OK;
1193 }
1194
1195 static int nds32_parse_sbgp(struct nds32 *nds32, uint32_t opcode, uint32_t address,
1196                 struct nds32_instruction *instruction)
1197 {
1198         switch ((opcode >> 19) & 0x1) {
1199                 case 0: /* SBI.gp */
1200                         nds32_parse_type_1(opcode, &(instruction->info.rt), &(instruction->info.imm));
1201                         instruction->info.imm = (instruction->info.imm << 13) >> 13; /* sign-extend */
1202                         instruction->type = NDS32_INSN_LOAD_STORE;
1203                         nds32_get_mapped_reg(nds32, R29, &(instruction->access_start));
1204                         instruction->access_start += instruction->info.imm;
1205                         instruction->access_end = instruction->access_start + 1;
1206                         snprintf(instruction->text,
1207                                         128,
1208                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1209                                         "\tSBI.gp\t$r%" PRIu8 ",[#%" PRId32 "]",
1210                                         address,
1211                                         opcode, instruction->info.rt, instruction->info.imm);
1212                         break;
1213                 case 1: /* ADDI.gp */
1214                         nds32_parse_type_1(opcode, &(instruction->info.rt), &(instruction->info.imm));
1215                         instruction->info.imm = (instruction->info.imm << 13) >> 13; /* sign-extend */
1216                         instruction->type = NDS32_INSN_DATA_PROC;
1217                         snprintf(instruction->text,
1218                                         128,
1219                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1220                                         "\tADDI.gp\t$r%" PRIu8 ",#%" PRId32 "",
1221                                         address,
1222                                         opcode, instruction->info.rt, instruction->info.imm);
1223                         break;
1224                 default:
1225                         snprintf(instruction->text,
1226                                         128,
1227                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
1228                                         address,
1229                                         opcode);
1230                         return ERROR_FAIL;
1231         }
1232
1233         return ERROR_OK;
1234 }
1235
1236 static int nds32_parse_group_3_insn(struct nds32 *nds32, uint32_t opcode, uint32_t address,
1237                 struct nds32_instruction *instruction)
1238 {
1239         uint8_t opc_6;
1240
1241         opc_6 = instruction->info.opc_6;
1242
1243         switch (opc_6 & 0x7) {
1244                 case 4: /* MEM */
1245                         nds32_parse_mem(nds32, opcode, address, instruction);
1246                         break;
1247                 case 5: /* LSMW */
1248                         nds32_parse_lsmw(nds32, opcode, address, instruction);
1249                         break;
1250                 case 6: /* HWGP */
1251                         nds32_parse_hwgp(nds32, opcode, address, instruction);
1252                         break;
1253                 case 7: /* SBGP */
1254                         nds32_parse_sbgp(nds32, opcode, address, instruction);
1255                         break;
1256                 default:
1257                         snprintf(instruction->text,
1258                                         128,
1259                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
1260                                         address,
1261                                         opcode);
1262                         return ERROR_FAIL;
1263         }
1264
1265         return ERROR_OK;
1266 }
1267
1268 static int nds32_parse_alu_1(uint32_t opcode, uint32_t address,
1269                 struct nds32_instruction *instruction)
1270 {
1271         switch (opcode & 0x1F) {
1272                 case 0: /* ADD */
1273                         nds32_parse_type_3(opcode, &(instruction->info.rt), &(instruction->info.ra),
1274                                         &(instruction->info.rb), &(instruction->info.imm));
1275                         instruction->type = NDS32_INSN_DATA_PROC;
1276                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1277                         if (instruction->info.imm)
1278                                 snprintf(instruction->text,
1279                                                 128,
1280                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1281                                                 "\tADD_SLLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1282                                                 address,
1283                                                 opcode, instruction->info.rt, instruction->info.ra,
1284                                                 instruction->info.rb,
1285                                                 instruction->info.imm);
1286                         else
1287                                 snprintf(instruction->text,
1288                                                 128,
1289                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1290                                                 "\tADD\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1291                                                 address,
1292                                                 opcode, instruction->info.rt, instruction->info.ra,
1293                                                 instruction->info.rb);
1294                         break;
1295                 case 1: /* SUB */
1296                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1297                                         &(instruction->info.ra),
1298                                         &(instruction->info.rb), &(instruction->info.imm));
1299                         instruction->type = NDS32_INSN_DATA_PROC;
1300                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1301                         if (instruction->info.imm)
1302                                 snprintf(instruction->text,
1303                                                 128,
1304                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1305                                                 "\tSUB_SLLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1306                                                 address,
1307                                                 opcode, instruction->info.rt, instruction->info.ra,
1308                                                 instruction->info.rb,
1309                                                 instruction->info.imm);
1310                         else
1311                                 snprintf(instruction->text,
1312                                                 128,
1313                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1314                                                 "\tSUB\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 "",
1315                                                 address,
1316                                                 opcode, instruction->info.rt, instruction->info.ra,
1317                                                 instruction->info.rb);
1318                         break;
1319                 case 2: /* AND */
1320                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1321                                         &(instruction->info.ra),
1322                                         &(instruction->info.rb), &(instruction->info.imm));
1323                         instruction->type = NDS32_INSN_DATA_PROC;
1324                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1325                         if (instruction->info.imm)
1326                                 snprintf(instruction->text,
1327                                                 128,
1328                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1329                                                 "\tAND_SLLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1330                                                 address,
1331                                                 opcode, instruction->info.rt, instruction->info.ra,
1332                                                 instruction->info.rb,
1333                                                 instruction->info.imm);
1334                         else
1335                                 snprintf(instruction->text,
1336                                                 128,
1337                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1338                                                 "\tAND\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 "",
1339                                                 address,
1340                                                 opcode, instruction->info.rt, instruction->info.ra,
1341                                                 instruction->info.rb);
1342                         break;
1343                 case 3: /* XOR */
1344                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1345                                         &(instruction->info.ra),
1346                                         &(instruction->info.rb), &(instruction->info.imm));
1347                         instruction->type = NDS32_INSN_DATA_PROC;
1348                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1349                         if (instruction->info.imm)
1350                                 snprintf(instruction->text,
1351                                                 128,
1352                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1353                                                 "\tXOR_SLLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1354                                                 address,
1355                                                 opcode, instruction->info.rt, instruction->info.ra,
1356                                                 instruction->info.rb,
1357                                                 instruction->info.imm);
1358                         else
1359                                 snprintf(instruction->text,
1360                                                 128,
1361                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1362                                                 "\tXOR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1363                                                 address,
1364                                                 opcode, instruction->info.rt, instruction->info.ra,
1365                                                 instruction->info.rb);
1366                         break;
1367                 case 4: /* OR */
1368                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1369                                         &(instruction->info.ra),
1370                                         &(instruction->info.rb), &(instruction->info.imm));
1371                         instruction->type = NDS32_INSN_DATA_PROC;
1372                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1373                         if (instruction->info.imm)
1374                                 snprintf(instruction->text,
1375                                                 128,
1376                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1377                                                 "\tOR_SLLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1378                                                 address,
1379                                                 opcode, instruction->info.rt, instruction->info.ra,
1380                                                 instruction->info.rb,
1381                                                 instruction->info.imm);
1382                         else
1383                                 snprintf(instruction->text,
1384                                                 128,
1385                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1386                                                 "\tOR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1387                                                 address,
1388                                                 opcode, instruction->info.rt, instruction->info.ra,
1389                                                 instruction->info.rb);
1390                         break;
1391                 case 5: /* NOR */
1392                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1393                                         &(instruction->info.ra),
1394                                         &(instruction->info.rb), &(instruction->info.imm));
1395                         instruction->type = NDS32_INSN_DATA_PROC;
1396                         snprintf(instruction->text,
1397                                         128,
1398                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1399                                         "\tNOR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1400                                         address,
1401                                         opcode, instruction->info.rt, instruction->info.ra,
1402                                         instruction->info.rb);
1403                         break;
1404                 case 6: /* SLT */
1405                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1406                                         &(instruction->info.ra),
1407                                         &(instruction->info.rb), &(instruction->info.imm));
1408                         instruction->type = NDS32_INSN_DATA_PROC;
1409                         snprintf(instruction->text,
1410                                         128,
1411                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1412                                         "\tSLT\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1413                                         address,
1414                                         opcode, instruction->info.rt, instruction->info.ra,
1415                                         instruction->info.rb);
1416                         break;
1417                 case 7: /* SLTS */
1418                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1419                                         &(instruction->info.ra),
1420                                         &(instruction->info.rb), &(instruction->info.imm));
1421                         instruction->type = NDS32_INSN_DATA_PROC;
1422                         snprintf(instruction->text,
1423                                         128,
1424                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1425                                         "\tSLTS\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1426                                         address,
1427                                         opcode, instruction->info.rt, instruction->info.ra,
1428                                         instruction->info.rb);
1429                         break;
1430                 case 8: { /* SLLI */
1431                                 uint8_t imm;
1432                                 int32_t sub_op;
1433                                 nds32_parse_type_3(opcode, &(instruction->info.rt),
1434                                                 &(instruction->info.ra),
1435                                                 &imm, &sub_op);
1436                                 instruction->info.imm = imm;
1437                                 instruction->type = NDS32_INSN_DATA_PROC;
1438                                 snprintf(instruction->text,
1439                                                 128,
1440                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1441                                                 "\tSLLI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1442                                                 address,
1443                                                 opcode, instruction->info.rt, instruction->info.ra,
1444                                                 instruction->info.imm);
1445                         }
1446                         break;
1447                 case 9: { /* SRLI */
1448                                 uint8_t imm;
1449                                 int32_t sub_op;
1450                                 nds32_parse_type_3(opcode, &(instruction->info.rt),
1451                                                 &(instruction->info.ra),
1452                                                 &imm, &sub_op);
1453                                 instruction->info.imm = imm;
1454                                 instruction->type = NDS32_INSN_DATA_PROC;
1455                                 snprintf(instruction->text,
1456                                                 128,
1457                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1458                                                 "\tSRLI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1459                                                 address,
1460                                                 opcode, instruction->info.rt, instruction->info.ra,
1461                                                 instruction->info.imm);
1462                         }
1463                         break;
1464                 case 10: { /* SRAI */
1465                                  uint8_t imm;
1466                                  int32_t sub_op;
1467                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1468                                                  &(instruction->info.ra),
1469                                                  &imm, &sub_op);
1470                                  instruction->info.imm = imm;
1471                                  instruction->type = NDS32_INSN_DATA_PROC;
1472                                  snprintf(instruction->text,
1473                                                  128,
1474                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1475                                                  "\tSRAI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1476                                                  address,
1477                                                  opcode, instruction->info.rt, instruction->info.ra,
1478                                                  instruction->info.imm);
1479                          }
1480                          break;
1481                 case 11: { /* ROTRI */
1482                                  uint8_t imm;
1483                                  int32_t sub_op;
1484                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1485                                                  &(instruction->info.ra),
1486                                                  &imm, &sub_op);
1487                                  instruction->info.imm = imm;
1488                                  instruction->type = NDS32_INSN_DATA_PROC;
1489                                  snprintf(instruction->text,
1490                                                  128,
1491                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1492                                                  "\tROTRI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1493                                                  address,
1494                                                  opcode, instruction->info.rt, instruction->info.ra,
1495                                                  instruction->info.imm);
1496                          }
1497                          break;
1498                 case 12: { /* SLL */
1499                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1500                                                  &(instruction->info.ra),
1501                                                  &(instruction->info.rb), &(instruction->info.imm));
1502                                  instruction->type = NDS32_INSN_DATA_PROC;
1503                                  snprintf(instruction->text,
1504                                                  128,
1505                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1506                                                  "\tSLL\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1507                                                  address,
1508                                                  opcode, instruction->info.rt, instruction->info.ra,
1509                                                  instruction->info.rb);
1510                          }
1511                          break;
1512                 case 13: { /* SRL */
1513                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1514                                                  &(instruction->info.ra),
1515                                                  &(instruction->info.rb), &(instruction->info.imm));
1516                                  instruction->type = NDS32_INSN_DATA_PROC;
1517                                  snprintf(instruction->text,
1518                                                  128,
1519                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1520                                                  "\tSRL\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1521                                                  address,
1522                                                  opcode, instruction->info.rt, instruction->info.ra,
1523                                                  instruction->info.rb);
1524                          }
1525                          break;
1526                 case 14: { /* SRA */
1527                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1528                                                  &(instruction->info.ra),
1529                                                  &(instruction->info.rb), &(instruction->info.imm));
1530                                  instruction->type = NDS32_INSN_DATA_PROC;
1531                                  snprintf(instruction->text,
1532                                                  128,
1533                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1534                                                  "\tSRA\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1535                                                  address,
1536                                                  opcode, instruction->info.rt, instruction->info.ra,
1537                                                  instruction->info.rb);
1538                          }
1539                          break;
1540                 case 15: { /* ROTR */
1541                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1542                                                  &(instruction->info.ra),
1543                                                  &(instruction->info.rb), &(instruction->info.imm));
1544                                  instruction->type = NDS32_INSN_DATA_PROC;
1545                                  snprintf(instruction->text,
1546                                                  128,
1547                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1548                                                  "\tROTR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1549                                                  address,
1550                                                  opcode, instruction->info.rt, instruction->info.ra,
1551                                                  instruction->info.rb);
1552                          }
1553                          break;
1554                 case 16: { /* SEB */
1555                                  nds32_parse_type_2(opcode, &(instruction->info.rt),
1556                                                  &(instruction->info.ra),
1557                                                  &(instruction->info.imm));
1558                                  instruction->type = NDS32_INSN_DATA_PROC;
1559                                  snprintf(instruction->text,
1560                                                  128,
1561                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1562                                                  "\tSEB\t$r%" PRIu8 ",$r%" PRIu8,
1563                                                  address,
1564                                                  opcode, instruction->info.rt, instruction->info.ra);
1565                          }
1566                          break;
1567                 case 17: { /* SEH */
1568                                  nds32_parse_type_2(opcode, &(instruction->info.rt),
1569                                                  &(instruction->info.ra),
1570                                                  &(instruction->info.imm));
1571                                  instruction->type = NDS32_INSN_DATA_PROC;
1572                                  snprintf(instruction->text,
1573                                                  128,
1574                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1575                                                  "\tSEH\t$r%" PRIu8 ",$r%" PRIu8,
1576                                                  address,
1577                                                  opcode, instruction->info.rt, instruction->info.ra);
1578                          }
1579                          break;
1580                 case 18: /* BITC */
1581                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1582                                         &(instruction->info.ra),
1583                                         &(instruction->info.rb), &(instruction->info.imm));
1584                         instruction->type = NDS32_INSN_DATA_PROC;
1585                         snprintf(instruction->text,
1586                                         128,
1587                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1588                                         "\tBITC\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1589                                         address,
1590                                         opcode, instruction->info.rt, instruction->info.ra,
1591                                         instruction->info.rb);
1592                          break;
1593                 case 19: { /* ZEH */
1594                                  nds32_parse_type_2(opcode, &(instruction->info.rt),
1595                                                  &(instruction->info.ra),
1596                                                  &(instruction->info.imm));
1597                                  instruction->type = NDS32_INSN_DATA_PROC;
1598                                  snprintf(instruction->text,
1599                                                  128,
1600                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1601                                                  "\tZEH\t$r%" PRIu8 ",$r%" PRIu8,
1602                                                  address,
1603                                                  opcode, instruction->info.rt, instruction->info.ra);
1604                          }
1605                          break;
1606                 case 20: { /* WSBH */
1607                                  nds32_parse_type_2(opcode, &(instruction->info.rt),
1608                                                  &(instruction->info.ra),
1609                                                  &(instruction->info.imm));
1610                                  instruction->type = NDS32_INSN_DATA_PROC;
1611                                  snprintf(instruction->text,
1612                                                  128,
1613                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1614                                                  "\tWSBH\t$r%" PRIu8 ",$r%" PRIu8,
1615                                                  address,
1616                                                  opcode, instruction->info.rt, instruction->info.ra);
1617                          }
1618                          break;
1619                 case 21: /* OR_SRLI */
1620                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1621                                         &(instruction->info.ra),
1622                                         &(instruction->info.rb), &(instruction->info.imm));
1623                         instruction->type = NDS32_INSN_DATA_PROC;
1624                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1625                         if (instruction->info.imm)
1626                                 snprintf(instruction->text,
1627                                                 128,
1628                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1629                                                 "\tOR_SRLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1630                                                 address,
1631                                                 opcode, instruction->info.rt, instruction->info.ra,
1632                                                 instruction->info.rb,
1633                                                 instruction->info.imm);
1634                         else
1635                                 snprintf(instruction->text,
1636                                                 128,
1637                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1638                                                 "\tOR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1639                                                 address,
1640                                                 opcode, instruction->info.rt, instruction->info.ra,
1641                                                 instruction->info.rb);
1642                          break;
1643                 case 22: { /* DIVSR */
1644                                  nds32_parse_type_4(opcode, &(instruction->info.rt),
1645                                                  &(instruction->info.ra),
1646                                                  &(instruction->info.rb), &(instruction->info.rd),
1647                                                  &(instruction->info.sub_opc));
1648                                  instruction->type = NDS32_INSN_DATA_PROC;
1649                                  snprintf(instruction->text,
1650                                                  128,
1651                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1652                                                  "\tDIVSR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1653                                                  address,
1654                                                  opcode, instruction->info.rt, instruction->info.ra,
1655                                                  instruction->info.rb,
1656                                                  instruction->info.rd);
1657                          }
1658                          break;
1659                 case 23: { /* DIVR */
1660                                  nds32_parse_type_4(opcode, &(instruction->info.rt),
1661                                                  &(instruction->info.ra),
1662                                                  &(instruction->info.rb), &(instruction->info.rd),
1663                                                  &(instruction->info.sub_opc));
1664                                  instruction->type = NDS32_INSN_DATA_PROC;
1665                                  snprintf(instruction->text,
1666                                                  128,
1667                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1668                                                  "\tDIVR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1669                                                  address,
1670                                                  opcode, instruction->info.rt, instruction->info.ra,
1671                                                  instruction->info.rb,
1672                                                  instruction->info.rd);
1673                          }
1674                          break;
1675                 case 24: { /* SVA */
1676                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1677                                                  &(instruction->info.ra),
1678                                                  &(instruction->info.rb), &(instruction->info.imm));
1679                                  instruction->type = NDS32_INSN_DATA_PROC;
1680                                  snprintf(instruction->text,
1681                                                  128,
1682                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1683                                                  "\tSVA\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1684                                                  address,
1685                                                  opcode, instruction->info.rt, instruction->info.ra,
1686                                                  instruction->info.rb);
1687                          }
1688                          break;
1689                 case 25: { /* SVS */
1690                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1691                                                  &(instruction->info.ra),
1692                                                  &(instruction->info.rb), &(instruction->info.imm));
1693                                  instruction->type = NDS32_INSN_DATA_PROC;
1694                                  snprintf(instruction->text,
1695                                                  128,
1696                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1697                                                  "\tSVS\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1698                                                  address,
1699                                                  opcode, instruction->info.rt, instruction->info.ra,
1700                                                  instruction->info.rb);
1701                          }
1702                          break;
1703                 case 26: { /* CMOVZ */
1704                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1705                                                  &(instruction->info.ra),
1706                                                  &(instruction->info.rb), &(instruction->info.imm));
1707                                  instruction->type = NDS32_INSN_MISC;
1708                                  snprintf(instruction->text,
1709                                                  128,
1710                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1711                                                  "\tCMOVZ\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1712                                                  address,
1713                                                  opcode, instruction->info.rt, instruction->info.ra,
1714                                                  instruction->info.rb);
1715                          }
1716                          break;
1717                 case 27: { /* CMOVN */
1718                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1719                                                  &(instruction->info.ra),
1720                                                  &(instruction->info.rb), &(instruction->info.imm));
1721                                  instruction->type = NDS32_INSN_MISC;
1722                                  snprintf(instruction->text,
1723                                                  128,
1724                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1725                                                  "\tCMOVN\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1726                                                  address,
1727                                                  opcode, instruction->info.rt, instruction->info.ra,
1728                                                  instruction->info.rb);
1729                          }
1730                          break;
1731                 case 28: /* ADD_SRLI */
1732                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1733                                         &(instruction->info.ra),
1734                                         &(instruction->info.rb), &(instruction->info.imm));
1735                         instruction->type = NDS32_INSN_DATA_PROC;
1736                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1737                         if (instruction->info.imm)
1738                                 snprintf(instruction->text,
1739                                                 128,
1740                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1741                                                 "\tADD_SRLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1742                                                 address,
1743                                                 opcode, instruction->info.rt, instruction->info.ra,
1744                                                 instruction->info.rb,
1745                                                 instruction->info.imm);
1746                         else
1747                                 snprintf(instruction->text,
1748                                                 128,
1749                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1750                                                 "\tADD\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1751                                                 address,
1752                                                 opcode, instruction->info.rt, instruction->info.ra,
1753                                                 instruction->info.rb);
1754                          break;
1755                 case 29: /* SUB_SRLI */
1756                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1757                                         &(instruction->info.ra),
1758                                         &(instruction->info.rb), &(instruction->info.imm));
1759                         instruction->type = NDS32_INSN_DATA_PROC;
1760                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1761                         if (instruction->info.imm)
1762                                 snprintf(instruction->text,
1763                                                 128,
1764                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1765                                                 "\tSUB_SRLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1766                                                 address,
1767                                                 opcode, instruction->info.rt, instruction->info.ra,
1768                                                 instruction->info.rb,
1769                                                 instruction->info.imm);
1770                         else
1771                                 snprintf(instruction->text,
1772                                                 128,
1773                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1774                                                 "\tSUB\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1775                                                 address,
1776                                                 opcode, instruction->info.rt, instruction->info.ra,
1777                                                 instruction->info.rb);
1778                          break;
1779                 case 30: /* AND_SRLI */
1780                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1781                                         &(instruction->info.ra),
1782                                         &(instruction->info.rb), &(instruction->info.imm));
1783                         instruction->type = NDS32_INSN_DATA_PROC;
1784                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1785                         if (instruction->info.imm)
1786                                 snprintf(instruction->text,
1787                                                 128,
1788                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1789                                                 "\tAND_SRLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1790                                                 address,
1791                                                 opcode, instruction->info.rt, instruction->info.ra,
1792                                                 instruction->info.rb,
1793                                                 instruction->info.imm);
1794                         else
1795                                 snprintf(instruction->text,
1796                                                 128,
1797                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1798                                                 "\tAND\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1799                                                 address,
1800                                                 opcode, instruction->info.rt, instruction->info.ra,
1801                                                 instruction->info.rb);
1802                          break;
1803                 case 31: /* XOR_SRLI */
1804                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1805                                         &(instruction->info.ra),
1806                                         &(instruction->info.rb), &(instruction->info.imm));
1807                         instruction->type = NDS32_INSN_DATA_PROC;
1808                         instruction->info.imm = (instruction->info.imm >> 5) & 0x1F;
1809                         if (instruction->info.imm)
1810                                 snprintf(instruction->text,
1811                                                 128,
1812                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1813                                                 "\tXOR_SRLI\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8 ",%" PRId32,
1814                                                 address,
1815                                                 opcode, instruction->info.rt, instruction->info.ra,
1816                                                 instruction->info.rb,
1817                                                 instruction->info.imm);
1818                         else
1819                                 snprintf(instruction->text,
1820                                                 128,
1821                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1822                                                 "\tXOR\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1823                                                 address,
1824                                                 opcode, instruction->info.rt, instruction->info.ra,
1825                                                 instruction->info.rb);
1826                          break;
1827                 default:
1828                          snprintf(instruction->text,
1829                                          128,
1830                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
1831                                          address,
1832                                          opcode);
1833                          return ERROR_FAIL;
1834         }
1835
1836         return ERROR_OK;
1837 }
1838
1839 static int nds32_parse_alu_2(uint32_t opcode, uint32_t address,
1840                 struct nds32_instruction *instruction)
1841 {
1842         switch (opcode & 0x3F) {
1843                 case 0: /* MAX */
1844                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1845                                         &(instruction->info.ra),
1846                                         &(instruction->info.rb), &(instruction->info.imm));
1847                         instruction->type = NDS32_INSN_DATA_PROC;
1848                         snprintf(instruction->text,
1849                                         128,
1850                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1851                                         "\tMAX\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1852                                         address,
1853                                         opcode, instruction->info.rt, instruction->info.ra,
1854                                         instruction->info.rb);
1855                         break;
1856                 case 1: /* MIN */
1857                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1858                                         &(instruction->info.ra),
1859                                         &(instruction->info.rb), &(instruction->info.imm));
1860                         instruction->type = NDS32_INSN_DATA_PROC;
1861                         snprintf(instruction->text,
1862                                         128,
1863                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1864                                         "\tMIN\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1865                                         address,
1866                                         opcode, instruction->info.rt, instruction->info.ra,
1867                                         instruction->info.rb);
1868                         break;
1869                 case 2: /* AVE */
1870                         nds32_parse_type_3(opcode, &(instruction->info.rt),
1871                                         &(instruction->info.ra),
1872                                         &(instruction->info.rb), &(instruction->info.imm));
1873                         instruction->type = NDS32_INSN_DATA_PROC;
1874                         snprintf(instruction->text,
1875                                         128,
1876                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1877                                         "\tAVE\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
1878                                         address,
1879                                         opcode, instruction->info.rt, instruction->info.ra,
1880                                         instruction->info.rb);
1881                         break;
1882                 case 3: /* ABS */
1883                         nds32_parse_type_2(opcode, &(instruction->info.rt),
1884                                         &(instruction->info.ra),
1885                                         &(instruction->info.imm));
1886                         instruction->type = NDS32_INSN_DATA_PROC;
1887                         snprintf(instruction->text,
1888                                         128,
1889                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1890                                         "\tAVE\t$r%" PRIu8 ",$r%" PRIu8,
1891                                         address,
1892                                         opcode, instruction->info.rt, instruction->info.ra);
1893                         break;
1894                 case 4: { /* CLIPS */
1895                                 uint8_t imm;
1896                                 nds32_parse_type_3(opcode, &(instruction->info.rt),
1897                                                 &(instruction->info.ra),
1898                                                 &imm, &(instruction->info.imm));
1899                                 instruction->info.imm = imm;
1900                                 instruction->type = NDS32_INSN_DATA_PROC;
1901                                 snprintf(instruction->text,
1902                                                 128,
1903                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1904                                                 "\tCLIPS\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1905                                                 address,
1906                                                 opcode, instruction->info.rt, instruction->info.ra,
1907                                                 instruction->info.imm);
1908                         }
1909                         break;
1910                 case 5: { /* CLIP */
1911                                 uint8_t imm;
1912                                 nds32_parse_type_3(opcode, &(instruction->info.rt),
1913                                                 &(instruction->info.ra),
1914                                                 &imm, &(instruction->info.imm));
1915                                 instruction->info.imm = imm;
1916                                 instruction->type = NDS32_INSN_DATA_PROC;
1917                                 snprintf(instruction->text,
1918                                                 128,
1919                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1920                                                 "\tCLIP\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1921                                                 address,
1922                                                 opcode, instruction->info.rt, instruction->info.ra,
1923                                                 instruction->info.imm);
1924                         }
1925                         break;
1926                 case 6: /* CLO */
1927                         nds32_parse_type_2(opcode, &(instruction->info.rt),
1928                                         &(instruction->info.ra),
1929                                         &(instruction->info.imm));
1930                         instruction->type = NDS32_INSN_DATA_PROC;
1931                         snprintf(instruction->text,
1932                                         128,
1933                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1934                                         "\tCLO\t$r%" PRIu8 ",$r%" PRIu8,
1935                                         address,
1936                                         opcode, instruction->info.rt, instruction->info.ra);
1937                         break;
1938                 case 7: /* CLZ */
1939                         nds32_parse_type_2(opcode, &(instruction->info.rt),
1940                                         &(instruction->info.ra),
1941                                         &(instruction->info.imm));
1942                         instruction->type = NDS32_INSN_DATA_PROC;
1943                         snprintf(instruction->text,
1944                                         128,
1945                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1946                                         "\tCLZ\t$r%" PRIu8 ",$r%" PRIu8,
1947                                         address,
1948                                         opcode, instruction->info.rt, instruction->info.ra);
1949                         break;
1950                 case 8: { /* BSET */
1951                                 uint8_t imm;
1952                                 nds32_parse_type_3(opcode, &(instruction->info.rt),
1953                                                 &(instruction->info.ra),
1954                                                 &imm, &(instruction->info.imm));
1955                                 instruction->info.imm = imm;
1956                                 instruction->type = NDS32_INSN_DATA_PROC;
1957                                 snprintf(instruction->text,
1958                                                 128,
1959                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1960                                                 "\tBSET\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1961                                                 address,
1962                                                 opcode, instruction->info.rt, instruction->info.ra,
1963                                                 instruction->info.imm);
1964                         }
1965                         break;
1966                 case 9: { /* BCLR */
1967                                 uint8_t imm;
1968                                 nds32_parse_type_3(opcode, &(instruction->info.rt),
1969                                                 &(instruction->info.ra),
1970                                                 &imm, &(instruction->info.imm));
1971                                 instruction->info.imm = imm;
1972                                 instruction->type = NDS32_INSN_DATA_PROC;
1973                                 snprintf(instruction->text,
1974                                                 128,
1975                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1976                                                 "\tBCLR\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1977                                                 address,
1978                                                 opcode, instruction->info.rt, instruction->info.ra,
1979                                                 instruction->info.imm);
1980                         }
1981                         break;
1982                 case 10: { /* BTGL */
1983                                  uint8_t imm;
1984                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
1985                                                  &(instruction->info.ra),
1986                                                  &imm, &(instruction->info.imm));
1987                                  instruction->info.imm = imm;
1988                                  instruction->type = NDS32_INSN_DATA_PROC;
1989                                  snprintf(instruction->text,
1990                                                  128,
1991                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
1992                                                  "\tBTGL\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
1993                                                  address,
1994                                                  opcode, instruction->info.rt, instruction->info.ra,
1995                                                  instruction->info.imm);
1996                          }
1997                          break;
1998                 case 11: { /* BTST */
1999                                  uint8_t imm;
2000                                  nds32_parse_type_3(opcode, &(instruction->info.rt),
2001                                                  &(instruction->info.ra),
2002                                                  &imm, &(instruction->info.imm));
2003                                  instruction->info.imm = imm;
2004                                  instruction->type = NDS32_INSN_DATA_PROC;
2005                                  snprintf(instruction->text,
2006                                                  128,
2007                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2008                                                  "\tBTST\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2009                                                  address,
2010                                                  opcode, instruction->info.rt, instruction->info.ra,
2011                                                  instruction->info.imm);
2012                          }
2013                          break;
2014                 case 12: /* BSE */
2015                          nds32_parse_type_3(opcode, &(instruction->info.rt),
2016                                          &(instruction->info.ra),
2017                                          &(instruction->info.rb), &(instruction->info.imm));
2018                          instruction->type = NDS32_INSN_DATA_PROC;
2019                          snprintf(instruction->text,
2020                                          128,
2021                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2022                                          "\tBSE\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2023                                          address,
2024                                          opcode, instruction->info.rt, instruction->info.ra,
2025                                          instruction->info.rb);
2026                          break;
2027                 case 13: /* BSP */
2028                          nds32_parse_type_3(opcode, &(instruction->info.rt),
2029                                          &(instruction->info.ra),
2030                                          &(instruction->info.rb), &(instruction->info.imm));
2031                          instruction->type = NDS32_INSN_DATA_PROC;
2032                          snprintf(instruction->text,
2033                                          128,
2034                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2035                                          "\tBSP\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2036                                          address,
2037                                          opcode, instruction->info.rt, instruction->info.ra,
2038                                          instruction->info.rb);
2039                          break;
2040                 case 14: /* FFB */
2041                          nds32_parse_type_3(opcode, &(instruction->info.rt),
2042                                          &(instruction->info.ra),
2043                                          &(instruction->info.rb), &(instruction->info.imm));
2044                          instruction->type = NDS32_INSN_DATA_PROC;
2045                          snprintf(instruction->text,
2046                                          128,
2047                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2048                                          "\tFFB\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2049                                          address,
2050                                          opcode, instruction->info.rt, instruction->info.ra,
2051                                          instruction->info.rb);
2052                          break;
2053                 case 15: /* FFMISM */
2054                          nds32_parse_type_3(opcode, &(instruction->info.rt),
2055                                          &(instruction->info.ra),
2056                                          &(instruction->info.rb), &(instruction->info.imm));
2057                          instruction->type = NDS32_INSN_DATA_PROC;
2058                          snprintf(instruction->text,
2059                                          128,
2060                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2061                                          "\tFFMISM\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2062                                          address,
2063                                          opcode, instruction->info.rt, instruction->info.ra,
2064                                          instruction->info.rb);
2065                          break;
2066                 case 23: /* FFZMISM */
2067                          nds32_parse_type_3(opcode, &(instruction->info.rt),
2068                                          &(instruction->info.ra),
2069                                          &(instruction->info.rb), &(instruction->info.imm));
2070                          instruction->type = NDS32_INSN_DATA_PROC;
2071                          snprintf(instruction->text,
2072                                          128,
2073                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2074                                          "\tFFZMISM\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2075                                          address,
2076                                          opcode, instruction->info.rt, instruction->info.ra,
2077                                          instruction->info.rb);
2078                          break;
2079                 case 32: /* MFUSR */
2080                          nds32_parse_type_1(opcode, &(instruction->info.rt),
2081                                          &(instruction->info.imm));
2082                          instruction->type = NDS32_INSN_RESOURCE_ACCESS;
2083                          snprintf(instruction->text,
2084                                          128,
2085                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2086                                          "\tMFUSR\t$r%" PRIu8 ",#%" PRId32,
2087                                          address,
2088                                          opcode, instruction->info.rt,
2089                                          (instruction->info.imm >> 10) & 0x3FF);
2090                          break;
2091                 case 33: /* MTUSR */
2092                          nds32_parse_type_1(opcode, &(instruction->info.rt),
2093                                          &(instruction->info.imm));
2094                          instruction->type = NDS32_INSN_RESOURCE_ACCESS;
2095                          snprintf(instruction->text,
2096                                          128,
2097                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2098                                          "\tMTUSR\t$r%" PRIu8 ",#%" PRId32,
2099                                          address,
2100                                          opcode, instruction->info.rt,
2101                                          (instruction->info.imm >> 10) & 0x3FF);
2102                          break;
2103                 case 36: /* MUL */
2104                          nds32_parse_type_3(opcode, &(instruction->info.rt),
2105                                          &(instruction->info.ra),
2106                                          &(instruction->info.rb), &(instruction->info.imm));
2107                          instruction->type = NDS32_INSN_DATA_PROC;
2108                          snprintf(instruction->text,
2109                                          128,
2110                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2111                                          "\tMUL\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2112                                          address,
2113                                          opcode, instruction->info.rt, instruction->info.ra,
2114                                          instruction->info.rb);
2115                          break;
2116                 case 40: { /* MULTS64 */
2117                                  uint8_t dt_val;
2118                                  nds32_parse_type_3(opcode, &dt_val,
2119                                                  &(instruction->info.ra),
2120                                                  &(instruction->info.rb), &(instruction->info.imm));
2121                                  instruction->type = NDS32_INSN_DATA_PROC;
2122                                  snprintf(instruction->text,
2123                                                  128,
2124                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2125                                                  "\tMULTS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2126                                                  address,
2127                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2128                                                  instruction->info.rb);
2129                          }
2130                          break;
2131                 case 41: { /* MULT64 */
2132                                  uint8_t dt_val;
2133                                  nds32_parse_type_3(opcode, &dt_val,
2134                                                  &(instruction->info.ra),
2135                                                  &(instruction->info.rb), &(instruction->info.imm));
2136                                  instruction->type = NDS32_INSN_DATA_PROC;
2137                                  snprintf(instruction->text,
2138                                                  128,
2139                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2140                                                  "\tMULT64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2141                                                  address,
2142                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2143                                                  instruction->info.rb);
2144                          }
2145                          break;
2146                 case 42: { /* MADDS64 */
2147                                  uint8_t dt_val;
2148                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2149                                                  &(instruction->info.rb), &(instruction->info.imm));
2150                                  instruction->type = NDS32_INSN_DATA_PROC;
2151                                  snprintf(instruction->text,
2152                                                  128,
2153                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2154                                                  "\tMADDS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2155                                                  address,
2156                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2157                                                  instruction->info.rb);
2158                          }
2159                          break;
2160                 case 43: { /* MADD64 */
2161                                  uint8_t dt_val;
2162                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2163                                                  &(instruction->info.rb), &(instruction->info.imm));
2164                                  instruction->type = NDS32_INSN_DATA_PROC;
2165                                  snprintf(instruction->text,
2166                                                  128,
2167                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2168                                                  "\tMADD64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2169                                                  address,
2170                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2171                                                  instruction->info.rb);
2172                          }
2173                          break;
2174                 case 44: { /* MSUBS64 */
2175                                  uint8_t dt_val;
2176                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2177                                                  &(instruction->info.rb), &(instruction->info.imm));
2178                                  instruction->type = NDS32_INSN_DATA_PROC;
2179                                  snprintf(instruction->text,
2180                                                  128,
2181                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2182                                                  "\tMSUBS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2183                                                  address,
2184                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2185                                                  instruction->info.rb);
2186                          }
2187                          break;
2188                 case 45: { /* MSUB64 */
2189                                  uint8_t dt_val;
2190                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2191                                                  &(instruction->info.rb), &(instruction->info.imm));
2192                                  instruction->type = NDS32_INSN_DATA_PROC;
2193                                  snprintf(instruction->text,
2194                                                  128,
2195                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2196                                                  "\tMSUB64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2197                                                  address,
2198                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2199                                                  instruction->info.rb);
2200                          }
2201                          break;
2202                 case 46: { /* DIVS */
2203                                  uint8_t dt_val;
2204                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2205                                                  &(instruction->info.rb), &(instruction->info.imm));
2206                                  instruction->type = NDS32_INSN_DATA_PROC;
2207                                  snprintf(instruction->text,
2208                                                  128,
2209                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2210                                                  "\tDIVS\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2211                                                  address,
2212                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2213                                                  instruction->info.rb);
2214                          }
2215                          break;
2216                 case 47: { /* DIV */
2217                                  uint8_t dt_val;
2218                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2219                                                  &(instruction->info.rb), &(instruction->info.imm));
2220                                  instruction->type = NDS32_INSN_DATA_PROC;
2221                                  snprintf(instruction->text,
2222                                                  128,
2223                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2224                                                  "\tDIV\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2225                                                  address,
2226                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2227                                                  instruction->info.rb);
2228                          }
2229                          break;
2230                 case 49: { /* MULT32 */
2231                                  uint8_t dt_val;
2232                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2233                                                  &(instruction->info.rb), &(instruction->info.imm));
2234                                  instruction->type = NDS32_INSN_DATA_PROC;
2235                                  snprintf(instruction->text,
2236                                                  128,
2237                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2238                                                  "\tMULT32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2239                                                  address,
2240                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2241                                                  instruction->info.rb);
2242                          }
2243                          break;
2244                 case 51: { /* MADD32 */
2245                                  uint8_t dt_val;
2246                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2247                                                  &(instruction->info.rb), &(instruction->info.imm));
2248                                  instruction->type = NDS32_INSN_DATA_PROC;
2249                                  snprintf(instruction->text,
2250                                                  128,
2251                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2252                                                  "\tMADD32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2253                                                  address,
2254                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2255                                                  instruction->info.rb);
2256                          }
2257                          break;
2258                 case 53: { /* MSUB32 */
2259                                  uint8_t dt_val;
2260                                  nds32_parse_type_3(opcode, &dt_val, &(instruction->info.ra),
2261                                                  &(instruction->info.rb), &(instruction->info.imm));
2262                                  instruction->type = NDS32_INSN_DATA_PROC;
2263                                  snprintf(instruction->text,
2264                                                  128,
2265                                                  "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2266                                                  "\tMSUB32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
2267                                                  address,
2268                                                  opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra,
2269                                                  instruction->info.rb);
2270                          }
2271                          break;
2272                 default:
2273                          snprintf(instruction->text,
2274                                          128,
2275                                          "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
2276                                          address,
2277                                          opcode);
2278                          return ERROR_FAIL;
2279         }
2280
2281         return ERROR_OK;
2282 }
2283
2284 static int nds32_parse_group_4_insn(struct nds32 *nds32, uint32_t opcode,
2285                 uint32_t address, struct nds32_instruction *instruction)
2286 {
2287         uint8_t opc_6;
2288
2289         opc_6 = instruction->info.opc_6;
2290
2291         switch (opc_6 & 0x7) {
2292                 case 0: /* ALU_1 */
2293                         nds32_parse_alu_1(opcode, address, instruction);
2294                         break;
2295                 case 1: /* ALU_2 */
2296                         nds32_parse_alu_2(opcode, address, instruction);
2297                         break;
2298                 case 2: /* MOVI */
2299                         nds32_parse_type_1(opcode, &(instruction->info.rt),
2300                                         &(instruction->info.imm));
2301                         /* sign-extend */
2302                         instruction->info.imm = (instruction->info.imm << 12) >> 12;
2303                         instruction->type = NDS32_INSN_DATA_PROC;
2304                         snprintf(instruction->text,
2305                                         128,
2306                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2307                                         "\tMOVI\t$r%" PRIu8 ",#%" PRId32,
2308                                         address,
2309                                         opcode, instruction->info.rt, instruction->info.imm);
2310                         break;
2311                 case 3: /* SETHI */
2312                         nds32_parse_type_1(opcode, &(instruction->info.rt),
2313                                         &(instruction->info.imm));
2314                         instruction->type = NDS32_INSN_DATA_PROC;
2315                         snprintf(instruction->text,
2316                                         128,
2317                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2318                                         "\tSETHI\t$r%" PRIu8 ",0x%8.8" PRIx32,
2319                                         address,
2320                                         opcode, instruction->info.rt, instruction->info.imm);
2321                         break;
2322                 case 4: /* JI */
2323                         nds32_parse_type_0(opcode, &(instruction->info.imm));
2324                         /* sign-extend */
2325                         instruction->info.imm = (instruction->info.imm << 8) >> 8;
2326                         instruction->type = NDS32_INSN_JUMP_BRANCH;
2327                         if ((instruction->info.imm >> 24) & 0x1) { /* JAL */
2328                                 snprintf(instruction->text,
2329                                                 128,
2330                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2331                                                 "\tJAL\t#%" PRId32,
2332                                                 address,
2333                                                 opcode, instruction->info.imm);
2334                         } else { /* J */
2335                                 snprintf(instruction->text,
2336                                                 128,
2337                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2338                                                 "\tJ\t#%" PRId32,
2339                                                 address,
2340                                                 opcode, instruction->info.imm);
2341                         }
2342                         break;
2343                 case 5: { /* JREG */
2344                                 int32_t imm;
2345                                 nds32_parse_type_0(opcode, &imm);
2346                                 instruction->info.rb = (imm >> 10) & 0x1F;
2347                                 instruction->type = NDS32_INSN_JUMP_BRANCH;
2348                                 switch (imm & 0x1F) {
2349                                         /* TODO */
2350                                         case 0: /* JR */
2351                                                 if (imm & 0x20) { /* RET */
2352                                                         snprintf(instruction->text,
2353                                                                         128,
2354                                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2355                                                                         "\tRET\t$r%" PRIu8,
2356                                                                         address,
2357                                                                         opcode, instruction->info.rb);
2358                                                 } else { /* JR */
2359                                                         snprintf(instruction->text,
2360                                                                         128,
2361                                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2362                                                                         "\tJR\t$r%" PRIu8,
2363                                                                         address,
2364                                                                         opcode, instruction->info.rb);
2365                                                 }
2366                                                 break;
2367                                         case 1: /* JRAL */
2368                                                 instruction->info.rt = (imm >> 20) & 0x1F;
2369                                                 snprintf(instruction->text,
2370                                                                 128,
2371                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2372                                                                 "\tJRAL\t$r%" PRIu8 ",$r%" PRIu8,
2373                                                                 address,
2374                                                                 opcode, instruction->info.rt, instruction->info.rb);
2375                                                 break;
2376                                         case 2: /* JRNEZ */
2377                                                 snprintf(instruction->text,
2378                                                                 128,
2379                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2380                                                                 "\tJRNEZ\t$r%" PRIu8,
2381                                                                 address,
2382                                                                 opcode, instruction->info.rb);
2383                                                 break;
2384                                         case 3: /* JRALNEZ */
2385                                                 instruction->info.rt = (imm >> 20) & 0x1F;
2386                                                 if (instruction->info.rt == R30)
2387                                                         snprintf(instruction->text,
2388                                                                         128,
2389                                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2390                                                                         "\tJRALNEZ\t$r%" PRIu8,
2391                                                                         address,
2392                                                                         opcode, instruction->info.rb);
2393                                                 else
2394                                                         snprintf(instruction->text,
2395                                                                         128,
2396                                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2397                                                                         "\tJRALNEZ\t$r%" PRIu8 ",$r%" PRIu8,
2398                                                                         address,
2399                                                                         opcode,
2400                                                                         instruction->info.rt,
2401                                                                         instruction->info.rb);
2402                                                 break;
2403                                 }
2404                         }
2405                         break;
2406                 case 6: { /* BR1 */
2407                                 int32_t imm;
2408
2409                                 nds32_parse_type_0(opcode, &imm);
2410                                 instruction->type = NDS32_INSN_JUMP_BRANCH;
2411                                 if ((imm >> 14) & 0x1) { /* BNE */
2412                                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2413                                                         &(instruction->info.ra), &(instruction->info.imm));
2414                                         /* sign-extend */
2415                                         instruction->info.imm = (instruction->info.imm << 18) >> 18;
2416                                         snprintf(instruction->text,
2417                                                         128,
2418                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2419                                                         "\tBNE\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2420                                                         address,
2421                                                         opcode, instruction->info.rt, instruction->info.ra,
2422                                                         instruction->info.imm);
2423                                 } else { /* BEQ */
2424                                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2425                                                         &(instruction->info.ra), &(instruction->info.imm));
2426                                         /* sign-extend */
2427                                         instruction->info.imm = (instruction->info.imm << 18) >> 18;
2428                                         snprintf(instruction->text,
2429                                                         128,
2430                                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2431                                                         "\tBEQ\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2432                                                         address,
2433                                                         opcode, instruction->info.rt,
2434                                                         instruction->info.ra,
2435                                                         instruction->info.imm);
2436                                 }
2437                         }
2438                         break;
2439                 case 7: { /* BR2 */
2440                                 int32_t imm;
2441
2442                                 nds32_parse_type_0(opcode, &imm);
2443                                 instruction->type = NDS32_INSN_JUMP_BRANCH;
2444                                 switch ((imm >> 16) & 0xF) {
2445                                         case 2: /* BEQZ */
2446                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2447                                                                 &(instruction->info.imm));
2448                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2449                                                 snprintf(instruction->text,
2450                                                                 128,
2451                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2452                                                                 "\tBEQZ\t$r%" PRIu8 ",#%" PRId32,
2453                                                                 address,
2454                                                                 opcode, instruction->info.rt, instruction->info.imm);
2455                                                 break;
2456                                         case 3: /* BNEZ */
2457                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2458                                                                 &(instruction->info.imm));
2459                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2460                                                 snprintf(instruction->text,
2461                                                                 128,
2462                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2463                                                                 "\tBNEZ\t$r%" PRIu8 ",#%" PRId32,
2464                                                                 address,
2465                                                                 opcode, instruction->info.rt, instruction->info.imm);
2466                                                 break;
2467                                         case 4: /* BGEZ */
2468                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2469                                                                 &(instruction->info.imm));
2470                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2471                                                 snprintf(instruction->text,
2472                                                                 128,
2473                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2474                                                                 "\tBGEZ\t$r%" PRIu8 ",#%" PRId32,
2475                                                                 address,
2476                                                                 opcode, instruction->info.rt, instruction->info.imm);
2477                                                 break;
2478                                         case 5: /* BLTZ */
2479                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2480                                                                 &(instruction->info.imm));
2481                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2482                                                 snprintf(instruction->text,
2483                                                                 128,
2484                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2485                                                                 "\tBLTZ\t$r%" PRIu8 ",#%" PRId32,
2486                                                                 address,
2487                                                                 opcode, instruction->info.rt, instruction->info.imm);
2488                                                 break;
2489                                         case 6: /* BGTZ */
2490                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2491                                                                 &(instruction->info.imm));
2492                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2493                                                 snprintf(instruction->text,
2494                                                                 128,
2495                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2496                                                                 "\tBGTZ\t$r%" PRIu8 ",#%" PRId32,
2497                                                                 address,
2498                                                                 opcode, instruction->info.rt, instruction->info.imm);
2499                                                 break;
2500                                         case 7: /* BLEZ */
2501                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2502                                                                 &(instruction->info.imm));
2503                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2504                                                 snprintf(instruction->text,
2505                                                                 128,
2506                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2507                                                                 "\tBLEZ\t$r%" PRIu8 ",#%" PRId32,
2508                                                                 address,
2509                                                                 opcode, instruction->info.rt, instruction->info.imm);
2510                                                 break;
2511                                         case 12: /* BGEZAL */
2512                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2513                                                                 &(instruction->info.imm));
2514                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2515                                                 snprintf(instruction->text,
2516                                                                 128,
2517                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2518                                                                 "\tBGEZAL\t$r%" PRIu8 ",#%" PRId32,
2519                                                                 address,
2520                                                                 opcode, instruction->info.rt, instruction->info.imm);
2521                                                 break;
2522                                         case 13: /* BLTZAL */
2523                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2524                                                                 &(instruction->info.imm));
2525                                                 instruction->info.imm = (instruction->info.imm << 16) >> 16;
2526                                                 snprintf(instruction->text,
2527                                                                 128,
2528                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2529                                                                 "\tBLTZAL\t$r%" PRIu8 ",#%" PRId32,
2530                                                                 address,
2531                                                                 opcode, instruction->info.rt, instruction->info.imm);
2532                                                 break;
2533                                 }
2534                         }
2535                         break;
2536                 default:
2537                         snprintf(instruction->text,
2538                                         128,
2539                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
2540                                         address,
2541                                         opcode);
2542                         return ERROR_FAIL;
2543         }
2544
2545         return ERROR_OK;
2546 }
2547
2548 static int nds32_parse_group_5_insn(struct nds32 *nds32, uint32_t opcode,
2549                 uint32_t address, struct nds32_instruction *instruction)
2550 {
2551         uint8_t opc_6;
2552
2553         opc_6 = instruction->info.opc_6;
2554
2555         switch (opc_6 & 0x7) {
2556                 case 0: /* ADDI */
2557                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2558                                         &(instruction->info.ra), &(instruction->info.imm));
2559                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
2560                         instruction->type = NDS32_INSN_DATA_PROC;
2561                         snprintf(instruction->text,
2562                                         128,
2563                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2564                                         "\tADDI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2565                                         address,
2566                                         opcode, instruction->info.rt, instruction->info.ra,
2567                                         instruction->info.imm);
2568                         break;
2569                 case 1: /* SUBRI */
2570                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2571                                         &(instruction->info.ra), &(instruction->info.imm));
2572                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
2573                         instruction->type = NDS32_INSN_DATA_PROC;
2574                         snprintf(instruction->text,
2575                                         128,
2576                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2577                                         "\tSUBRI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2578                                         address,
2579                                         opcode, instruction->info.rt, instruction->info.ra,
2580                                         instruction->info.imm);
2581                         break;
2582                 case 2: /* ANDI */
2583                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2584                                         &(instruction->info.ra), &(instruction->info.imm));
2585                         instruction->type = NDS32_INSN_DATA_PROC;
2586                         snprintf(instruction->text,
2587                                         128,
2588                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2589                                         "\tANDI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2590                                         address,
2591                                         opcode, instruction->info.rt, instruction->info.ra,
2592                                         instruction->info.imm);
2593                         break;
2594                 case 3: /* XORI */
2595                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2596                                         &(instruction->info.ra), &(instruction->info.imm));
2597                         instruction->type = NDS32_INSN_DATA_PROC;
2598                         snprintf(instruction->text,
2599                                         128,
2600                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2601                                         "\tXORI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2602                                         address,
2603                                         opcode, instruction->info.rt, instruction->info.ra,
2604                                         instruction->info.imm);
2605                         break;
2606                 case 4: /* ORI */
2607                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2608                                         &(instruction->info.ra), &(instruction->info.imm));
2609                         instruction->type = NDS32_INSN_DATA_PROC;
2610                         snprintf(instruction->text,
2611                                         128,
2612                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2613                                         "\tORI\t$r%" PRIu8 ",$r%" PRIu8 ",0x%8.8" PRIx32,
2614                                         address,
2615                                         opcode, instruction->info.rt, instruction->info.ra,
2616                                         instruction->info.imm);
2617                         break;
2618                 case 6: /* SLTI */
2619                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2620                                         &(instruction->info.ra), &(instruction->info.imm));
2621                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
2622                         instruction->type = NDS32_INSN_DATA_PROC;
2623                         snprintf(instruction->text,
2624                                         128,
2625                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2626                                         "\tSLTI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2627                                         address,
2628                                         opcode, instruction->info.rt, instruction->info.ra,
2629                                         instruction->info.imm);
2630                         break;
2631                 case 7: /* SLTSI */
2632                         nds32_parse_type_2(opcode, &(instruction->info.rt),
2633                                         &(instruction->info.ra), &(instruction->info.imm));
2634                         instruction->info.imm = (instruction->info.imm << 17) >> 17; /* sign-extend */
2635                         instruction->type = NDS32_INSN_DATA_PROC;
2636                         snprintf(instruction->text,
2637                                         128,
2638                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2639                                         "\tSLTSI\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2640                                         address,
2641                                         opcode, instruction->info.rt, instruction->info.ra,
2642                                         instruction->info.imm);
2643                         break;
2644                 default:
2645                         snprintf(instruction->text,
2646                                         128,
2647                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
2648                                         address,
2649                                         opcode);
2650                         return ERROR_FAIL;
2651         }
2652
2653         return ERROR_OK;
2654 }
2655
2656 static int nds32_parse_group_6_insn(struct nds32 *nds32, uint32_t opcode,
2657                 uint32_t address, struct nds32_instruction *instruction)
2658 {
2659         uint8_t opc_6;
2660
2661         opc_6 = instruction->info.opc_6;
2662
2663         switch (opc_6 & 0x7) {
2664                 case 2: { /* MISC */
2665                                 int32_t imm;
2666                                 uint8_t sub_opc;
2667
2668                                 nds32_parse_type_0(opcode, &imm);
2669
2670                                 sub_opc = imm & 0x1F;
2671                                 switch (sub_opc) {
2672                                         case 0: /* STANDBY */
2673                                                 instruction->type = NDS32_INSN_MISC;
2674                                                 snprintf(instruction->text,
2675                                                                 128,
2676                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2677                                                                 "\tSTANDBY\t#%" PRIu32,
2678                                                                 address,
2679                                                                 opcode, (opcode >> 5) & 0x3);
2680                                                 break;
2681                                         case 1: /* CCTL */
2682                                                 /* TODO */
2683                                                 nds32_parse_type_2(opcode, &(instruction->info.rt),
2684                                                                 &(instruction->info.ra), &(instruction->info.imm));
2685                                                 instruction->type = NDS32_INSN_MISC;
2686                                                 snprintf(instruction->text,
2687                                                                 128,
2688                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tCCTL",
2689                                                                 address,
2690                                                                 opcode);
2691                                                 break;
2692                                         case 2: /* MFSR */
2693                                                 nds32_parse_type_1(opcode, &(instruction->info.rt),
2694                                                                 &(instruction->info.imm));
2695                                                 instruction->type = NDS32_INSN_RESOURCE_ACCESS;
2696                                                 snprintf(instruction->text,
2697                                                                 128,
2698                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2699                                                                 "\tMFSR\t$r%" PRIu8 ",#%" PRId32,
2700                                                                 address,
2701                                                                 opcode, instruction->info.rt,
2702                                                                 (instruction->info.imm >> 10) & 0x3FF);
2703                                                 break;
2704                                         case 3: /* MTSR */
2705                                                 nds32_parse_type_1(opcode, &(instruction->info.ra),
2706                                                                 &(instruction->info.imm));
2707                                                 instruction->type = NDS32_INSN_RESOURCE_ACCESS;
2708                                                 snprintf(instruction->text,
2709                                                                 128,
2710                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2711                                                                 "\tMTSR\t$r%" PRIu8 ",#%" PRId32,
2712                                                                 address,
2713                                                                 opcode, instruction->info.ra,
2714                                                                 (instruction->info.imm >> 10) & 0x3FF);
2715                                                 break;
2716                                         case 4: /* IRET */
2717                                                 instruction->type = NDS32_INSN_MISC;
2718                                                 snprintf(instruction->text,
2719                                                                 128,
2720                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tIRET",
2721                                                                 address,
2722                                                                 opcode);
2723                                                 break;
2724                                         case 5: /* TRAP */
2725                                                 instruction->type = NDS32_INSN_MISC;
2726                                                 snprintf(instruction->text,
2727                                                                 128,
2728                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2729                                                                 "\tTRAP\t#%" PRId32,
2730                                                                 address,
2731                                                                 opcode, (imm >> 5) & 0x7FFF);
2732                                                 break;
2733                                         case 6: /* TEQZ */
2734                                                 nds32_parse_type_1(opcode, &(instruction->info.ra),
2735                                                                 &(instruction->info.imm));
2736                                                 instruction->type = NDS32_INSN_MISC;
2737                                                 snprintf(instruction->text,
2738                                                                 128,
2739                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2740                                                                 "\tTEQZ\t$r%" PRIu8 ",#%" PRId32,
2741                                                                 address,
2742                                                                 opcode, instruction->info.ra,
2743                                                                 (instruction->info.imm >> 5) & 0x7FFF);
2744                                                 break;
2745                                         case 7: /* TNEZ */
2746                                                 nds32_parse_type_1(opcode, &(instruction->info.ra),
2747                                                                 &(instruction->info.imm));
2748                                                 instruction->type = NDS32_INSN_MISC;
2749                                                 snprintf(instruction->text,
2750                                                                 128,
2751                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2752                                                                 "\tTNEZ\t$r%" PRIu8 ",#%" PRId32,
2753                                                                 address,
2754                                                                 opcode, instruction->info.ra,
2755                                                                 (instruction->info.imm >> 5) & 0x7FFF);
2756                                                 break;
2757                                         case 8: /* DSB */
2758                                                 instruction->type = NDS32_INSN_MISC;
2759                                                 snprintf(instruction->text,
2760                                                                 128,
2761                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tDSB",
2762                                                                 address,
2763                                                                 opcode);
2764                                                 break;
2765                                         case 9: /* ISB */
2766                                                 instruction->type = NDS32_INSN_MISC;
2767                                                 snprintf(instruction->text,
2768                                                                 128,
2769                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tISB",
2770                                                                 address,
2771                                                                 opcode);
2772                                                 break;
2773                                         case 10: /* BREAK */
2774                                                 instruction->type = NDS32_INSN_MISC;
2775                                                 instruction->info.sub_opc = imm & 0x1F;
2776                                                 instruction->info.imm = (imm >> 5) & 0x7FFF;
2777                                                 snprintf(instruction->text,
2778                                                                 128,
2779                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2780                                                                 "\tBREAK\t#%" PRId32,
2781                                                                 address,
2782                                                                 opcode, instruction->info.imm);
2783                                                 break;
2784                                         case 11: /* SYSCALL */
2785                                                 instruction->type = NDS32_INSN_MISC;
2786                                                 snprintf(instruction->text,
2787                                                                 128,
2788                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2789                                                                 "\tSYSCALL\t#%" PRId32,
2790                                                                 address,
2791                                                                 opcode, (imm >> 5) & 0x7FFF);
2792                                                 break;
2793                                         case 12: /* MSYNC */
2794                                                 instruction->type = NDS32_INSN_MISC;
2795                                                 snprintf(instruction->text,
2796                                                                 128,
2797                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2798                                                                 "\tMSYNC\t#%" PRId32,
2799                                                                 address,
2800                                                                 opcode, (imm >> 5) & 0x7);
2801                                                 break;
2802                                         case 13: /* ISYNC */
2803                                                 nds32_parse_type_1(opcode, &(instruction->info.ra),
2804                                                                 &(instruction->info.imm));
2805                                                 instruction->type = NDS32_INSN_MISC;
2806                                                 snprintf(instruction->text,
2807                                                                 128,
2808                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32
2809                                                                 "\tISYNC\t$r%" PRIu8,
2810                                                                 address,
2811                                                                 opcode, instruction->info.ra);
2812                                                 break;
2813                                         case 14: /* TLBOP */
2814                                                 /* TODO */
2815                                                 nds32_parse_type_2(opcode, &(instruction->info.rt),
2816                                                                 &(instruction->info.ra), &(instruction->info.imm));
2817                                                 instruction->type = NDS32_INSN_RESOURCE_ACCESS;
2818                                                 snprintf(instruction->text,
2819                                                                 128,
2820                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tTLBOP",
2821                                                                 address,
2822                                                                 opcode);
2823                                                 break;
2824                                 }
2825
2826                                 break;
2827                         }
2828                 default:
2829                         snprintf(instruction->text,
2830                                         128,
2831                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
2832                                         address,
2833                                         opcode);
2834                         return ERROR_FAIL;
2835         }
2836
2837         return ERROR_OK;
2838 }
2839
2840 static uint32_t field_mask[9] = {
2841         0x0,
2842         0x1,
2843         0x3,
2844         0x7,
2845         0xF,
2846         0x1F,
2847         0x3F,
2848         0x7F,
2849         0xFF,
2850 };
2851
2852 static uint8_t nds32_extract_field_8u(uint16_t opcode, uint32_t start, uint32_t length)
2853 {
2854         if (0 < length && length < 9)
2855                 return (opcode >> start) & field_mask[length];
2856
2857         return 0;
2858 }
2859
2860 static int nds32_parse_group_0_insn_16(struct nds32 *nds32, uint16_t opcode,
2861                 uint32_t address, struct nds32_instruction *instruction)
2862 {
2863         switch ((opcode >> 10) & 0x7) {
2864                 case 0: /* MOV55 */
2865                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 5);
2866                         instruction->info.ra = nds32_extract_field_8u(opcode, 0, 5);
2867                         instruction->type = NDS32_INSN_MISC;
2868                         snprintf(instruction->text,
2869                                         128,
2870                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2871                                         "\t\tMOV55\t$r%" PRIu8 ",$r%" PRIu8,
2872                                         address,
2873                                         opcode, instruction->info.rt, instruction->info.ra);
2874                         break;
2875                 case 1: /* MOVI55 */
2876                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 5);
2877                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
2878                         instruction->info.imm = (instruction->info.imm << 27) >> 27;
2879                         instruction->type = NDS32_INSN_MISC;
2880                         snprintf(instruction->text,
2881                                         128,
2882                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2883                                         "\t\tMOVI55\t$r%" PRIu8 ",#%" PRId32,
2884                                         address,
2885                                         opcode, instruction->info.rt, instruction->info.imm);
2886                         break;
2887                 case 2: /* ADD45, SUB45 */
2888                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
2889                         instruction->info.rb = nds32_extract_field_8u(opcode, 0, 5);
2890                         instruction->type = NDS32_INSN_DATA_PROC;
2891                         if (nds32_extract_field_8u(opcode, 9, 1) == 0) { /* ADD45 */
2892                                 snprintf(instruction->text,
2893                                                 128,
2894                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2895                                                 "\t\tADD45\t$r%" PRIu8 ",$r%" PRIu8,
2896                                                 address,
2897                                                 opcode, instruction->info.rt, instruction->info.rb);
2898                         } else { /* SUB45 */
2899                                 snprintf(instruction->text,
2900                                                 128,
2901                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2902                                                 "\t\tSUB45\t$r%" PRIu8 ",$r%" PRIu8,
2903                                                 address,
2904                                                 opcode, instruction->info.rt, instruction->info.rb);
2905                         }
2906
2907                         break;
2908                 case 3: /* ADDI45, SUBI45 */
2909                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
2910                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
2911                         instruction->type = NDS32_INSN_DATA_PROC;
2912                         if (nds32_extract_field_8u(opcode, 9, 1) == 0) { /* ADDI45 */
2913                                 snprintf(instruction->text,
2914                                                 128,
2915                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2916                                                 "\t\tADDI45\t$r%" PRIu8 ",#%" PRId32,
2917                                                 address,
2918                                                 opcode, instruction->info.rt, instruction->info.imm);
2919                         } else { /* SUBI45 */
2920                                 snprintf(instruction->text,
2921                                                 128,
2922                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2923                                                 "\t\tSUBI45\t$r%" PRIu8 ",#%" PRId32,
2924                                                 address,
2925                                                 opcode, instruction->info.rt, instruction->info.imm);
2926                         }
2927                         break;
2928                 case 4: /* SRAI45, SRLI45 */
2929                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
2930                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
2931                         instruction->type = NDS32_INSN_DATA_PROC;
2932                         if (nds32_extract_field_8u(opcode, 9, 1) == 0) { /* SRAI45 */
2933                                 snprintf(instruction->text,
2934                                                 128,
2935                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2936                                                 "\t\tSRAI45\t$r%" PRIu8 ",#%" PRId32,
2937                                                 address,
2938                                                 opcode, instruction->info.rt, instruction->info.imm);
2939                         } else { /* SRLI45 */
2940                                 if ((instruction->info.rt == 0) && (instruction->info.imm == 0)) {
2941                                         snprintf(instruction->text,
2942                                                         128,
2943                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16 "\t\tNOP",
2944                                                         address,
2945                                                         opcode);
2946                                 } else {
2947                                         snprintf(instruction->text,
2948                                                         128,
2949                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2950                                                         "\t\tSRLI45\t$r%" PRIu8 ",#%" PRId32,
2951                                                         address,
2952                                                         opcode, instruction->info.rt, instruction->info.imm);
2953                                 }
2954                         }
2955                         break;
2956                 case 5:
2957                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
2958                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
2959                         instruction->type = NDS32_INSN_DATA_PROC;
2960                         if (nds32_extract_field_8u(opcode, 9, 1) == 0) { /* SLLI333 */
2961                                 instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3);
2962                                 snprintf(instruction->text,
2963                                                 128,
2964                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2965                                                 "\t\tSLLI333\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
2966                                                 address,
2967                                                 opcode, instruction->info.rt, instruction->info.ra,
2968                                                 instruction->info.imm);
2969                         } else {
2970                                 instruction->info.sub_opc = nds32_extract_field_8u(opcode, 0, 3);
2971                                 switch (instruction->info.sub_opc) {
2972                                         case 0: /* ZEB33 */
2973                                                 snprintf(instruction->text,
2974                                                                 128,
2975                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2976                                                                 "\t\tZEB33\t$r%" PRIu8 ",$r%" PRIu8,
2977                                                                 address,
2978                                                                 opcode, instruction->info.rt, instruction->info.ra);
2979                                                 break;
2980                                         case 1: /* ZEH33 */
2981                                                 snprintf(instruction->text,
2982                                                                 128,
2983                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2984                                                                 "\t\tZEH33\t$r%" PRIu8 ",$r%" PRIu8,
2985                                                                 address,
2986                                                                 opcode, instruction->info.rt, instruction->info.ra);
2987                                                 break;
2988                                         case 2: /* SEB33 */
2989                                                 snprintf(instruction->text,
2990                                                                 128,
2991                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
2992                                                                 "\t\tSEB33\t$r%" PRIu8 ",$r%" PRIu8,
2993                                                                 address,
2994                                                                 opcode, instruction->info.rt, instruction->info.ra);
2995                                                 break;
2996                                         case 3: /* SEH33 */
2997                                                 snprintf(instruction->text,
2998                                                                 128,
2999                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3000                                                                 "\t\tSEH33\t$r%" PRIu8 ",$r%" PRIu8,
3001                                                                 address,
3002                                                                 opcode, instruction->info.rt, instruction->info.ra);
3003                                                 break;
3004                                         case 4: /* XLSB33 */
3005                                                 snprintf(instruction->text,
3006                                                                 128,
3007                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3008                                                                 "\t\tXLSB33\t$r%" PRIu8 ",$r%" PRIu8,
3009                                                                 address,
3010                                                                 opcode, instruction->info.rt, instruction->info.ra);
3011                                                 break;
3012                                         case 5: /* XLLB33 */
3013                                                 snprintf(instruction->text,
3014                                                                 128,
3015                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3016                                                                 "\t\tXLLB33\t$r%" PRIu8 ",$r%" PRIu8,
3017                                                                 address,
3018                                                                 opcode, instruction->info.rt, instruction->info.ra);
3019                                                 break;
3020                                         case 6: /* BMSKI33 */
3021                                                 instruction->info.ra = 0;
3022                                                 instruction->info.imm = nds32_extract_field_8u(opcode, 3, 3);
3023                                                 snprintf(instruction->text,
3024                                                                 128,
3025                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3026                                                                 "\t\tBMSKI33\t$r%" PRIu8 ",$r%" PRId32,
3027                                                                 address,
3028                                                                 opcode, instruction->info.rt, instruction->info.imm);
3029                                                 break;
3030                                         case 7: /* FEXTI33 */
3031                                                 instruction->info.ra = 0;
3032                                                 instruction->info.imm = nds32_extract_field_8u(opcode, 3, 3);
3033                                                 snprintf(instruction->text,
3034                                                                 128,
3035                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3036                                                                 "\t\tFEXTI33\t$r%" PRIu8 ",$r%" PRId32,
3037                                                                 address,
3038                                                                 opcode, instruction->info.rt, instruction->info.imm);
3039                                                 break;
3040                                         default:
3041                                                 snprintf(instruction->text,
3042                                                                 128,
3043                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx16
3044                                                                 "\tUNDEFINED INSTRUCTION",
3045                                                                 address,
3046                                                                 opcode);
3047                                                 return ERROR_FAIL;
3048                                 }
3049                         }
3050                         break;
3051                 case 6: /* ADD333, SUB333 */
3052                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3053                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3054                         instruction->info.rb = nds32_extract_field_8u(opcode, 0, 3);
3055                         instruction->type = NDS32_INSN_DATA_PROC;
3056                         if (nds32_extract_field_8u(opcode, 9, 1) == 0) { /* ADD333 */
3057                                 snprintf(instruction->text,
3058                                                 128,
3059                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3060                                                 "\t\tADD333\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
3061                                                 address,
3062                                                 opcode, instruction->info.rt, instruction->info.ra,
3063                                                 instruction->info.rb);
3064                         } else { /* SUB333 */
3065                                 snprintf(instruction->text,
3066                                                 128,
3067                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3068                                                 "\t\tSUB333\t$r%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8,
3069                                                 address,
3070                                                 opcode, instruction->info.rt, instruction->info.ra,
3071                                                 instruction->info.rb);
3072                         }
3073                         break;
3074                 case 7: /* ADDI333, SUBI333 */
3075                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3076                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3077                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3);
3078                         instruction->type = NDS32_INSN_DATA_PROC;
3079                         if (nds32_extract_field_8u(opcode, 9, 1) == 0) { /* ADDI333 */
3080                                 snprintf(instruction->text,
3081                                                 128,
3082                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3083                                                 "\t\tADDI333\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
3084                                                 address,
3085                                                 opcode, instruction->info.rt, instruction->info.ra,
3086                                                 instruction->info.imm);
3087                         } else { /* SUBI333 */
3088                                 snprintf(instruction->text,
3089                                                 128,
3090                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3091                                                 "\t\tSUBI333\t$r%" PRIu8 ",$r%" PRIu8 ",#%" PRId32,
3092                                                 address,
3093                                                 opcode, instruction->info.rt, instruction->info.ra,
3094                                                 instruction->info.imm);
3095                         }
3096                         break;
3097                 default:
3098                         snprintf(instruction->text,
3099                                         128,
3100                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx16 "\tUNDEFINED INSTRUCTION",
3101                                         address,
3102                                         opcode);
3103                         return ERROR_FAIL;
3104         }
3105
3106         return ERROR_OK;
3107 }
3108
3109 static int nds32_parse_group_1_insn_16(struct nds32 *nds32, uint16_t opcode,
3110                 uint32_t address, struct nds32_instruction *instruction)
3111 {
3112         switch ((opcode >> 9) & 0xF) {
3113                 case 0: /* LWI333 */
3114                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3115                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3116                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3) << 2;
3117                         instruction->type = NDS32_INSN_LOAD_STORE;
3118                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3119                                         &(instruction->access_start));
3120                         instruction->access_start += instruction->info.imm;
3121                         instruction->access_end = instruction->access_start + 4;
3122                         snprintf(instruction->text,
3123                                         128,
3124                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3125                                         "\t\tLWI333\t$r%" PRIu8 ",[$r%" PRIu8 "+(#%" PRId32 ")]",
3126                                         address,
3127                                         opcode, instruction->info.rt, instruction->info.ra,
3128                                         instruction->info.imm);
3129                         break;
3130                 case 1: /* LWI333.BI */
3131                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3132                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3133                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3);
3134                         instruction->type = NDS32_INSN_LOAD_STORE;
3135                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3136                                         &(instruction->access_start));
3137                         instruction->access_end = instruction->access_start + 4;
3138                         snprintf(instruction->text,
3139                                         128,
3140                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3141                                         "\t\tLWI333.BI\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
3142                                         address,
3143                                         opcode, instruction->info.rt, instruction->info.ra,
3144                                         instruction->info.imm << 2);
3145                         break;
3146                 case 2: /* LHI333 */
3147                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3148                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3149                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3) << 1;
3150                         instruction->type = NDS32_INSN_LOAD_STORE;
3151                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3152                                         &(instruction->access_start));
3153                         instruction->access_start += instruction->info.imm;
3154                         instruction->access_end = instruction->access_start + 2;
3155                         snprintf(instruction->text,
3156                                         128,
3157                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3158                                         "\t\tLHI333\t$r%" PRIu8 ",[$r%" PRIu8 "+(#%" PRId32 ")]",
3159                                         address,
3160                                         opcode, instruction->info.rt, instruction->info.ra,
3161                                         instruction->info.imm);
3162                         break;
3163                 case 3: /* LBI333 */
3164                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3165                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3166                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3);
3167                         instruction->type = NDS32_INSN_LOAD_STORE;
3168                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3169                                         &(instruction->access_start));
3170                         instruction->access_start += instruction->info.imm;
3171                         instruction->access_end = instruction->access_start + 1;
3172                         snprintf(instruction->text,
3173                                         128,
3174                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3175                                         "\t\tLBI333\t$r%" PRIu8 ",[$r%" PRIu8 "+(#%" PRId32 ")]",
3176                                         address,
3177                                         opcode, instruction->info.rt, instruction->info.ra,
3178                                         instruction->info.imm);
3179                         break;
3180                 case 4: /* SWI333 */
3181                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3182                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3183                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3) << 2;
3184                         instruction->type = NDS32_INSN_LOAD_STORE;
3185                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3186                                         &(instruction->access_start));
3187                         instruction->access_start += instruction->info.imm;
3188                         instruction->access_end = instruction->access_start + 4;
3189                         snprintf(instruction->text,
3190                                         128,
3191                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3192                                         "\t\tSWI333\t$r%" PRIu8 ",[$r%" PRIu8 "+(#%" PRId32 ")]",
3193                                         address,
3194                                         opcode, instruction->info.rt, instruction->info.ra,
3195                                         instruction->info.imm);
3196                         break;
3197                 case 5: /* SWI333.BI */
3198                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3199                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3200                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3) << 2;
3201                         instruction->type = NDS32_INSN_LOAD_STORE;
3202                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3203                                         &(instruction->access_start));
3204                         instruction->access_end = instruction->access_start + 4;
3205                         snprintf(instruction->text,
3206                                         128,
3207                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3208                                         "\t\tSWI333.BI\t$r%" PRIu8 ",[$r%" PRIu8 "],#%" PRId32,
3209                                         address,
3210                                         opcode, instruction->info.rt, instruction->info.ra,
3211                                         instruction->info.imm);
3212                         break;
3213                 case 6: /* SHI333 */
3214                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3215                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3216                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3) << 1;
3217                         instruction->type = NDS32_INSN_LOAD_STORE;
3218                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3219                                         &(instruction->access_start));
3220                         instruction->access_start += instruction->info.imm;
3221                         instruction->access_end = instruction->access_start + 2;
3222                         snprintf(instruction->text,
3223                                         128,
3224                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3225                                         "\t\tSHI333\t$r%" PRIu8 ",[$r%" PRIu8 "+(#%" PRId32 ")]",
3226                                         address,
3227                                         opcode, instruction->info.rt, instruction->info.ra,
3228                                         instruction->info.imm);
3229                         break;
3230                 case 7: /* SBI333 */
3231                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3232                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3233                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 3);
3234                         instruction->type = NDS32_INSN_LOAD_STORE;
3235                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3236                                         &(instruction->access_start));
3237                         instruction->access_start += instruction->info.imm;
3238                         instruction->access_end = instruction->access_start + 1;
3239                         snprintf(instruction->text,
3240                                         128,
3241                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3242                                         "\t\tSHI333\t$r%" PRIu8 ",[$r%" PRIu8 "+(#%" PRId32 ")]",
3243                                         address,
3244                                         opcode, instruction->info.rt, instruction->info.ra,
3245                                         instruction->info.imm);
3246                         break;
3247                 case 8: /* ADDRI36.SP */
3248                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3249                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 6) << 2;
3250                         instruction->type = NDS32_INSN_DATA_PROC;
3251                         snprintf(instruction->text,
3252                                         128,
3253                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3254                                         "\t\tADDRI36.SP\t$r%" PRIu8 ",#%" PRId32,
3255                                         address,
3256                                         opcode, instruction->info.rt, instruction->info.imm);
3257                         break;
3258                 case 9: /* LWI45.FE */
3259                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
3260                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
3261                         instruction->info.imm -= 32;
3262                         instruction->info.imm <<= 2;
3263                         instruction->type = NDS32_INSN_LOAD_STORE;
3264                         nds32_get_mapped_reg(nds32, R8, &(instruction->access_start));
3265                         instruction->access_start += instruction->info.imm;
3266                         instruction->access_end = instruction->access_start + 4;
3267                         snprintf(instruction->text,
3268                                         128,
3269                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3270                                         "\t\tLWI45.FE\t$r%" PRIu8 ",[#%" PRId32 "]",
3271                                         address,
3272                                         opcode, instruction->info.rt, instruction->info.imm);
3273                         break;
3274                 case 10: /* LWI450 */
3275                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
3276                         instruction->info.ra = nds32_extract_field_8u(opcode, 0, 5);
3277                         instruction->type = NDS32_INSN_LOAD_STORE;
3278                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3279                                         &(instruction->access_start));
3280                         instruction->access_end = instruction->access_start + 4;
3281                         snprintf(instruction->text,
3282                                         128,
3283                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3284                                         "\t\tLWI450\t$r%" PRIu8 ",$r%" PRIu8,
3285                                         address,
3286                                         opcode, instruction->info.rt, instruction->info.ra);
3287                         break;
3288                 case 11: /* SWI450 */
3289                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
3290                         instruction->info.ra = nds32_extract_field_8u(opcode, 0, 5);
3291                         instruction->type = NDS32_INSN_LOAD_STORE;
3292                         nds32_get_mapped_reg(nds32, instruction->info.ra,
3293                                         &(instruction->access_start));
3294                         instruction->access_end = instruction->access_start + 4;
3295                         snprintf(instruction->text,
3296                                         128,
3297                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3298                                         "\t\tSWI450\t$r%" PRIu8 ",$r%" PRIu8,
3299                                         address,
3300                                         opcode, instruction->info.rt, instruction->info.ra);
3301                         break;
3302                 case 12:
3303                 case 13:
3304                 case 14:
3305                 case 15: /* LWI37, SWI37 */
3306                         instruction->info.rt = nds32_extract_field_8u(opcode, 8, 3);
3307                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 7) << 2;
3308                         instruction->type = NDS32_INSN_LOAD_STORE;
3309                         nds32_get_mapped_reg(nds32, R28, &(instruction->access_start));
3310                         instruction->access_start += instruction->info.imm;
3311                         instruction->access_end = instruction->access_start + 4;
3312                         if (nds32_extract_field_8u(opcode, 7, 1) == 0) { /* LWI37 */
3313                                 snprintf(instruction->text,
3314                                                 128,
3315                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3316                                                 "\t\tLWI37\t$r%" PRIu8 ",[fp+#%" PRId32 "]",
3317                                                 address,
3318                                                 opcode, instruction->info.rt, instruction->info.imm);
3319                         } else { /* SWI37 */
3320                                 snprintf(instruction->text,
3321                                                 128,
3322                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3323                                                 "\t\tSWI37\t$r%" PRIu8 ",[fp+#%" PRId32 "]",
3324                                                 address,
3325                                                 opcode, instruction->info.rt, instruction->info.imm);
3326                         }
3327                         break;
3328                 default: /* ERROR */
3329                         snprintf(instruction->text,
3330                                         128,
3331                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx16 "\tUNDEFINED INSTRUCTION",
3332                                         address,
3333                                         opcode);
3334                         return ERROR_FAIL;
3335         }
3336
3337         return ERROR_OK;
3338 }
3339
3340 static int nds32_parse_group_2_insn_16(struct nds32 *nds32, uint16_t opcode,
3341                 uint32_t address, struct nds32_instruction *instruction)
3342 {
3343         switch ((opcode >> 11) & 0x3) {
3344                 case 0: /* BEQZ38 */
3345                         instruction->info.rt = nds32_extract_field_8u(opcode, 8, 3);
3346                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 8);
3347                         instruction->info.imm = (instruction->info.imm << 24) >> 24;
3348                         instruction->type = NDS32_INSN_JUMP_BRANCH;
3349                         snprintf(instruction->text,
3350                                         128,
3351                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3352                                         "\t\tBEQZ38\t$r%" PRIu8 ",#%" PRId32,
3353                                         address,
3354                                         opcode, instruction->info.rt, instruction->info.imm);
3355                         break;
3356                 case 1: /* BNEZ38 */
3357                         instruction->info.rt = nds32_extract_field_8u(opcode, 8, 3);
3358                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 8);
3359                         instruction->info.imm = (instruction->info.imm << 24) >> 24;
3360                         instruction->type = NDS32_INSN_JUMP_BRANCH;
3361                         snprintf(instruction->text,
3362                                         128,
3363                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3364                                         "\t\tBNEZ38\t$r%" PRIu8 ",#%" PRId32,
3365                                         address,
3366                                         opcode, instruction->info.rt, instruction->info.imm);
3367                         break;
3368                 case 2: /* BEQS38,J8 */
3369                         instruction->info.rt = nds32_extract_field_8u(opcode, 8, 3);
3370                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 8);
3371                         instruction->info.imm = (instruction->info.imm << 24) >> 24;
3372                         instruction->type = NDS32_INSN_JUMP_BRANCH;
3373                         if (instruction->info.rt == 5) { /* J8 */
3374                                 snprintf(instruction->text,
3375                                                 128,
3376                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3377                                                 "\t\tJ8\t#%" PRId32,
3378                                                 address,
3379                                                 opcode, instruction->info.imm);
3380                         } else { /* BEQS38 */
3381                                 snprintf(instruction->text,
3382                                                 128,
3383                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3384                                                 "\t\tBEQS38\t$r%" PRIu8 ",#%" PRId32,
3385                                                 address,
3386                                                 opcode, instruction->info.rt, instruction->info.imm);
3387                         }
3388                         break;
3389                 case 3: /* BNES38, JR5, RET5, JRAL5 */
3390                         instruction->info.rt = nds32_extract_field_8u(opcode, 8, 3);
3391                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 8);
3392                         instruction->info.imm = (instruction->info.imm << 24) >> 24;
3393                         instruction->type = NDS32_INSN_JUMP_BRANCH;
3394                         if (instruction->info.rt == 5) {
3395                                 instruction->info.imm = 0;
3396                                 instruction->info.rb = nds32_extract_field_8u(opcode, 0, 5);
3397                                 switch (nds32_extract_field_8u(opcode, 5, 3)) {
3398                                         case 0: /* JR5 */
3399                                                 snprintf(instruction->text,
3400                                                                 128,
3401                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3402                                                                 "\t\tJR5\t$r%" PRIu8,
3403                                                                 address,
3404                                                                 opcode, instruction->info.rb);
3405                                                 break;
3406                                         case 1: /* JRAL5 */
3407                                                 snprintf(instruction->text,
3408                                                                 128,
3409                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3410                                                                 "\t\tJRAL5\t$r%" PRIu8,
3411                                                                 address,
3412                                                                 opcode, instruction->info.rb);
3413                                                 break;
3414                                         case 2: /* EX9.IT */
3415                                                 instruction->info.rb = 0;
3416                                                 instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
3417                                                 /* TODO: implement real instruction semantics */
3418                                                 snprintf(instruction->text,
3419                                                                 128,
3420                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3421                                                                 "\t\tEX9.IT\t#%" PRId32,
3422                                                                 address,
3423                                                                 opcode, instruction->info.imm);
3424                                                 break;
3425                                         case 4: /* RET5 */
3426                                                 snprintf(instruction->text,
3427                                                                 128,
3428                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3429                                                                 "\t\tRET5\t$r%" PRIu8,
3430                                                                 address,
3431                                                                 opcode, instruction->info.rb);
3432                                                 break;
3433                                         case 5: /* ADD5.PC */
3434                                                 instruction->info.rt = 0;
3435                                                 instruction->info.rt = nds32_extract_field_8u(opcode, 0, 5);
3436                                                 instruction->type = NDS32_INSN_DATA_PROC;
3437                                                 snprintf(instruction->text,
3438                                                                 128,
3439                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3440                                                                 "\t\tADD5.PC\t$r%" PRIu8,
3441                                                                 address,
3442                                                                 opcode, instruction->info.rt);
3443                                                 break;
3444                                         default:
3445                                                 snprintf(instruction->text,
3446                                                                 128,
3447                                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx16
3448                                                                 "\tUNDEFINED INSTRUCTION",
3449                                                                 address,
3450                                                                 opcode);
3451                                                 return ERROR_FAIL;
3452                                 }
3453                         } else { /* BNES38 */
3454                                 snprintf(instruction->text,
3455                                                 128,
3456                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3457                                                 "\t\tBNES38\t$r%" PRIu8 ",#%" PRId32,
3458                                                 address,
3459                                                 opcode, instruction->info.rt, instruction->info.imm);
3460                         }
3461                         break;
3462         }
3463
3464         return ERROR_OK;
3465 }
3466
3467 static int nds32_parse_group_3_insn_16(struct nds32 *nds32, uint16_t opcode,
3468                 uint32_t address, struct nds32_instruction *instruction)
3469 {
3470         switch ((opcode >> 11) & 0x3) {
3471                 case 0:
3472                         switch ((opcode >> 9) & 0x3) {
3473                                 case 0: /* SLTS45 */
3474                                         instruction->info.ra = nds32_extract_field_8u(opcode, 5, 4);
3475                                         instruction->info.rb = nds32_extract_field_8u(opcode, 0, 5);
3476                                         instruction->type = NDS32_INSN_DATA_PROC;
3477                                         snprintf(instruction->text,
3478                                                         128,
3479                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3480                                                         "\t\tSLTS45\t$r%" PRIu8 ",$r%" PRIu8,
3481                                                         address,
3482                                                         opcode, instruction->info.ra, instruction->info.rb);
3483                                         break;
3484                                 case 1: /* SLT45 */
3485                                         instruction->info.ra = nds32_extract_field_8u(opcode, 5, 4);
3486                                         instruction->info.rb = nds32_extract_field_8u(opcode, 0, 5);
3487                                         instruction->type = NDS32_INSN_DATA_PROC;
3488                                         snprintf(instruction->text,
3489                                                         128,
3490                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3491                                                         "\t\tSLT45\t$r%" PRIu8 ",$r%" PRIu8,
3492                                                         address,
3493                                                         opcode, instruction->info.ra, instruction->info.rb);
3494                                         break;
3495                                 case 2: /* SLTSI45 */
3496                                         instruction->info.ra = nds32_extract_field_8u(opcode, 5, 4);
3497                                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
3498                                         instruction->type = NDS32_INSN_DATA_PROC;
3499                                         snprintf(instruction->text,
3500                                                         128,
3501                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3502                                                         "\t\tSLTSI45\t$r%" PRIu8 ",#%" PRId32,
3503                                                         address,
3504                                                         opcode, instruction->info.ra, instruction->info.imm);
3505                                         break;
3506                                 case 3: /* SLTI45 */
3507                                         instruction->info.ra = nds32_extract_field_8u(opcode, 5, 4);
3508                                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5);
3509                                         instruction->type = NDS32_INSN_DATA_PROC;
3510                                         snprintf(instruction->text,
3511                                                         128,
3512                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3513                                                         "\t\tSLTI45\t$r%" PRIu8 ",#%" PRId32,
3514                                                         address,
3515                                                         opcode, instruction->info.ra, instruction->info.imm);
3516                                         break;
3517                         }
3518                         break;
3519                 case 1:
3520                         switch ((opcode >> 9) & 0x3) {
3521                                 case 0:
3522                                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 8);
3523                                         instruction->info.imm = (instruction->info.imm << 24) >> 24;
3524                                         instruction->type = NDS32_INSN_JUMP_BRANCH;
3525                                         if (nds32_extract_field_8u(opcode, 8, 1) == 0) { /* BEQZS8 */
3526                                                 snprintf(instruction->text,
3527                                                                 128,
3528                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3529                                                                 "\t\tBEQZS8\t#%" PRId32,
3530                                                                 address,
3531                                                                 opcode, instruction->info.imm);
3532                                         } else { /* BNEZS8 */
3533                                                 snprintf(instruction->text,
3534                                                                 128,
3535                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3536                                                                 "\t\tBNEZS8\t#%" PRId32,
3537                                                                 address,
3538                                                                 opcode, instruction->info.imm);
3539                                         }
3540                                         break;
3541                                 case 1: /* BREAK16 */
3542                                         if (((opcode >> 5) & 0xF) == 0) {
3543                                                 instruction->type = NDS32_INSN_MISC;
3544                                                 snprintf(instruction->text,
3545                                                                 128,
3546                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3547                                                                 "\t\tBREAK16\t#%" PRId16,
3548                                                                 address,
3549                                                                 opcode, (int16_t)(opcode & 0x1F));
3550                                         } else { /* EX9.IT */
3551                                                 instruction->type = NDS32_INSN_MISC;
3552                                                 /* TODO: implement real instruction semantics */
3553                                                 snprintf(instruction->text,
3554                                                                 128,
3555                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3556                                                                 "\t\tEX9.IT\t#%" PRId16,
3557                                                                 address,
3558                                                                 opcode, (int16_t)(opcode & 0x1FF));
3559                                         }
3560                                         break;
3561                                 case 2: /* ADDI10S */
3562                                 case 3:
3563                                         instruction->info.imm = opcode & 0x3FF;
3564                                         instruction->info.imm = (instruction->info.imm << 22) >> 22;
3565                                         instruction->type = NDS32_INSN_DATA_PROC;
3566                                         snprintf(instruction->text,
3567                                                         128,
3568                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3569                                                         "\t\tADDI10.SP\t#%" PRId32,
3570                                                         address,
3571                                                         opcode, instruction->info.imm);
3572                                         break;
3573                         }
3574                         break;
3575                 case 2:
3576                         instruction->info.rt = nds32_extract_field_8u(opcode, 8, 3);
3577                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 7) << 2;
3578                         instruction->type = NDS32_INSN_LOAD_STORE;
3579                         nds32_get_mapped_reg(nds32, R31, &(instruction->access_start));
3580                         instruction->access_start += instruction->info.imm;
3581                         instruction->access_end = instruction->access_start + 4;
3582                         if (nds32_extract_field_8u(opcode, 7, 1) == 0) { /* LWI37.SP */
3583                                 snprintf(instruction->text,
3584                                                 128,
3585                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3586                                                 "\t\tLWI37.SP\t$r%" PRIu8 ",[+#%" PRId32 "]",
3587                                                 address,
3588                                                 opcode, instruction->info.rt, instruction->info.imm);
3589                         } else { /* SWI37.SP */
3590                                 snprintf(instruction->text,
3591                                                 128,
3592                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3593                                                 "\t\tSWI37.SP\t$r%" PRIu8 ",[+#%" PRId32 "]",
3594                                                 address,
3595                                                 opcode, instruction->info.rt, instruction->info.imm);
3596                         }
3597                         break;
3598                 case 3:
3599                         switch ((opcode >> 9) & 0x3) {
3600                                 case 0: /* IFCALL9 */
3601                                         instruction->info.imm = opcode & 0x1FF;
3602                                         instruction->type = NDS32_INSN_JUMP_BRANCH;
3603                                         snprintf(instruction->text,
3604                                                         128,
3605                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3606                                                         "\t\tIFCALL9\t#%" PRId32 "",
3607                                                         address,
3608                                                         opcode, instruction->info.imm);
3609                                         break;
3610                                 case 1: /* MOVPI45 */
3611                                         instruction->info.imm = nds32_extract_field_8u(opcode, 0, 5) + 16;
3612                                         instruction->info.rt = nds32_extract_field_8u(opcode, 5, 4);
3613                                         instruction->type = NDS32_INSN_MISC;
3614                                         snprintf(instruction->text,
3615                                                         128,
3616                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3617                                                         "\t\tMOVPI45\t$r%" PRIu8 ",#%" PRId32 "",
3618                                                         address,
3619                                                         opcode, instruction->info.rt, instruction->info.imm);
3620                                         break;
3621                                 case 2: /* PUSH25, POP25, MOVD44 */
3622                                         switch ((opcode >> 7) & 0x3) {
3623                                                 case 0: /* PUSH25 */
3624                                                         {
3625                                                                 uint8_t re;
3626                                                                 uint8_t gpr_count;
3627
3628                                                                 instruction->type = NDS32_INSN_LOAD_STORE;
3629                                                                 instruction->info.imm =
3630                                                                         nds32_extract_field_8u(opcode, 0, 5) << 3;
3631                                                                 re = nds32_extract_field_8u(opcode, 5, 2);
3632
3633                                                                 if (re == 0)
3634                                                                         re = 6;
3635                                                                 else if (re == 1)
3636                                                                         re = 8;
3637                                                                 else if (re == 2)
3638                                                                         re = 10;
3639                                                                 else if (re == 3)
3640                                                                         re = 14;
3641
3642                                                                 instruction->info.rd = re;
3643                                                                 /* GPRs list: R6 ~ Re and fp, gp, lp */
3644                                                                 gpr_count = 3 + (re - 5);
3645
3646                                                                 nds32_get_mapped_reg(nds32, R31,
3647                                                                                 &(instruction->access_end));
3648                                                                 instruction->access_start =
3649                                                                         instruction->access_end - (gpr_count * 4);
3650
3651                                                                 snprintf(instruction->text,
3652                                                                                 128,
3653                                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3654                                                                                 "\t\tPUSH25\t$r%" PRIu8 ",#%" PRId32,
3655                                                                                 address,
3656                                                                                 opcode, instruction->info.rd,
3657                                                                                 instruction->info.imm);
3658                                                         }
3659                                                         break;
3660                                                 case 1: /* POP25 */
3661                                                         {
3662                                                                 uint8_t re;
3663                                                                 uint8_t gpr_count;
3664
3665                                                                 instruction->type = NDS32_INSN_LOAD_STORE;
3666                                                                 instruction->info.imm =
3667                                                                         nds32_extract_field_8u(opcode, 0, 5) << 3;
3668                                                                 re = nds32_extract_field_8u(opcode, 5, 2);
3669
3670                                                                 if (re == 0)
3671                                                                         re = 6;
3672                                                                 else if (re == 1)
3673                                                                         re = 8;
3674                                                                 else if (re == 2)
3675                                                                         re = 10;
3676                                                                 else if (re == 3)
3677                                                                         re = 14;
3678
3679                                                                 instruction->info.rd = re;
3680                                                                 /* GPRs list: R6 ~ Re and fp, gp, lp */
3681                                                                 gpr_count = 3 + (re - 5);
3682
3683                                                                 nds32_get_mapped_reg(nds32, R31,
3684                                                                                 &(instruction->access_start));
3685                                                                 instruction->access_start += instruction->info.imm;
3686                                                                 instruction->access_end =
3687                                                                         instruction->access_start + (gpr_count * 4);
3688
3689                                                                 snprintf(instruction->text,
3690                                                                                 128,
3691                                                                                 "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3692                                                                                 "\t\tPOP25\t$r%" PRIu8 ",#%" PRId32,
3693                                                                                 address,
3694                                                                                 opcode, instruction->info.rd,
3695                                                                                 instruction->info.imm);
3696                                                         }
3697                                                         break;
3698                                                 case 2: /* MOVD44 */
3699                                                 case 3:
3700                                                         instruction->info.ra =
3701                                                                 nds32_extract_field_8u(opcode, 0, 4) * 2;
3702                                                         instruction->info.rt =
3703                                                                 nds32_extract_field_8u(opcode, 4, 4) * 2;
3704                                                         instruction->type = NDS32_INSN_MISC;
3705                                                         snprintf(instruction->text,
3706                                                                         128,
3707                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3708                                                                         "\t\tMOVD44\t$r%" PRIu8 ",$r%" PRIu8,
3709                                                                         address,
3710                                                                         opcode, instruction->info.rt, instruction->info.ra);
3711                                                         break;
3712                                         }
3713                                         break;
3714                                 case 3: /* NEG33, NOT33, MUL33, XOR33, AND33, OR33 */
3715                                         instruction->info.ra = nds32_extract_field_8u(opcode, 3, 3);
3716                                         instruction->info.rt = nds32_extract_field_8u(opcode, 6, 3);
3717                                         instruction->type = NDS32_INSN_DATA_PROC;
3718                                         switch (opcode & 0x7) {
3719                                                 case 2: /* NEG33 */
3720                                                         snprintf(instruction->text,
3721                                                                         128,
3722                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3723                                                                         "\t\tNEG33\t$r%" PRIu8 ",$r%" PRIu8,
3724                                                                         address,
3725                                                                         opcode, instruction->info.rt, instruction->info.ra);
3726                                                         break;
3727                                                 case 3: /* NOT33 */
3728                                                         snprintf(instruction->text,
3729                                                                         128,
3730                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3731                                                                         "\t\tNOT33\t$r%" PRIu8 ",$r%" PRIu8,
3732                                                                         address,
3733                                                                         opcode, instruction->info.rt, instruction->info.ra);
3734                                                         break;
3735                                                 case 4: /* MUL33 */
3736                                                         snprintf(instruction->text,
3737                                                                         128,
3738                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3739                                                                         "\t\tMUL33\t$r%" PRIu8 ",$r%" PRIu8,
3740                                                                         address,
3741                                                                         opcode, instruction->info.rt, instruction->info.ra);
3742                                                         break;
3743                                                 case 5: /* XOR33 */
3744                                                         snprintf(instruction->text,
3745                                                                         128,
3746                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3747                                                                         "\t\tXOR33\t$r%" PRIu8 ",$r%" PRIu8,
3748                                                                         address,
3749                                                                         opcode, instruction->info.rt, instruction->info.ra);
3750                                                         break;
3751                                                 case 6: /* AND33 */
3752                                                         snprintf(instruction->text,
3753                                                                         128,
3754                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3755                                                                         "\t\tAND33\t$r%" PRIu8 ",$r%" PRIu8,
3756                                                                         address,
3757                                                                         opcode, instruction->info.rt, instruction->info.ra);
3758                                                         break;
3759                                                 case 7: /* OR33 */
3760                                                         snprintf(instruction->text,
3761                                                                         128,
3762                                                                         "0x%8.8" PRIx32 "\t0x%4.4" PRIx16
3763                                                                         "\t\tOR33\t$r%" PRIu8 ",$r%" PRIu8,
3764                                                                         address,
3765                                                                         opcode, instruction->info.rt, instruction->info.ra);
3766                                                         break;
3767                                         }
3768                                         break;
3769                         }
3770                         break;
3771                 default:
3772                         snprintf(instruction->text,
3773                                         128,
3774                                         "0x%8.8" PRIx32 "\t0x%8.8" PRIx16 "\tUNDEFINED INSTRUCTION",
3775                                         address,
3776                                         opcode);
3777                         return ERROR_FAIL;
3778         }
3779
3780         return ERROR_OK;
3781 }
3782
3783 int nds32_evaluate_opcode(struct nds32 *nds32, uint32_t opcode, uint32_t address,
3784                 struct nds32_instruction *instruction)
3785 {
3786         int retval = ERROR_OK;
3787
3788         /* clear fields, to avoid confusion */
3789         memset(instruction, 0, sizeof(struct nds32_instruction));
3790
3791         if (opcode >> 31) {
3792                 /* 16 bits instruction */
3793                 instruction->instruction_size = 2;
3794                 opcode = (opcode >> 16) & 0xFFFF;
3795                 instruction->opcode = opcode;
3796
3797                 switch ((opcode >> 13) & 0x3) {
3798                         case 0:
3799                                 retval = nds32_parse_group_0_insn_16(nds32, opcode, address, instruction);
3800                                 break;
3801                         case 1:
3802                                 retval = nds32_parse_group_1_insn_16(nds32, opcode, address, instruction);
3803                                 break;
3804                         case 2:
3805                                 retval = nds32_parse_group_2_insn_16(nds32, opcode, address, instruction);
3806                                 break;
3807                         case 3:
3808                                 retval = nds32_parse_group_3_insn_16(nds32, opcode, address, instruction);
3809                                 break;
3810                         default:
3811                                 snprintf(instruction->text,
3812                                                 128,
3813                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
3814                                                 address,
3815                                                 opcode);
3816                                 return ERROR_FAIL;
3817                 }
3818         } else {
3819                 /* 32 bits instruction */
3820                 instruction->instruction_size = 4;
3821                 instruction->opcode = opcode;
3822
3823                 uint8_t opc_6;
3824                 opc_6 = opcode >> 25;
3825                 instruction->info.opc_6 = opc_6;
3826
3827                 switch ((opc_6 >> 3) & 0x7) {
3828                         case 0: /* LBI, LHI, LWI, LBI.bi, LHI.bi, LWI.bi */
3829                                 retval = nds32_parse_group_0_insn(nds32, opcode, address, instruction);
3830                                 break;
3831                         case 1: /* SBI, SHI, SWI, SBI.bi, SHI.bi, SWI.bi */
3832                                 retval = nds32_parse_group_1_insn(nds32, opcode, address, instruction);
3833                                 break;
3834                         case 2: /* LBSI, LHSI, DPREFI, LBSI.bi, LHSI.bi, LBGP */
3835                                 retval = nds32_parse_group_2_insn(nds32, opcode, address, instruction);
3836                                 break;
3837                         case 3: /* MEM, LSMW, HWGP, SBGP */
3838                                 retval = nds32_parse_group_3_insn(nds32, opcode, address, instruction);
3839                                 break;
3840                         case 4: /* ALU_1, ALU_2, MOVI, SETHI, JI, JREG, BR1, BR2 */
3841                                 retval = nds32_parse_group_4_insn(nds32, opcode, address, instruction);
3842                                 break;
3843                         case 5: /* ADDI, SUBRI, ANDI, XORI, ORI, SLTI, SLTSI */
3844                                 retval = nds32_parse_group_5_insn(nds32, opcode, address, instruction);
3845                                 break;
3846                         case 6: /* MISC */
3847                                 retval = nds32_parse_group_6_insn(nds32, opcode, address, instruction);
3848                                 break;
3849                         default: /* ERROR */
3850                                 snprintf(instruction->text,
3851                                                 128,
3852                                                 "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tUNDEFINED INSTRUCTION",
3853                                                 address,
3854                                                 opcode);
3855                                 return ERROR_FAIL;
3856                 }
3857         }
3858
3859         return retval;
3860 }