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   1 /***************************************************************************
   2  *   Copyright (C) 2013 Andes Technology                                   *
   3  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20
  21 #ifndef __NDS32_DISASSEMBLER_H__
  22 #define __NDS32_DISASSEMBLER_H__
  23
  24 #include <target/nds32.h>
  25
  26 enum nds32_instruction_type {
  27         NDS32_INSN_DATA_PROC = 0,
  28         NDS32_INSN_LOAD_STORE,
  29         NDS32_INSN_JUMP_BRANCH,
  30         NDS32_INSN_RESOURCE_ACCESS,
  31         NDS32_INSN_MISC,
  32 };
  33
  34 struct nds32_instruction {
  35         enum nds32_instruction_type type;
  36         char text[128];
  37         uint32_t opcode;
  38         uint8_t instruction_size;
  39         uint32_t access_start;
  40         uint32_t access_end;
  41
  42         struct {
  43                 uint8_t opc_6;
  44                 uint8_t rt;
  45                 uint8_t ra;
  46                 uint8_t rb;
  47                 uint8_t rd;
  48                 uint8_t sub_opc;
  49                 int32_t imm;
  50         } info;
  51
  52 };
  53
  54 int nds32_read_opcode(struct nds32 *nds32, uint32_t address, uint32_t *value);
  55 int nds32_evaluate_opcode(struct nds32 *nds32, uint32_t opcode, uint32_t address,
  56                 struct nds32_instruction *instruction);
  57
  58 #endif /* __NDS32_DISASSEMBLER_H__ */