7 # This is for the case that TRST/SRST is not wired on your JTAG adaptor.
8 # Don't really need them anyways.
12 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
13 jtag_device 4 0x1 0xf 0xe
16 ## Target configuration
18 target create target0 arm7tdmi -endian little -chain-position 0
20 ## software initiated reset (if your SRST isn't wired)
21 #proc target_0_reset {} { mwb 0x0ffff0230 04 }
23 # use top 1k of SRAM for as temporary JTAG memory
24 #[new_target_name] configure -work-area-virt 0 -work-area-phys 0x11C00 -work-area-size 0x400 -work-area-backup 1
26 ## flash configuration
27 flash bank aduc702x 0x80000 0x10000 2 2 0
29 ## If you use the watchdog, the following code makes sure that the board
30 ## doesn't reboot when halted via JTAG. Yes, on the older generation
31 ## AdUC702x, timer3 continues running even when the CPU is halted.
33 proc watchdog_service {} {
37 set watchdog_hdl [after 500 watchdog_service]
40 [new_target_name] configure -event reset-halt-post { watchdog_service }
41 [new_target_name] configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }