1 #Script for AT91EB40a
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3 #Atmel ties SRST & TRST together, at which point it makes
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4 #no sense to use TRST, but use TMS instead.
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6 #The annoying thing with tying SRST & TRST together is that
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7 #there is no way to halt the CPU *before and during* the
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8 #SRST reset, which means that the CPU will run a number
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9 #of cycles before it can be halted(as much as milliseconds).
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10 openocd {reset_config srst_only srst_pulls_trst}
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13 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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14 openocd {jtag_device 4 0x1 0xf 0xe}
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16 #target configuration
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17 openocd {target arm7tdmi little 0 arm7tdmi-s_r4}
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19 # speed up memory downloads
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20 openocd {arm7 fast_memory_access enable}
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21 openocd {arm7_9 dcc_downloads enable}
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23 # OpenOCD does not have a flash driver for for AT91FR40162S
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24 openocd {target_script 0 reset event/at91eb40a_reset.script}
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27 openocd {flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf}
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29 # required for usable performance. Used for lots of
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30 # other things than flash programming.
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31 openocd {working_area 0 0x00000000 0x20000 nobackup}
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33 #force hardware values - we're running out of flash more
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34 #often than not. The user can disable this in his
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35 #subsequent config script.
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36 openocd {arm7_9 force_hw_bkpts enable}
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40 proc target_reset_0 {} {
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42 # Reset script for AT91EB40a
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43 openocd {reg cpsr 0x000000D3}
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44 openocd {mww 0xFFE00020 0x1}
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45 openocd {mww 0xFFE00024 0x00000000}
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46 openocd {mww 0xFFE00000 0x01002539}
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47 openocd {mww 0xFFFFF124 0xFFFFFFFF}
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48 openocd {mww 0xffff0010 0x100}
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49 openocd {mww 0xffff0034 0x100}
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50 set reset_count [expr $reset_count+1]
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51 puts "Testing reset $reset_count !"
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