2 # http://www.avalue.com.tw/products/RSC-W910.cfm
7 # Based on Nuvoton nuc910
8 source [find target/nuc910.cfg]
11 # reset only behaves correctly if we use srst_pulls_trst
13 reset_config trst_and_srst srst_pulls_trst
16 adapter_nsrst_delay 100
19 $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -work-area-backup 0
21 set _FLASHNAME $_CHIPNAME.flash
22 flash bank $_FLASHNAME cfi 0x20000000 0x00200000 2 2 $_TARGETNAME
24 set _NANDNAME $_CHIPNAME.nand
25 nand device $_NANDNAME nuc910 $_TARGETNAME
31 $_TARGETNAME configure -event reset-start {adapter_khz 1000}
33 $_TARGETNAME configure -event reset-init {
34 # switch on PLL for 200MHz operation
35 # running from 15MHz input clock
37 mww 0xB0000200 0x00000030 ;# CLKEN
38 mww 0xB0000204 0x00000f3c ;# CLKSEL
39 mww 0xB0000208 0x05007000 ;# CLKDIV
40 mww 0xB000020C 0x00004f24 ;# PLLCON0
41 mww 0xB0000210 0x00002b63 ;# PLLCON1
42 mww 0xB000000C 0x08817fa6 ;# MFSEL
45 # we are now running @ 200MHz
46 # enable all openocd speed tweaks
48 arm7_9 dcc_downloads enable
49 arm7_9 fast_memory_access enable
52 # map nor flash to 0x20000000
53 # map sdram to 0x00000000
55 mww 0xb0001000 0x000530c1 ;# EBICON
56 mww 0xb0001004 0x40030084 ;# ROMCON
57 mww 0xb0001008 0x000010ee ;# SDCONF0
58 mww 0xb000100C 0x00000000 ;# SDCONF1
59 mww 0xb0001010 0x0000015b ;# SDTIME0
60 mww 0xb0001014 0x0000015b ;# SDTIME1
61 mww 0xb0001018 0x00000000 ;# EXT0CON
62 mww 0xb000101C 0x00000000 ;# EXT1CON
63 mww 0xb0001020 0x00000000 ;# EXT2CON
64 mww 0xb0001024 0x00000000 ;# EXT3CON
65 mww 0xb000102c 0x00ff0048 ;# CKSKEW