#include "register.h"
#include "embeddedice.h"
#include "arm_jtag.h"
+#include <stdbool.h>
#define asizeof(x) (sizeof(x) / sizeof((x)[0]))
-#define NEW(type, variable, items) \
- type * variable = malloc(sizeof(type) * items)
+#define NEW(type, variable, items) \
+ type * variable = calloc(1, sizeof(type) * items)
+
+
+/* For MinGW use 'I' prefix to print size_t (instead of 'z') */
+
+#ifndef __MSVCRT__
+#define ZU "%zu"
+#else
+#define ZU "%Iu"
+#endif
#define ARM11_REGCACHE_MODEREGS 0
u32 last_dscr; /**< Last retrieved DSCR value;
* Can be used to detect changes */
- u8 trst_active;
- u8 halt_requested;
+ bool trst_active;
+ bool halt_requested;
+ bool simulate_reset_on_next_halt;
/** \name Shadow registers to save processor state */
/*@{*/
int arm11_assert_reset(struct target_s *target);
int arm11_deassert_reset(struct target_s *target);
int arm11_soft_reset_halt(struct target_s *target);
-int arm11_prepare_reset_halt(struct target_s *target);
/* target register access for gdb */
int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size);
*/
typedef struct arm11_sc7_action_s
{
- int write; /**< Access mode: true for write, false for read. */
+ bool write; /**< Access mode: true for write, false for read. */
u8 address; /**< Register address mode. Use enum #arm11_sc7 */
u32 value; /**< If write then set this to value to be written.
In read mode this receives the read value when the