sandbox: config: enable fdt and snprintf() options

[u-boot] / README

diff --git a/README b/README
index 58e582d022175c43a7249c26438fd70904db8028..89646725a0b884c5b8b10e4262a1682478788a29 100644 (file)
--- a/README
+++ b/README
@@ -1,5 +1,5 @@
 #
 #

-# (C) Copyright 2000 - 2011
+# (C) Copyright 2000 - 2012

 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this


@@ -420,6 +420,12 @@ The following options need to be configured:
                XWAY SoCs for booting from NOR flash. The U-Boot image needs to
                be swapped if a flash programmer is used.
 
                XWAY SoCs for booting from NOR flash. The U-Boot image needs to
                be swapped if a flash programmer is used.
 

+- ARM options:
+               CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+
+               Select high exception vectors of the ARM core, e.g., do not
+               clear the V bit of the c1 register of CP15.
+

 - Linux Kernel Interface:
                CONFIG_CLOCKS_IN_MHZ
 
 - Linux Kernel Interface:
                CONFIG_CLOCKS_IN_MHZ
 


@@ -564,7 +570,7 @@ The following options need to be configured:
 
                CONFIG_CFB_CONSOLE
                Enables console device for a color framebuffer. Needs following
 
                CONFIG_CFB_CONSOLE
                Enables console device for a color framebuffer. Needs following

-               defines (cf. smiLynxEM, i8042, board/eltec/bab7xx)
+               defines (cf. smiLynxEM, i8042)

                        VIDEO_FB_LITTLE_ENDIAN  graphic memory organisation
                                                (default big endian)
                        VIDEO_HW_RECTFILL       graphic chip supports
                        VIDEO_FB_LITTLE_ENDIAN  graphic memory organisation
                                                (default big endian)
                        VIDEO_HW_RECTFILL       graphic chip supports


@@ -638,6 +644,32 @@ The following options need to be configured:
                'Sane' compilers will generate smaller code if
                CONFIG_PRE_CON_BUF_SZ is a power of 2
 
                'Sane' compilers will generate smaller code if
                CONFIG_PRE_CON_BUF_SZ is a power of 2
 

+- Pre-console putc():
+               Prior to the console being initialised, console output is
+               normally silently discarded. This can be annoying if a
+               panic() happens in this time.
+
+               If the CONFIG_PRE_CONSOLE_PUTC option is defined, then
+               U-Boot will call board_pre_console_putc() for each output
+               character in this case, This function should try to output
+               the character if possible, perhaps on all available UARTs
+               (it will need to do this directly, since the console code
+               is not functional yet). Note that if the panic happens
+               early enough, then it is possible that board_init_f()
+               (or even arch_cpu_init() on ARM) has not been called yet.
+               You should init all clocks, GPIOs, etc. that are needed
+               to get the character out. Baud rates will need to default
+               to something sensible.
+
+- Safe printf() functions
+               Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
+               the printf() functions. These are defined in
+               include/vsprintf.h and include snprintf(), vsnprintf() and
+               so on. Code size increase is approximately 300-500 bytes.
+               If this option is not given then these functions will
+               silently discard their buffer size argument - this means
+               you are not getting any overflow checking in this case.
+

 - Boot Delay:  CONFIG_BOOTDELAY - in seconds
                Delay before automatically booting the default image;
                set to -1 to disable autoboot.
 - Boot Delay:  CONFIG_BOOTDELAY - in seconds
                Delay before automatically booting the default image;
                set to -1 to disable autoboot.


@@ -783,6 +815,7 @@ The following options need to be configured:
                                          (requires CONFIG_CMD_I2C)
                CONFIG_CMD_SETGETDCR      Support for DCR Register access
                                          (4xx only)
                                          (requires CONFIG_CMD_I2C)
                CONFIG_CMD_SETGETDCR      Support for DCR Register access
                                          (4xx only)

+               CONFIG_CMD_SF           * Read/write/erase SPI NOR flash

                CONFIG_CMD_SHA1SUM        print sha1 memory digest
                                          (requires CONFIG_CMD_MEMORY)
                CONFIG_CMD_SOURCE         "source" command Support
                CONFIG_CMD_SHA1SUM        print sha1 memory digest
                                          (requires CONFIG_CMD_MEMORY)
                CONFIG_CMD_SOURCE         "source" command Support


@@ -876,7 +909,7 @@ The following options need to be configured:
 
                CONFIG_RTC_MPC8xx       - use internal RTC of MPC8xx
                CONFIG_RTC_PCF8563      - use Philips PCF8563 RTC
 
                CONFIG_RTC_MPC8xx       - use internal RTC of MPC8xx
                CONFIG_RTC_PCF8563      - use Philips PCF8563 RTC

-               CONFIG_RTC_MC13783      - use MC13783 RTC
+               CONFIG_RTC_MC13XXX      - use MC13783 or MC13892 RTC

                CONFIG_RTC_MC146818     - use MC146818 RTC
                CONFIG_RTC_DS1307       - use Maxim, Inc. DS1307 RTC
                CONFIG_RTC_DS1337       - use Maxim, Inc. DS1337 RTC
                CONFIG_RTC_MC146818     - use MC146818 RTC
                CONFIG_RTC_DS1307       - use Maxim, Inc. DS1307 RTC
                CONFIG_RTC_DS1337       - use Maxim, Inc. DS1337 RTC


@@ -957,7 +990,20 @@ The following options need to be configured:
 
 - NETWORK Support (PCI):
                CONFIG_E1000
 
 - NETWORK Support (PCI):
                CONFIG_E1000

-               Support for Intel 8254x gigabit chips.
+               Support for Intel 8254x/8257x gigabit chips.
+
+               CONFIG_E1000_SPI
+               Utility code for direct access to the SPI bus on Intel 8257x.
+               This does not do anything useful unless you set at least one
+               of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
+
+               CONFIG_E1000_SPI_GENERIC
+               Allow generic access to the SPI bus on the Intel 8257x, for
+               example with the "sspi" command.
+
+               CONFIG_CMD_E1000
+               Management command for E1000 devices.  When used on devices
+               with SPI support you can reprogram the EEPROM from U-Boot.

 
                CONFIG_E1000_FALLBACK_MAC
                default MAC for empty EEPROM after production.
 
                CONFIG_E1000_FALLBACK_MAC
                default MAC for empty EEPROM after production.


@@ -990,6 +1036,9 @@ The following options need to be configured:
                        If this defined, the driver is quiet.
                        The driver doen't show link status messages.
 
                        If this defined, the driver is quiet.
                        The driver doen't show link status messages.
 

+               CONFIG_CALXEDA_XGMAC
+               Support for the Calxeda XGMAC device
+

                CONFIG_DRIVER_LAN91C96
                Support for SMSC's LAN91C96 chips.
 
                CONFIG_DRIVER_LAN91C96
                Support for SMSC's LAN91C96 chips.
 


@@ -1014,6 +1063,12 @@ The following options need to be configured:
                        Define this to use i/o functions instead of macros
                        (some hardware wont work with macros)
 
                        Define this to use i/o functions instead of macros
                        (some hardware wont work with macros)
 

+               CONFIG_DRIVER_TI_EMAC
+               Support for davinci emac
+
+                       CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
+                       Define this if you have more then 3 PHYs.
+

                CONFIG_FTGMAC100
                Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
 
                CONFIG_FTGMAC100
                Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
 


@@ -1053,6 +1108,16 @@ The following options need to be configured:
                        CONFIG_SH_ETHER_CACHE_WRITEBACK
                        If this option is set, the driver enables cache flush.
 
                        CONFIG_SH_ETHER_CACHE_WRITEBACK
                        If this option is set, the driver enables cache flush.
 

+- TPM Support:
+               CONFIG_GENERIC_LPC_TPM
+               Support for generic parallel port TPM devices. Only one device
+               per system is supported at this time.
+
+                       CONFIG_TPM_TIS_BASE_ADDRESS
+                       Base address where the generic TPM device is mapped
+                       to. Contemporary x86 systems usually map it at
+                       0xfed40000.
+

 - USB Support:
                At the moment only the UHCI host controller is
                supported (PIP405, MIP405, MPC5200); define
 - USB Support:
                At the moment only the UHCI host controller is
                supported (PIP405, MIP405, MPC5200); define


@@ -1139,6 +1204,14 @@ The following options need to be configured:
                        for your device
                        - CONFIG_USBD_PRODUCTID 0xFFFF
 
                        for your device
                        - CONFIG_USBD_PRODUCTID 0xFFFF
 

+- ULPI Layer Support:
+               The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
+               the generic ULPI layer. The generic layer accesses the ULPI PHY
+               via the platform viewport, so you need both the genric layer and
+               the viewport enabled. Currently only Chipidea/ARC based
+               viewport is supported.
+               To enable the ULPI layer support, define CONFIG_USB_ULPI and
+               CONFIG_USB_ULPI_VIEWPORT in your board configuration file.

 
 - MMC Support:
                The MMC controller on the Intel PXA is supported. To
 
 - MMC Support:
                The MMC controller on the Intel PXA is supported. To


@@ -1891,7 +1964,7 @@ The following options need to be configured:
                CONFIG_MXC_SPI
 
                Enables the driver for the SPI controllers on i.MX and MXC
                CONFIG_MXC_SPI
 
                Enables the driver for the SPI controllers on i.MX and MXC

-               SoCs. Currently only i.MX31 is supported.
+               SoCs. Currently i.MX31/35/51 are supported.

 
 - FPGA Support: CONFIG_FPGA
 
 
 - FPGA Support: CONFIG_FPGA
 


@@ -2125,6 +2198,25 @@ The following options need to be configured:
                allows to read/write in Dataflash via the standard
                commands cp, md...
 
                allows to read/write in Dataflash via the standard
                commands cp, md...
 

+- Serial Flash support
+               CONFIG_CMD_SF
+
+               Defining this option enables SPI flash commands
+               'sf probe/read/write/erase/update'.
+
+               Usage requires an initial 'probe' to define the serial
+               flash parameters, followed by read/write/erase/update
+               commands.
+
+               The following defaults may be provided by the platform
+               to handle the common case when only a single serial
+               flash is present on the system.
+
+               CONFIG_SF_DEFAULT_BUS           Bus identifier
+               CONFIG_SF_DEFAULT_CS            Chip-select
+               CONFIG_SF_DEFAULT_MODE          (see include/spi.h)
+               CONFIG_SF_DEFAULT_SPEED         in Hz
+

 - SystemACE Support:
                CONFIG_SYSTEMACE
 
 - SystemACE Support:
                CONFIG_SYSTEMACE
 


@@ -3244,12 +3336,55 @@ Low Level (hardware related) configuration options:
                that is executed before the actual U-Boot. E.g. when
                compiling a NAND SPL.
 
                that is executed before the actual U-Boot. E.g. when
                compiling a NAND SPL.
 

+- CONFIG_SYS_NAND_HW_ECC_OOBFIRST
+               define this, if you want to read first the oob data
+               and then the data. This is used for example on
+               davinci plattforms.
+

 - CONFIG_USE_ARCH_MEMCPY
   CONFIG_USE_ARCH_MEMSET
                If these options are used a optimized version of memcpy/memset will
                be used if available. These functions may be faster under some
                conditions but may increase the binary size.
 
 - CONFIG_USE_ARCH_MEMCPY
   CONFIG_USE_ARCH_MEMSET
                If these options are used a optimized version of memcpy/memset will
                be used if available. These functions may be faster under some
                conditions but may increase the binary size.
 

+Freescale QE/FMAN Firmware Support:
+-----------------------------------
+
+The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
+loading of "firmware", which is encoded in the QE firmware binary format.
+This firmware often needs to be loaded during U-Boot booting, so macros
+are used to identify the storage device (NOR flash, SPI, etc) and the address
+within that device.
+
+- CONFIG_SYS_QE_FMAN_FW_ADDR
+       The address in the storage device where the firmware is located.  The
+       meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+       is also specified.
+
+- CONFIG_SYS_QE_FMAN_FW_LENGTH
+       The maximum possible size of the firmware.  The firmware binary format
+       has a field that specifies the actual size of the firmware, but it
+       might not be possible to read any part of the firmware unless some
+       local storage is allocated to hold the entire firmware first.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NOR
+       Specifies that QE/FMAN firmware is located in NOR flash, mapped as
+       normal addressable memory via the LBC.  CONFIG_SYS_FMAN_FW_ADDR is the
+       virtual address in NOR flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NAND
+       Specifies that QE/FMAN firmware is located in NAND flash.
+       CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_MMC
+       Specifies that QE/FMAN firmware is located on the primary SD/MMC
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
+       Specifies that QE/FMAN firmware is located on the primary SPI
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+

 Building the Software:
 ======================
 
 Building the Software:
 ======================
 


@@ -3530,6 +3665,14 @@ List of environment variables (most likely not complete):
 
   fdt_high     - if set this restricts the maximum address that the
                  flattened device tree will be copied into upon boot.
 
   fdt_high     - if set this restricts the maximum address that the
                  flattened device tree will be copied into upon boot.

+                 For example, if you have a system with 1 GB memory
+                 at physical address 0x10000000, while Linux kernel
+                 only recognizes the first 704 MB as low memory, you
+                 may need to set fdt_high as 0x3C000000 to have the
+                 device tree blob be copied to the maximum address
+                 of the 704 MB low memory, so that Linux kernel can
+                 access it during the boot procedure.
+

                  If this is set to the special value 0xFFFFFFFF then
                  the fdt will not be copied at all on boot.  For this
                  to work it must reside in writable memory, have
                  If this is set to the special value 0xFFFFFFFF then
                  the fdt will not be copied at all on boot.  For this
                  to work it must reside in writable memory, have