+#define SRC_SBMR2_BMOD_MASK (0x3 << 24)
+#define SRC_SBMR2_BMOD_SHIFT 24
+#define SRC_SBMR2_BMOD_FUSES 0x0
+#define SRC_SBMR2_BMOD_SERIAL 0x1
+#define SRC_SBMR2_BMOD_RCON 0x2
+
+/* Slow Clock Source Controller Module (SCSC) */
+#define SCSC_SOSC_CTR_SOSC_EN 0x1