- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- phys_size_t ram_size; /* RAM size */
- unsigned long mon_len; /* monitor len */
- unsigned long irq_sp; /* irq stack pointer */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
- unsigned long reloc_off;
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
- unsigned long tlb_addr;
+ /* "static data" needed by most of timer.c on ARM platforms */
+ unsigned long timer_rate_hz;
+ unsigned int tbu;
+ unsigned int tbl;
+ unsigned long lastinc;
+ unsigned long long timer_reset_value;
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+ unsigned long tlb_addr;
+ unsigned long tlb_size;
+#if defined(CONFIG_ARM64)
+ unsigned long tlb_fillptr;
+ unsigned long tlb_emerg;
+#endif
+#endif
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+#define MEM_RESERVE_SECURE_SECURED 0x1
+#define MEM_RESERVE_SECURE_MAINTAINED 0x2
+#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
+ /*
+ * Secure memory addr
+ * This variable needs maintenance if the RAM base is not zero,
+ * or if RAM splits into non-consecutive banks. It also has a
+ * flag indicating the secure memory is marked as secure by MMU.
+ * Flags used: 0x1 secured
+ * 0x2 maintained
+ */
+ phys_addr_t secure_ram;
+ unsigned long tlb_allocated;
+#endif
+#ifdef CONFIG_RESV_RAM
+ /*
+ * Reserved RAM for memory resident, eg. Management Complex (MC)
+ * driver which continues to run after U-Boot exits.
+ */
+ phys_addr_t resv_ram;