+#endif /* CONFIG_CPU_ARM926EJS */
+ return;
+}
+
+/*
+ * Default implementation:
+ * do a range flush for the entire range
+ */
+__weak void flush_dcache_all(void)
+{
+ flush_cache(0, ~0);
+}
+
+/*
+ * Default implementation of enable_caches()
+ * Real implementation should be in platform code
+ */
+__weak void enable_caches(void)
+{
+ puts("WARNING: Caches not enabled\n");
+}
+
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+/*
+ * Reserve one MMU section worth of address space below the malloc() area that
+ * will be mapped uncached.
+ */
+static unsigned long noncached_start;
+static unsigned long noncached_end;
+static unsigned long noncached_next;
+
+void noncached_init(void)
+{
+ phys_addr_t start, end;
+ size_t size;
+
+ end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) - MMU_SECTION_SIZE;
+ size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
+ start = end - size;
+
+ debug("mapping memory %pa-%pa non-cached\n", &start, &end);