+clr_gd:
+ cmp r1, r2 /* while not at end of GD */
+#if defined(CONFIG_CPU_V7M)
+ itt lo
+#endif
+ strlo r0, [r1] /* clear 32-bit GD word */
+ addlo r1, r1, #4 /* move to next */
+ blo clr_gd
+#if defined(CONFIG_SYS_MALLOC_F_LEN)
+ sub sp, sp, #CONFIG_SYS_MALLOC_F_LEN
+ str sp, [r9, #GD_MALLOC_BASE]
+#endif
+ /* mov r0, #0 not needed due to above code */