+#endif
+
+#ifdef TEGRA_PMX_PINS_HAVE_E_IO_HV
+static void pinmux_set_e_io_hv(enum pmux_pingrp pin,
+ enum pmux_pin_e_io_hv e_io_hv)
+{
+ u32 *reg = REG(pin);
+ u32 val;
+
+ if (e_io_hv == PMUX_PIN_E_IO_HV_DEFAULT)
+ return;
+
+ /* Error check on pin and e_io_hv */
+ assert(pmux_pingrp_isvalid(pin));
+ assert(pmux_pin_e_io_hv_isvalid(e_io_hv));
+
+ val = readl(reg);
+ if (e_io_hv == PMUX_PIN_E_IO_HV_HIGH)
+ val |= (1 << E_IO_HV_SHIFT);
+ else
+ val &= ~(1 << E_IO_HV_SHIFT);
+ writel(val, reg);
+
+ return;
+}
+#endif
+
+#ifdef TEGRA_PMX_PINS_HAVE_SCHMT
+static void pinmux_set_schmt(enum pmux_pingrp pin, enum pmux_schmt schmt)
+{
+ u32 *reg = REG(grp);
+ u32 val;
+
+ /* NONE means unspecified/do not change/use POR value */
+ if (schmt == PMUX_SCHMT_NONE)
+ return;
+
+ /* Error check pad */
+ assert(pmux_pingrp_isvalid(pin));
+ assert(pmux_schmt_isvalid(schmt));
+
+ val = readl(reg);
+ if (schmt == PMUX_SCHMT_ENABLE)
+ val |= (1 << SCHMT_SHIFT);
+ else
+ val &= ~(1 << SCHMT_SHIFT);
+ writel(val, reg);
+
+ return;
+}
+#endif
+
+#ifdef TEGRA_PMX_PINS_HAVE_HSM
+static void pinmux_set_hsm(enum pmux_pingrp pin, enum pmux_hsm hsm)
+{
+ u32 *reg = REG(grp);
+ u32 val;
+
+ /* NONE means unspecified/do not change/use POR value */
+ if (hsm == PMUX_HSM_NONE)
+ return;
+
+ /* Error check pad */
+ assert(pmux_pingrp_isvalid(pin));
+ assert(pmux_hsm_isvalid(hsm));
+
+ val = readl(reg);
+ if (hsm == PMUX_HSM_ENABLE)
+ val |= (1 << HSM_SHIFT);
+ else
+ val &= ~(1 << HSM_SHIFT);
+ writel(val, reg);
+
+ return;
+}
+#endif