#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */
#ifdef CONFIG_BOOKE
#define SPRN_CCR1 0x378 /* Core Configuration Register for 440 only */
#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */
#ifdef CONFIG_BOOKE
#define SPRN_CCR1 0x378 /* Core Configuration Register for 440 only */
#define SPRN_MCAR 0x23d /* Machine Check Address register */
#define MCSR_MCS 0x80000000 /* Machine Check Summary */
#define MCSR_IB 0x40000000 /* Instruction PLB Error */
#define SPRN_MCAR 0x23d /* Machine Check Address register */
#define MCSR_MCS 0x80000000 /* Machine Check Summary */
#define MCSR_IB 0x40000000 /* Instruction PLB Error */
#define MCSR_TLBP 0x08000000 /* TLB Parity Error */
#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */
#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */
#define MCSR_TLBP 0x08000000 /* TLB Parity Error */
#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */
#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */