+VIA1 := $9110 ; VIA1 base address
+VIA1_JOY := VIA1+$0 ; *** Deprecated ***
+VIA1_PB := VIA1+$0 ; Port register B
+VIA1_PA1 := VIA1+$1 ; Port register A
+VIA1_DDRB := VIA1+$2 ; Data direction register B
+VIA1_DDRA := VIA1+$3 ; Data direction register A
+VIA1_T1CL := VIA1+$4 ; Timer 1, low byte
+VIA1_T1CH := VIA1+$5 ; Timer 1, high byte
+VIA1_T1LL := VIA1+$6 ; Timer 1 latch, low byte
+VIA1_T1LH := VIA1+$7 ; Timer 1 latch, high byte
+VIA1_T2CL := VIA1+$8 ; Timer 2, low byte
+VIA1_T2CH := VIA1+$9 ; Timer 2, high byte
+VIA1_SR := VIA1+$A ; Shift register
+VIA1_CR := VIA1+$B ; Auxiliary control register
+VIA1_PCR := VIA1+$C ; Peripheral control register
+VIA1_IFR := VIA1+$D ; Interrupt flag register
+VIA1_IER := VIA1+$E ; Interrupt enable register
+VIA1_PA2 := VIA1+$F ; Port register A w/o handshake