-#define _V3Write16(o,v) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned short)(v))
-#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)))
-
-#define _V3Write32(o,v) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned int)(v))
-#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)))
-
-/* Compute address necessary to access PCI config space for the given */
-/* bus and device. */
-#define PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) ({ \
- unsigned int __address, __devicebit; \
- unsigned short __mapaddress; \
- unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \
- \
- if (__bus == 0) { \
- /* local bus segment so need a type 0 config cycle */ \
- /* build the PCI configuration "address" with one-hot in A31-A11 */ \
- __address = PCI_CONFIG_BASE; \
- __address |= ((__devfn & 0x07) << 8); \
- __address |= __offset & 0xFF; \
- __mapaddress = 0x000A; /* 101=>config cycle, 0=>A1=A0=0 */ \
- __devicebit = (1 << (__dev + 11)); \
- \
- if ((__devicebit & 0xFF000000) != 0) { \
- /* high order bits are handled by the MAP register */ \
- __mapaddress |= (__devicebit >> 16); \
- } else { \
- /* low order bits handled directly in the address */ \
- __address |= __devicebit; \
- } \
- } else { /* bus !=0 */ \
- /* not the local bus segment so need a type 1 config cycle */ \
- /* A31-A24 are don't care (so clear to 0) */ \
- __mapaddress = 0x000B; /* 101=>config cycle, 1=>A1&A0 from PCI_CFG */ \
- __address = PCI_CONFIG_BASE; \
- __address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \
- __address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \
- __address |= ((__devfn & 0x07) << 8); /* bits 10..8 = function number */ \
- __address |= __offset & 0xFF; /* bits 7..0 = register number */ \
- } \
- _V3Write16 (V3_LB_MAP1, __mapaddress); \
- __address; \
-})
-
-/* _V3OpenConfigWindow - open V3 configuration window */
-#define _V3OpenConfigWindow() { \
- /* Set up base0 to see all 512Mbytes of memory space (not */ \
- /* prefetchable), this frees up base1 for re-use by configuration*/ \
- /* memory */ \
- \
- _V3Write32 (V3_LB_BASE0, ((INTEGRATOR_PCI_BASE & 0xFFF00000) | \
- 0x90 | V3_LB_BASE_M_ENABLE)); \
- /* Set up base1 to point into configuration space, note that MAP1 */ \
- /* register is set up by pciMakeConfigAddress(). */ \
- \
- _V3Write32 (V3_LB_BASE1, ((CPU_PCI_CNFG_ADRS & 0xFFF00000) | \
- 0x40 | V3_LB_BASE_M_ENABLE)); \
+#define v3_writeb(o, v) __raw_writeb(v, PHYS_PCI_V3_BASE + (unsigned int)(o))
+#define v3_readb(o) (__raw_readb(PHYS_PCI_V3_BASE + (unsigned int)(o)))
+
+#define v3_writew(o, v) __raw_writew(v, PHYS_PCI_V3_BASE + (unsigned int)(o))
+#define v3_readw(o) (__raw_readw(PHYS_PCI_V3_BASE + (unsigned int)(o)))
+
+#define v3_writel(o, v) __raw_writel(v, PHYS_PCI_V3_BASE + (unsigned int)(o))
+#define v3_readl(o) (__raw_readl(PHYS_PCI_V3_BASE + (unsigned int)(o)))
+
+static unsigned long v3_open_config_window(pci_dev_t bdf, int offset)
+{
+ unsigned int address, mapaddress;
+ unsigned int busnr = PCI_BUS(bdf);
+ unsigned int devfn = PCI_FUNC(bdf);
+
+ /*
+ * Trap out illegal values
+ */
+ if (offset > 255)
+ BUG();
+ if (busnr > 255)
+ BUG();
+ if (devfn > 255)
+ BUG();
+
+ if (busnr == 0) {
+ /*
+ * Linux calls the thing U-Boot calls "DEV" "SLOT"
+ * instead, but it's the same 5 bits
+ */
+ int slot = PCI_DEV(bdf);
+
+ /*
+ * local bus segment so need a type 0 config cycle
+ *
+ * build the PCI configuration "address" with one-hot in
+ * A31-A11
+ *
+ * mapaddress:
+ * 3:1 = config cycle (101)
+ * 0 = PCI A1 & A0 are 0 (0)
+ */
+ address = PCI_FUNC(bdf) << 8;
+ mapaddress = V3_LB_MAP_TYPE_CONFIG;
+
+ if (slot > 12)
+ /*
+ * high order bits are handled by the MAP register
+ */
+ mapaddress |= 1 << (slot - 5);
+ else
+ /*
+ * low order bits handled directly in the address
+ */
+ address |= 1 << (slot + 11);
+ } else {
+ /*
+ * not the local bus segment so need a type 1 config cycle
+ *
+ * address:
+ * 23:16 = bus number
+ * 15:11 = slot number (7:3 of devfn)
+ * 10:8 = func number (2:0 of devfn)
+ *
+ * mapaddress:
+ * 3:1 = config cycle (101)
+ * 0 = PCI A1 & A0 from host bus (1)
+ */
+ mapaddress = V3_LB_MAP_TYPE_CONFIG | V3_LB_MAP_AD_LOW_EN;
+ address = (busnr << 16) | (devfn << 8);
+ }
+
+ /*
+ * Set up base0 to see all 512Mbytes of memory space (not
+ * prefetchable), this frees up base1 for re-use by
+ * configuration memory
+ */
+ v3_writel(V3_LB_BASE0, v3_addr_to_lb_base(PHYS_PCI_MEM_BASE) |
+ V3_LB_BASE_ADR_SIZE_512MB | V3_LB_BASE_ENABLE);
+
+ /*
+ * Set up base1/map1 to point into configuration space.
+ */
+ v3_writel(V3_LB_BASE1, v3_addr_to_lb_base(PHYS_PCI_CONFIG_BASE) |
+ V3_LB_BASE_ADR_SIZE_16MB | V3_LB_BASE_ENABLE);
+ v3_writew(V3_LB_MAP1, mapaddress);
+
+ return PHYS_PCI_CONFIG_BASE + address + offset;