- *pPORTF_MUX = 0x00000000;
- *pPORTF_FER |= 0xFFFF; /* PPI0..15 */
-
- *pPORTG_MUX &=
- ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK |
- PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK);
- *pPORTG_FER |= PG0 | PG1 | PG2 | PG3 | PG4; /* CLK, FS1, FS2, PPI16..17 */
-
+ const unsigned short pins[] = {
+ P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, P_PPI0_D4,
+ P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9,
+ P_PPI0_D10, P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14,
+ P_PPI0_D15, P_PPI0_D16, P_PPI0_D17,