/* ------------------------------------------------------------------------- */
/* this is the current GT register space location */
/* ------------------------------------------------------------------------- */
/* this is the current GT register space location */
/* Unfortunately, we cant change it while we are in flash, so we initialize it
* to the "final" value. This means that any debug_led calls before
/* Unfortunately, we cant change it while we are in flash, so we initialize it
* to the "final" value. This means that any debug_led calls before
- pciMapSpace(PCI_HOST0, PCI_REGION0, CFG_PCI0_0_MEM_SPACE,
- CFG_PCI0_0_MEM_SPACE, CFG_PCI0_MEM_SIZE);
+ pciMapSpace(PCI_HOST0, PCI_REGION0, CONFIG_SYS_PCI0_0_MEM_SPACE,
+ CONFIG_SYS_PCI0_0_MEM_SPACE, CONFIG_SYS_PCI0_MEM_SIZE);
pciMapSpace(PCI_HOST0, PCI_REGION1, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION2, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION3, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION1, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION2, 0, 0, 0);
pciMapSpace(PCI_HOST0, PCI_REGION3, 0, 0, 0);
- pciMapSpace(PCI_HOST0, PCI_IO, CFG_PCI0_IO_SPACE_PCI,
- CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE);
+ pciMapSpace(PCI_HOST0, PCI_IO, CONFIG_SYS_PCI0_IO_SPACE_PCI,
+ CONFIG_SYS_PCI0_IO_SPACE, CONFIG_SYS_PCI0_IO_SIZE);
- pciMapSpace(PCI_HOST1, PCI_REGION0, CFG_PCI1_0_MEM_SPACE,
- CFG_PCI1_0_MEM_SPACE, CFG_PCI1_MEM_SIZE);
+ pciMapSpace(PCI_HOST1, PCI_REGION0, CONFIG_SYS_PCI1_0_MEM_SPACE,
+ CONFIG_SYS_PCI1_0_MEM_SPACE, CONFIG_SYS_PCI1_MEM_SIZE);
pciMapSpace(PCI_HOST1, PCI_REGION1, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION2, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION3, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION1, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION2, 0, 0, 0);
pciMapSpace(PCI_HOST1, PCI_REGION3, 0, 0, 0);
- pciMapSpace(PCI_HOST1, PCI_IO, CFG_PCI1_IO_SPACE_PCI,
- CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE);
+ pciMapSpace(PCI_HOST1, PCI_IO, CONFIG_SYS_PCI1_IO_SPACE_PCI,
+ CONFIG_SYS_PCI1_IO_SPACE, CONFIG_SYS_PCI1_IO_SIZE);
/* PCI interface settings */
GT_REG_WRITE(PCI_0TIMEOUT_RETRY, 0xffff);
/* PCI interface settings */
GT_REG_WRITE(PCI_0TIMEOUT_RETRY, 0xffff);
GT_REG_WRITE(CPU_INT_3_MASK, 0);
/* now, onto the configuration */
GT_REG_WRITE(CPU_INT_3_MASK, 0);
/* now, onto the configuration */
- memoryMapDeviceSpace(DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
- memoryMapDeviceSpace(DEVICE2, CFG_DEV2_SPACE, CFG_DEV2_SIZE);
- memoryMapDeviceSpace(DEVICE3, CFG_DEV3_SPACE, CFG_DEV3_SIZE);
+ memoryMapDeviceSpace(DEVICE1, CONFIG_SYS_DEV1_SPACE, CONFIG_SYS_DEV1_SIZE);
+ memoryMapDeviceSpace(DEVICE2, CONFIG_SYS_DEV2_SPACE, CONFIG_SYS_DEV2_SIZE);
+ memoryMapDeviceSpace(DEVICE3, CONFIG_SYS_DEV3_SPACE, CONFIG_SYS_DEV3_SIZE);
/* detect if we are booting from the 32 bit flash */
if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
/* 32 bit boot flash */
/* detect if we are booting from the 32 bit flash */
if (GTREGREAD(DEVICE_BOOT_BANK_PARAMETERS) & (0x3 << 20)) {
/* 32 bit boot flash */
- GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_8BIT_BOOT_PAR);
- GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_32BIT_BOOT_PAR);
+ GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);
+ GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_32BIT_BOOT_PAR);
- GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CFG_32BIT_BOOT_PAR);
- GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CFG_8BIT_BOOT_PAR);
+ GT_REG_WRITE(DEVICE_BANK3PARAMETERS, CONFIG_SYS_32BIT_BOOT_PAR);
+ GT_REG_WRITE(DEVICE_BOOT_BANK_PARAMETERS, CONFIG_SYS_8BIT_BOOT_PAR);
- GT_REG_WRITE(MPP_CONTROL0, CFG_MPP_CONTROL_0);
- GT_REG_WRITE(MPP_CONTROL1, CFG_MPP_CONTROL_1);
- GT_REG_WRITE(MPP_CONTROL2, CFG_MPP_CONTROL_2);
- GT_REG_WRITE(MPP_CONTROL3, CFG_MPP_CONTROL_3);
+ GT_REG_WRITE(MPP_CONTROL0, CONFIG_SYS_MPP_CONTROL_0);
+ GT_REG_WRITE(MPP_CONTROL1, CONFIG_SYS_MPP_CONTROL_1);
+ GT_REG_WRITE(MPP_CONTROL2, CONFIG_SYS_MPP_CONTROL_2);
+ GT_REG_WRITE(MPP_CONTROL3, CONFIG_SYS_MPP_CONTROL_3);
- GT_REG_WRITE(GPP_LEVEL_CONTROL, CFG_GPP_LEVEL_CONTROL);
- GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, CFG_SERIAL_PORT_MUX);
+ GT_REG_WRITE(GPP_LEVEL_CONTROL, CONFIG_SYS_GPP_LEVEL_CONTROL);
+ GT_REG_WRITE(SERIAL_PORT_MULTIPLEX, CONFIG_SYS_SERIAL_PORT_MUX);
- if (memoryGetDeviceBaseAddress(DEVICE0) == CFG_MONITOR_BASE) {
- memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
- memoryMapDeviceSpace(BOOT_DEVICE, CFG_FLASH_BASE, _1M);
+ if (memoryGetDeviceBaseAddress(DEVICE0) == CONFIG_SYS_MONITOR_BASE) {
+ memoryMapDeviceSpace(DEVICE0, CONFIG_SYS_DEV0_SPACE, CONFIG_SYS_DEV0_SIZE);
+ memoryMapDeviceSpace(BOOT_DEVICE, CONFIG_SYS_FLASH_BASE, _1M);