+
+#if defined(CONFIG_SPL_BUILD)
+#include <spl.h>
+#include <nand.h>
+#include <spi_flash.h>
+
+void matrix_init(void)
+{
+ struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+
+ writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
+ | AT91_MATRIX_SLOT_CYCLE_(0x40),
+ &mat->scfg[3]);
+}
+
+void at91_spl_board_init(void)
+{
+ taurus_nand_hw_init();
+ at91_spi0_hw_init(TAURUS_SPI_MASK);
+
+ /* Configure recovery button PINs */
+ at91_set_gpio_input(AT91_PIN_PA31, 1);
+
+ /* check if button is pressed */
+ if (at91_get_gpio_value(AT91_PIN_PA31) == 0) {
+ struct spi_flash *flash;
+
+ debug("Recovery button pressed\n");
+ nand_init();
+ spl_nand_erase_one(0, 0);
+ flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+ 0,
+ CONFIG_SF_DEFAULT_SPEED,
+ SPI_MODE_3);
+ if (!flash) {
+ puts("no flash\n");
+ } else {
+ puts("erase spi flash sector 0\n");
+ spi_flash_erase(flash, 0,
+ CONFIG_SYS_NAND_U_BOOT_SIZE);
+ }
+ }
+}
+
+void mem_init(void)
+{
+ struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+ struct sdramc_reg setting;
+
+ at91_sdram_hw_init();
+ setting.cr = (AT91_SDRAMC_NC_9 |
+ AT91_SDRAMC_NR_13 |
+ AT91_SDRAMC_CAS_3 |
+ AT91_SDRAMC_NB_4 |
+ AT91_SDRAMC_DBW_32 |
+ AT91_SDRAMC_TWR_VAL(3) |
+ AT91_SDRAMC_TRC_VAL(9) |
+ AT91_SDRAMC_TRP_VAL(3) |
+ AT91_SDRAMC_TRCD_VAL(3) |
+ AT91_SDRAMC_TRAS_VAL(6) |
+ AT91_SDRAMC_TXSR_VAL(10));
+ setting.mdr = AT91_SDRAMC_MD_SDRAM;
+ setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
+
+
+ writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
+ AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
+ &ma->ebicsa);
+ sdramc_initialize(ATMEL_BASE_CS1, &setting);
+}