+ return FPGA_SUCCESS;
+}
+
+static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap)
+{
+ u32 *new_buf;
+ u32 i;
+
+ if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
+ new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
+
+ /*
+ * This might be dangerous but permits to flash if
+ * ARCH_DMA_MINALIGN is greater than header size
+ */
+ if (new_buf > buf) {
+ debug("%s: Aligned buffer is after buffer start\n",
+ __func__);
+ new_buf -= ARCH_DMA_MINALIGN;
+ }
+ printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
+ (u32)buf, (u32)new_buf, swap);
+
+ for (i = 0; i < (len/4); i++)
+ new_buf[i] = load_word(&buf[i], swap);
+
+ buf = new_buf;
+ } else if (swap != SWAP_DONE) {
+ /* For bitstream which are aligned */
+ u32 *new_buf = (u32 *)buf;
+
+ printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__,
+ swap);
+
+ for (i = 0; i < (len/4); i++)
+ new_buf[i] = load_word(&buf[i], swap);
+ }
+
+ return buf;
+}
+
+static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
+ size_t bsize, u32 blocksize, u32 *swap,
+ bitstream_type *bstype)
+{
+ u32 *buf_start;
+ u32 diff;
+
+ buf_start = check_data((u8 *)buf, blocksize, swap);
+
+ if (!buf_start)
+ return FPGA_FAIL;
+
+ /* Check if data is postpone from start */
+ diff = (u32)buf_start - (u32)buf;
+ if (diff) {
+ printf("%s: Bitstream is not validated yet (diff %x)\n",
+ __func__, diff);
+ return FPGA_FAIL;
+ }
+
+ if ((u32)buf < SZ_1M) {
+ printf("%s: Bitstream has to be placed up to 1MB (%x)\n",
+ __func__, (u32)buf);
+ return FPGA_FAIL;
+ }
+
+ if (zynq_dma_xfer_init(*bstype))
+ return FPGA_FAIL;
+
+ return 0;
+}
+
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
+ bitstream_type bstype)
+{
+ unsigned long ts; /* Timestamp */
+ u32 isr_status, swap;
+
+ /*
+ * send bsize inplace of blocksize as it was not a bitstream
+ * in chunks
+ */
+ if (zynq_validate_bitstream(desc, buf, bsize, bsize, &swap,
+ &bstype))
+ return FPGA_FAIL;
+
+ buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap);
+